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authorMatthew Vick <matthew.vick@intel.com>2012-08-18 07:26:33 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-09-17 02:04:24 -0700
commit1f6e8178d6851951876ad8524f4de7a0e6b111be (patch)
treee7a363f6216bc4456ae57d4cd1895bcf5f958ce8 /drivers/net/ethernet/intel/igb/e1000_regs.h
parentigb: Store the MAC address in the name in the PTP struct. (diff)
downloadlinux-dev-1f6e8178d6851951876ad8524f4de7a0e6b111be.tar.xz
linux-dev-1f6e8178d6851951876ad8524f4de7a0e6b111be.zip
igb: Prevent dropped Tx timestamps via work items and interrupts.
In rare circumstances, it's possible a descriptor writeback will occur before a timestamped Tx packet will go out on the wire, leading to the driver believing the hardware failed to timestamp the packet. Schedule a work item for 82576 and use the available time sync interrupt registers on 82580 and above to account for this. Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Matthew Vick <matthew.vick@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igb/e1000_regs.h')
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_regs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h
index 28394bea5253..faec840a5a8a 100644
--- a/drivers/net/ethernet/intel/igb/e1000_regs.h
+++ b/drivers/net/ethernet/intel/igb/e1000_regs.h
@@ -91,6 +91,8 @@
#define E1000_TIMINCA 0x0B608 /* Increment attributes register - RW */
#define E1000_TSAUXC 0x0B640 /* Timesync Auxiliary Control register */
#define E1000_SYSTIMR 0x0B6F8 /* System time register Residue */
+#define E1000_TSICR 0x0B66C /* Interrupt Cause Register */
+#define E1000_TSIM 0x0B674 /* Interrupt Mask Register */
/* Filtering Registers */
#define E1000_SAQF(_n) (0x5980 + 4 * (_n))