aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/intel/igb/e1000_regs.h
diff options
context:
space:
mode:
authorRichard Cochran <richardcochran@gmail.com>2015-07-23 14:59:30 -0700
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2015-08-18 14:06:04 -0700
commit30c72916d71b7970b16dca2bb1234aef2d37b695 (patch)
tree95b35c9485775cd48c26692e9b13235b21b0a6c0 /drivers/net/ethernet/intel/igb/e1000_regs.h
parentigb: do not re-init SR-IOV during probe (diff)
downloadlinux-dev-30c72916d71b7970b16dca2bb1234aef2d37b695.tar.xz
linux-dev-30c72916d71b7970b16dca2bb1234aef2d37b695.zip
igb: implement high frequency periodic output signals
In addition to interrupt driven target time output events, the i210 also has two programmable clock outputs. These clocks support periods between 16 nanoseconds and 140 milliseconds. This patch implements the periodic output function using the clock outputs when possible, falling back to the target time for longer periods. Signed-off-by: Richard Cochran <richardcochran@gmail.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igb/e1000_regs.h')
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_regs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h
index 6f0490d0e981..4af2870e49f8 100644
--- a/drivers/net/ethernet/intel/igb/e1000_regs.h
+++ b/drivers/net/ethernet/intel/igb/e1000_regs.h
@@ -104,6 +104,8 @@
#define E1000_TRGTTIMH0 0x0B648 /* Target Time Register 0 High - RW */
#define E1000_TRGTTIML1 0x0B64C /* Target Time Register 1 Low - RW */
#define E1000_TRGTTIMH1 0x0B650 /* Target Time Register 1 High - RW */
+#define E1000_FREQOUT0 0x0B654 /* Frequency Out 0 Control Register - RW */
+#define E1000_FREQOUT1 0x0B658 /* Frequency Out 1 Control Register - RW */
#define E1000_AUXSTMPL0 0x0B65C /* Auxiliary Time Stamp 0 Register Low - RO */
#define E1000_AUXSTMPH0 0x0B660 /* Auxiliary Time Stamp 0 Register High - RO */
#define E1000_AUXSTMPL1 0x0B664 /* Auxiliary Time Stamp 1 Register Low - RO */