diff options
| author |   Antoine Tenart <antoine.tenart@bootlin.com> | 2019-03-01 11:52:11 +0100 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2019-03-01 23:23:34 -0800 |
| commit | 6b10bfc51c494e0a2b2c0871797a1d825da9997c (patch) | |
| tree | f44f280790727ed4aa78415a254bbfa82c97b95c /drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | |
| parent | net: mvpp2: some AN fields require the link to be down when updated (diff) | |
| download | linux-dev-6b10bfc51c494e0a2b2c0871797a1d825da9997c.tar.xz linux-dev-6b10bfc51c494e0a2b2c0871797a1d825da9997c.zip | |
net: mvpp2: always disable both MACs when disabling a port
This patch modifies the port_disable() helper to always disable both the
GMAC and the XLG MAC when called. At boot time we do not know of a port
was enabled in the firmware/bootloader, and if so what mode was used
(hence which of the two MACs was used).
This also help in implementing a logic where all blocks are disabled
when not used, and only enabled regarding the current mode used on a
given port.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c')
| -rw-r--r-- | drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index 908dfe86db92..e9cbbe871a1a 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -1213,11 +1213,11 @@ static void mvpp2_port_disable(struct mvpp2_port *port) /* Disable & reset should be done separately */ val &= ~MVPP22_XLG_CTRL0_MAC_RESET_DIS; writel(val, port->base + MVPP22_XLG_CTRL0_REG); - } else { - val = readl(port->base + MVPP2_GMAC_CTRL_0_REG); - val &= ~(MVPP2_GMAC_PORT_EN_MASK); - writel(val, port->base + MVPP2_GMAC_CTRL_0_REG); } + + val = readl(port->base + MVPP2_GMAC_CTRL_0_REG); + val &= ~(MVPP2_GMAC_PORT_EN_MASK); + writel(val, port->base + MVPP2_GMAC_CTRL_0_REG); } /* Set IEEE 802.3x Flow Control Xon Packet Transmission Mode */ |