diff options
| author |   Sunil Goutham <sgoutham@marvell.com> | 2018-10-10 18:14:22 +0530 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2018-10-10 10:06:01 -0700 |
| commit | 54d557815e15ab8c28b559e493604478605f9e6b (patch) | |
| tree | d34f7ac590d2fb6527132649c2b40393e0ad5ad0 /drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h | |
| parent | octeontx2-af: Add Marvell OcteonTX2 RVU AF driver (diff) | |
| download | linux-dev-54d557815e15ab8c28b559e493604478605f9e6b.tar.xz linux-dev-54d557815e15ab8c28b559e493604478605f9e6b.zip | |
octeontx2-af: Reset all RVU blocks
Go through all BLKADDRs and check which ones are implemented
on this silicon and do a HW reset of each implemented block.
Also added all RVU AF and PF register offsets.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h new file mode 100644 index 000000000000..9e11333cec34 --- /dev/null +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0 + * Marvell OcteonTx2 RVU Admin Function driver + * + * Copyright (C) 2018 Marvell International Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef RVU_STRUCT_H +#define RVU_STRUCT_H + +/* RVU Block Address Enumeration */ +enum rvu_block_addr_e { + BLKADDR_RVUM = 0x0ULL, + BLKADDR_LMT = 0x1ULL, + BLKADDR_MSIX = 0x2ULL, + BLKADDR_NPA = 0x3ULL, + BLKADDR_NIX0 = 0x4ULL, + BLKADDR_NIX1 = 0x5ULL, + BLKADDR_NPC = 0x6ULL, + BLKADDR_SSO = 0x7ULL, + BLKADDR_SSOW = 0x8ULL, + BLKADDR_TIM = 0x9ULL, + BLKADDR_CPT0 = 0xaULL, + BLKADDR_CPT1 = 0xbULL, + BLKADDR_NDC0 = 0xcULL, + BLKADDR_NDC1 = 0xdULL, + BLKADDR_NDC2 = 0xeULL, + BLK_COUNT = 0xfULL, +}; + +#endif /* RVU_STRUCT_H */ |