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| author |   Aya Levin <ayal@mellanox.com> | 2018-10-28 16:22:57 +0200 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@mellanox.com> | 2018-12-05 16:00:33 -0800 |
| commit | d930ac796fdb3eed62b0053297a728ced8fd58b1 (patch) | |
| tree | 62f4138a1200bb9d38bf3be56a72c0060d19b09a /drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | |
| parent | net/mlx5e: Move modify tirs hash functionality (diff) | |
| download | linux-dev-d930ac796fdb3eed62b0053297a728ced8fd58b1.tar.xz linux-dev-d930ac796fdb3eed62b0053297a728ced8fd58b1.zip | |
net/mlx5e: Refactor TIR configuration function
Refactor mlx5e_build_indir_tir_ctx_hash for better code re-use. TIR
stands for Transport Interface Receive, which is responsible for all
transport related operations on the receive side. Added a
static array with TIR default configuration values. This separates
configuration values from command setting, which is needed for
downstream patch.
Signed-off-by: Aya Levin <ayal@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c index fca6f4132c91..1025afc80f42 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c @@ -360,14 +360,15 @@ static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp) void *tirc; for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { + struct mlx5e_tirc_config ttconfig = mlx5e_tirc_get_default_config(tt); + memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in)); tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); MLX5_SET(tirc, tirc, transport_domain, hp->tdn); MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT); MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn); - mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false); - + mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, &ttconfig, tirc, false); err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]); if (err) { |