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| author |   Tariq Toukan <tariqt@mellanox.com> | 2018-04-04 12:54:23 +0300 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@mellanox.com> | 2018-05-25 14:11:00 -0700 |
| commit | 3a2f70331226c140e5aa27ee6bbe2a5c618acb4c (patch) | |
| tree | 46ae6213a04598f4a8df06ef920bf88d31207615 /drivers/net/ethernet/mellanox/mlx5/core/en_tx.c | |
| parent | net/mlx5i: Use compilation flag in IPOIB header (diff) | |
| download | linux-dev-3a2f70331226c140e5aa27ee6bbe2a5c618acb4c.tar.xz linux-dev-3a2f70331226c140e5aa27ee6bbe2a5c618acb4c.zip | |
net/mlx5: Use order-0 allocations for all WQ types
Complete the transition of all WQ types to use fragmented
order-0 coherent memory instead of high-order allocations.
CQ-WQ already uses order-0.
Here we do the same for cyclic and linked-list WQs.
This allows the driver to load cleanly on systems with a highly
fragmented coherent memory.
Performance tests:
ConnectX-5 100Gbps, CPU: Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz
Packet rate of 64B packets, single transmit ring, size 8K.
No degradation is sensed.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_tx.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c index fc68e72b0b2b..d37566be06e1 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c @@ -296,16 +296,16 @@ dma_unmap_wqe_err: return -ENOMEM; } -static inline void mlx5e_fill_sq_edge(struct mlx5e_txqsq *sq, - struct mlx5_wq_cyc *wq, - u16 pi) +static inline void mlx5e_fill_sq_frag_edge(struct mlx5e_txqsq *sq, + struct mlx5_wq_cyc *wq, + u16 pi, u16 frag_pi) { struct mlx5e_tx_wqe_info *edge_wi, *wi = &sq->db.wqe_info[pi]; - u8 nnops = mlx5_wq_cyc_get_size(wq) - pi; + u8 nnops = mlx5_wq_cyc_get_frag_size(wq) - frag_pi; edge_wi = wi + nnops; - /* fill sq edge with nops to avoid wqe wrap around */ + /* fill sq frag edge with nops to avoid wqe wrapping two pages */ for (; wi < edge_wi; wi++) { wi->skb = NULL; wi->num_wqebbs = 1; @@ -358,8 +358,8 @@ netdev_tx_t mlx5e_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb, unsigned char *skb_data = skb->data; unsigned int skb_len = skb->len; u16 ds_cnt, ds_cnt_inl = 0; + u16 headlen, ihs, frag_pi; u8 num_wqebbs, opcode; - u16 headlen, ihs; u32 num_bytes; int num_dma; __be16 mss; @@ -395,8 +395,9 @@ netdev_tx_t mlx5e_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb, } num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); - if (unlikely(pi + num_wqebbs > mlx5_wq_cyc_get_size(wq))) { - mlx5e_fill_sq_edge(sq, wq, pi); + frag_pi = mlx5_wq_cyc_ctr2fragix(wq, sq->pc); + if (unlikely(frag_pi + num_wqebbs > mlx5_wq_cyc_get_frag_size(wq))) { + mlx5e_fill_sq_frag_edge(sq, wq, pi, frag_pi); mlx5e_sq_fetch_wqe(sq, &wqe, &pi); } @@ -642,9 +643,9 @@ netdev_tx_t mlx5i_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb, unsigned char *skb_data = skb->data; unsigned int skb_len = skb->len; + u16 headlen, ihs, pi, frag_pi; u16 ds_cnt, ds_cnt_inl = 0; u8 num_wqebbs, opcode; - u16 headlen, ihs, pi; u32 num_bytes; int num_dma; __be16 mss; @@ -680,8 +681,9 @@ netdev_tx_t mlx5i_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb, } num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); - if (unlikely(pi + num_wqebbs > mlx5_wq_cyc_get_size(wq))) { - mlx5e_fill_sq_edge(sq, wq, pi); + frag_pi = mlx5_wq_cyc_ctr2fragix(wq, sq->pc); + if (unlikely(frag_pi + num_wqebbs > mlx5_wq_cyc_get_frag_size(wq))) { + mlx5e_fill_sq_frag_edge(sq, wq, pi, frag_pi); mlx5i_sq_fetch_wqe(sq, &wqe, &pi); } |