diff options
| author |   Roi Dayan <roid@mellanox.com> | 2018-11-11 17:50:16 +0200 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@mellanox.com> | 2018-12-14 13:28:51 -0800 |
| commit | ac004b8321281b9da7d9a99674241e60e49ffc8a (patch) | |
| tree | 694147318fb17bf9ff141550a57929ba7fce7d35 /drivers/net/ethernet/mellanox/mlx5/core/eswitch.h | |
| parent | net/mlx5: Introduce inter-device communication mechanism (diff) | |
| download | linux-dev-ac004b8321281b9da7d9a99674241e60e49ffc8a.tar.xz linux-dev-ac004b8321281b9da7d9a99674241e60e49ffc8a.zip | |
net/mlx5e: E-Switch, Add peer miss rules
In the sriov offloads mode, packets that are not matched by any
other rule are sent towards the e-switch vport manager for further
processing.
Under upcoming patches (e.g for uplink LAG), packets sent from VF
vports belonging to esw0 (e-switch related to PF0) might end up in
esw1 (e-switch related to PF1) due to muxing logic applied by the
FW.
In such a case we still want the missed packet to be sent to the
"base" esw manager vport in order to present the control plane a
consistent view of the source (VF reresentor) port.
Signed-off-by: Roi Dayan <roid@mellanox.com>
Signed-off-by: Aviv Heller <avivh@mellanox.com>
Signed-off-by: Shahar Klein <shahark@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/eswitch.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/eswitch.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h index 87c9dea9bccf..9dba6ad5744d 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h @@ -143,6 +143,8 @@ struct mlx5_eswitch_fdb { struct offloads_fdb { struct mlx5_flow_table *slow_fdb; struct mlx5_flow_group *send_to_vport_grp; + struct mlx5_flow_group *peer_miss_grp; + struct mlx5_flow_handle **peer_miss_rules; struct mlx5_flow_group *miss_grp; struct mlx5_flow_handle *miss_rule_uni; struct mlx5_flow_handle *miss_rule_multi; |