aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h
diff options
context:
space:
mode:
authorYevgeny Kliteynik <kliteyn@mellanox.com>2019-10-28 16:30:27 +0200
committerSaeed Mahameed <saeedm@mellanox.com>2019-11-22 13:18:19 -0800
commit6e9e286e4ad53311b51b28fdc4b952ab7d2520c4 (patch)
tree71bd4f74004b64c74e7abdd9ef181d9784f09ed6 /drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h
parentnet/mlx5: Don't write read-only fields in MODIFY_HCA_VPORT_CONTEXT command (diff)
downloadlinux-dev-6e9e286e4ad53311b51b28fdc4b952ab7d2520c4.tar.xz
linux-dev-6e9e286e4ad53311b51b28fdc4b952ab7d2520c4.zip
net/mlx5: DR, Refactor VXLAN GPE flex parser tunnel code for SW steering
Refactor flex parser tunnel code: - Add definition for flex parser tunneling header for VXLAN-GPE - Use macros for VXLAN-GPE SW steering when building STE - Refactor the code to reflect that this is a VXLAN GPE only code and not a general flex parser code. This also significantly simplifies addition of more flex parser protocols, such as Geneve. Signed-off-by: Yevgeny Kliteynik <kliteyn@mellanox.com> Reviewed-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to '')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h
index 596c927220d9..6d78b027fe56 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h
@@ -548,6 +548,17 @@ struct mlx5_ifc_ste_flex_parser_tnl_bits {
u8 reserved_at_40[0x40];
};
+struct mlx5_ifc_ste_flex_parser_tnl_vxlan_gpe_bits {
+ u8 outer_vxlan_gpe_flags[0x8];
+ u8 reserved_at_8[0x10];
+ u8 outer_vxlan_gpe_next_protocol[0x8];
+
+ u8 outer_vxlan_gpe_vni[0x18];
+ u8 reserved_at_38[0x8];
+
+ u8 reserved_at_40[0x40];
+};
+
struct mlx5_ifc_ste_general_purpose_bits {
u8 general_purpose_lookup_field[0x20];