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authorVadim Pasternak <vadimp@mellanox.com>2016-11-16 15:20:43 +0100
committerDavid S. Miller <davem@davemloft.net>2016-11-16 23:29:04 -0500
commitc711e27a1851c5efe9eb43365d6a3ffaf6d5f37f (patch)
tree5b4f744f6eacd60b20535055ec4c3012f941019f /drivers/net/ethernet/mellanox/mlxsw/pci.c
parentnet: netcp: replace IS_ERR_OR_NULL by IS_ERR (diff)
downloadlinux-dev-c711e27a1851c5efe9eb43365d6a3ffaf6d5f37f.tar.xz
linux-dev-c711e27a1851c5efe9eb43365d6a3ffaf6d5f37f.zip
mlxsw: Add bus capability flag
The mlxsw core infrastructure currently assumes that communication with the ASIC is always possible using Ethernet management datagrams (EMADs), but this is only possible when the PCI bus is used. The bus capability flag is added to indicate EMAD support and make core initialize EMAD communication only when it's set. Otherwise, register access is done using command interface. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
-rw-r--r--drivers/net/ethernet/mellanox/mlxsw/pci.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c
index d5cf1ea1c89a..a223c85dfde0 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/pci.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c
@@ -1755,6 +1755,7 @@ static const struct mlxsw_bus mlxsw_pci_bus = {
.skb_transmit_busy = mlxsw_pci_skb_transmit_busy,
.skb_transmit = mlxsw_pci_skb_transmit,
.cmd_exec = mlxsw_pci_cmd_exec,
+ .features = MLXSW_BUS_F_TXRX,
};
static int mlxsw_pci_sw_reset(struct mlxsw_pci *mlxsw_pci,