diff options
| author |   Antoine Tenart <antoine.tenart@bootlin.com> | 2019-08-12 16:45:34 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2019-08-15 16:31:11 -0700 |
| commit | 45bce1719cbd1ad3fb48f840accb1d120b6b0209 (patch) | |
| tree | 25311896df07ed90c4d86f078cd3dcc9ec5e2764 /drivers/net/ethernet/mscc/ocelot_regs.c | |
| parent | Documentation/bindings: net: ocelot: document the PTP ready IRQ (diff) | |
| download | linux-dev-45bce1719cbd1ad3fb48f840accb1d120b6b0209.tar.xz linux-dev-45bce1719cbd1ad3fb48f840accb1d120b6b0209.zip | |
net: mscc: describe the PTP register range
This patch adds support for using the PTP register range, and adds a
description of its registers. This bank is used when configuring PTP.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mscc/ocelot_regs.c')
| -rw-r--r-- | drivers/net/ethernet/mscc/ocelot_regs.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mscc/ocelot_regs.c b/drivers/net/ethernet/mscc/ocelot_regs.c index 6c387f994ec5..e59977d20400 100644 --- a/drivers/net/ethernet/mscc/ocelot_regs.c +++ b/drivers/net/ethernet/mscc/ocelot_regs.c @@ -234,6 +234,16 @@ static const u32 ocelot_s2_regmap[] = { REG(S2_CACHE_TG_DAT, 0x000388), }; +static const u32 ocelot_ptp_regmap[] = { + REG(PTP_PIN_CFG, 0x000000), + REG(PTP_PIN_TOD_SEC_MSB, 0x000004), + REG(PTP_PIN_TOD_SEC_LSB, 0x000008), + REG(PTP_PIN_TOD_NSEC, 0x00000c), + REG(PTP_CFG_MISC, 0x0000a0), + REG(PTP_CLK_CFG_ADJ_CFG, 0x0000a4), + REG(PTP_CLK_CFG_ADJ_FREQ, 0x0000a8), +}; + static const u32 *ocelot_regmap[] = { [ANA] = ocelot_ana_regmap, [QS] = ocelot_qs_regmap, @@ -241,6 +251,7 @@ static const u32 *ocelot_regmap[] = { [REW] = ocelot_rew_regmap, [SYS] = ocelot_sys_regmap, [S2] = ocelot_s2_regmap, + [PTP] = ocelot_ptp_regmap, }; static const struct reg_field ocelot_regfields[] = { |