diff options
| author |   Alex Elder <elder@linaro.org> | 2020-11-16 17:37:58 -0600 |
|---|---|---|
| committer |   Jakub Kicinski <kuba@kernel.org> | 2020-11-18 15:53:48 -0800 |
| commit | f3ae1616c54de852720b2cad5746c5fa770a45d6 (patch) | |
| tree | 26feaf19ac715db5931f65caf985be9bd5f0622d /drivers/net/ipa/ipa_reg.h | |
| parent | net: ipa: support more versions for HOLB timer (diff) | |
| download | linux-dev-f3ae1616c54de852720b2cad5746c5fa770a45d6.tar.xz linux-dev-f3ae1616c54de852720b2cad5746c5fa770a45d6.zip | |
net: ipa: fix two inconsistent IPA register names
Rename two suspend IRQ registers so they follow the IPA_REG_IRQ_xxx
naming convention used elsewhere.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ipa/ipa_reg.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h index b46e60744f57..e24c19066513 100644 --- a/drivers/net/ipa/ipa_reg.h +++ b/drivers/net/ipa/ipa_reg.h @@ -454,17 +454,17 @@ static inline u32 rsrc_grp_encoded(enum ipa_version version, u32 rsrc_grp) (0x00003030 + 0x1000 * (ee)) /* ipa->available defines the valid bits in the SUSPEND_INFO register */ -#define IPA_REG_SUSPEND_IRQ_EN_OFFSET \ - IPA_REG_SUSPEND_IRQ_EN_EE_N_OFFSET(GSI_EE_AP) -#define IPA_REG_SUSPEND_IRQ_EN_EE_N_OFFSET(ee) \ +#define IPA_REG_IRQ_SUSPEND_EN_OFFSET \ + IPA_REG_IRQ_SUSPEND_EN_EE_N_OFFSET(GSI_EE_AP) +#define IPA_REG_IRQ_SUSPEND_EN_EE_N_OFFSET(ee) \ (0x00003034 + 0x1000 * (ee)) -/* ipa->available defines the valid bits in the SUSPEND_IRQ_EN register */ +/* ipa->available defines the valid bits in the IRQ_SUSPEND_EN register */ -#define IPA_REG_SUSPEND_IRQ_CLR_OFFSET \ - IPA_REG_SUSPEND_IRQ_CLR_EE_N_OFFSET(GSI_EE_AP) -#define IPA_REG_SUSPEND_IRQ_CLR_EE_N_OFFSET(ee) \ +#define IPA_REG_IRQ_SUSPEND_CLR_OFFSET \ + IPA_REG_IRQ_SUSPEND_CLR_EE_N_OFFSET(GSI_EE_AP) +#define IPA_REG_IRQ_SUSPEND_CLR_EE_N_OFFSET(ee) \ (0x00003038 + 0x1000 * (ee)) -/* ipa->available defines the valid bits in the SUSPEND_IRQ_CLR register */ +/* ipa->available defines the valid bits in the IRQ_SUSPEND_CLR register */ /** enum ipa_cs_offload_en - checksum offload field in ENDP_INIT_CFG_N */ enum ipa_cs_offload_en { |