diff options
| author |   Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> | 2009-02-06 21:46:54 -0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2009-02-06 21:46:54 -0800 |
| commit | 0ecc061d1967e9f2694502079e00d9d6e1e39072 (patch) | |
| tree | 40a06f43717f97d6dade8fbb55bad15740033799 /drivers/net/ixgbe/ixgbe_type.h | |
| parent | forcedeth: enable msix to default (diff) | |
| download | linux-dev-0ecc061d1967e9f2694502079e00d9d6e1e39072.tar.xz linux-dev-0ecc061d1967e9f2694502079e00d9d6e1e39072.zip | |
ixgbe: Update flow control state machine in link setup
The flow control handling is overly complicated and difficult to maintain.
This patch cleans up the flow control handling and makes it much more
explicit. It also adds 1G flow control autonegotiation, for 1G copper
links, 1G KX links, and 1G fiber links.
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ixgbe/ixgbe_type.h | 29 |
1 files changed, 26 insertions, 3 deletions
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h index 984b4ed372f1..237c688f8b6e 100644 --- a/drivers/net/ixgbe/ixgbe_type.h +++ b/drivers/net/ixgbe/ixgbe_type.h @@ -771,6 +771,28 @@ #define IXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */ #define IXGBE_AUTO_NEG_TIME 45 /* 4.5 Seconds */ +#define FIBER_LINK_UP_LIMIT 50 + +/* PCS1GLSTA Bit Masks */ +#define IXGBE_PCS1GLSTA_LINK_OK 1 +#define IXGBE_PCS1GLSTA_SYNK_OK 0x10 +#define IXGBE_PCS1GLSTA_AN_COMPLETE 0x10000 +#define IXGBE_PCS1GLSTA_AN_PAGE_RX 0x20000 +#define IXGBE_PCS1GLSTA_AN_TIMED_OUT 0x40000 +#define IXGBE_PCS1GLSTA_AN_REMOTE_FAULT 0x80000 +#define IXGBE_PCS1GLSTA_AN_ERROR_RWS 0x100000 + +#define IXGBE_PCS1GANA_SYM_PAUSE 0x80 +#define IXGBE_PCS1GANA_ASM_PAUSE 0x100 + +/* PCS1GLCTL Bit Masks */ +#define IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN 0x00040000 /* PCS 1G autoneg to en */ +#define IXGBE_PCS1GLCTL_FLV_LINK_UP 1 +#define IXGBE_PCS1GLCTL_FORCE_LINK 0x20 +#define IXGBE_PCS1GLCTL_LOW_LINK_LATCH 0x40 +#define IXGBE_PCS1GLCTL_AN_ENABLE 0x10000 +#define IXGBE_PCS1GLCTL_AN_RESTART 0x20000 + /* SW Semaphore Register bitmasks */ #define IXGBE_SWSM_SMBI 0x00000001 /* Driver Semaphore bit */ #define IXGBE_SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */ @@ -1270,7 +1292,7 @@ enum ixgbe_media_type { }; /* Flow Control Settings */ -enum ixgbe_fc_type { +enum ixgbe_fc_mode { ixgbe_fc_none = 0, ixgbe_fc_rx_pause, ixgbe_fc_tx_pause, @@ -1294,8 +1316,8 @@ struct ixgbe_fc_info { u16 pause_time; /* Flow Control Pause timer */ bool send_xon; /* Flow control send XON */ bool strict_ieee; /* Strict IEEE mode */ - enum ixgbe_fc_type type; /* Type of flow control */ - enum ixgbe_fc_type original_type; + enum ixgbe_fc_mode current_mode; /* FC mode in effect */ + enum ixgbe_fc_mode requested_mode; /* FC mode requested by caller */ }; /* Statistics counters collected by the MAC */ @@ -1475,6 +1497,7 @@ struct ixgbe_phy_info { bool reset_disable; ixgbe_autoneg_advertised autoneg_advertised; bool autoneg_wait_to_complete; + bool multispeed_fiber; }; struct ixgbe_hw { |