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authorRussell King <rmk+kernel@armlinux.org.uk>2019-12-13 18:22:07 +0000
committerDavid S. Miller <davem@davemloft.net>2019-12-17 13:26:33 -0800
commitdf3f57ac960590f4e87ec71549efd49bbfdb25d0 (patch)
treece3c6a583154765784f9cbf49069284e5a0034f8 /drivers/net/phy/phylink.c
parentnet: phylink: improve clause 45 PHY ksettings_set implementation (diff)
downloadlinux-dev-df3f57ac960590f4e87ec71549efd49bbfdb25d0.tar.xz
linux-dev-df3f57ac960590f4e87ec71549efd49bbfdb25d0.zip
net: phylink: extend clause 45 PHY validation workaround
Commit e45d1f5288b8 ("net: phylink: support Clause 45 PHYs on SFP+ modules") added a workaround to support clause 45 PHYs which dynamically switch their interface mode on SFP+ modules. This was implemented by validating the PHYs supported/advertising using PHY_INTERFACE_MODE_NA, rather than the specific interface mode that we attached the PHY with. However, we already have a situation where phylink is used to connect a Marvell 88X3310 PHY which also behaves in exactly the same way, but which seemingly doesn't need this. The reason seems to be that the mvpp2 driver sets a whole bunch of link modes for PHY_INTERFACE_MODE_10GKR down to 10Mb/s, despite 10GBASE-R not actually supporting anything but 10Gb/s speeds. When testing with drivers that (correctly) take the mvneta approach, where the validate() method only returns what can be supported / advertised for the specified link mode, we find that Clause 45 PHYs do not behave as we expect: their advertisement is restricted to what the current link will support, rather than what the PHY supports through its dynamic switching. Extend this workaround to all such cases; if we have a Clause 45 PHY attaching via any means, except in USXGMII, XAUI and RXAUI which are all unable to support this dynamic switching or have other solutions to it, then we need to validate using PHY_INTERFACE_MODE_NA. This should allow mvpp2 to switch to a more conformant validate() implementation. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/phylink.c')
-rw-r--r--drivers/net/phy/phylink.c22
1 files changed, 13 insertions, 9 deletions
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 8f3dc27db95d..a917f95372cd 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -736,7 +736,19 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
memset(&config, 0, sizeof(config));
linkmode_copy(supported, phy->supported);
linkmode_copy(config.advertising, phy->advertising);
- config.interface = interface;
+
+ /* Clause 45 PHYs switch their Serdes lane between several different
+ * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
+ * speeds. We really need to know which interface modes the PHY and
+ * MAC supports to properly work out which linkmodes can be supported.
+ */
+ if (phy->is_c45 &&
+ interface != PHY_INTERFACE_MODE_RXAUI &&
+ interface != PHY_INTERFACE_MODE_XAUI &&
+ interface != PHY_INTERFACE_MODE_USXGMII)
+ config.interface = PHY_INTERFACE_MODE_NA;
+ else
+ config.interface = interface;
ret = phylink_validate(pl, supported, &config);
if (ret)
@@ -1902,14 +1914,6 @@ static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
if (ret < 0)
return ret;
- /* Clause 45 PHYs switch their Serdes lane between several different
- * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
- * speeds. We really need to know which interface modes the PHY and
- * MAC supports to properly work out which linkmodes can be supported.
- */
- if (phy->is_c45)
- interface = PHY_INTERFACE_MODE_NA;
-
ret = phylink_bringup_phy(pl, phy, interface);
if (ret)
phy_detach(phy);