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| author |   Russell King <rmk+kernel@armlinux.org.uk> | 2020-01-03 20:43:23 +0000 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2020-01-05 15:05:35 -0800 |
| commit | e0f909bc3a242296da9ccff78277f26d4883a79d (patch) | |
| tree | 030546ddba4271e8f33cbcf6e98b9e89a63b2d34 /drivers/net/phy/phylink.c | |
| parent | net: phy: add PHY_INTERFACE_MODE_10GBASER (diff) | |
| download | linux-dev-e0f909bc3a242296da9ccff78277f26d4883a79d.tar.xz linux-dev-e0f909bc3a242296da9ccff78277f26d4883a79d.zip | |
net: switch to using PHY_INTERFACE_MODE_10GBASER rather than 10GKR
Switch network drivers, phy drivers, and SFP/phylink over to use the
more correct 10GBASE-R, rather than 10GBASE-KR. 10GBASE-KR is backplane
ethernet, which is 10GBASE-R with autonegotiation on top, which our
current usage on the affected platforms does not have.
The only remaining user of PHY_INTERFACE_MODE_10GKR is the Aquantia
PHY, which has a separate mode for 10GBASE-KR.
For Marvell mvpp2, we detect 10GBASE-KR, and rewrite it to 10GBASE-R
for compatibility with existing DT - this is the only network driver
at present that makes use of PHY_INTERFACE_MODE_10GKR.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/phy/phylink.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 3f7fa634134a..1edca9725370 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -298,6 +298,7 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) break; case PHY_INTERFACE_MODE_10GKR: + case PHY_INTERFACE_MODE_10GBASER: phylink_set(pl->supported, 10baseT_Half); phylink_set(pl->supported, 10baseT_Full); phylink_set(pl->supported, 100baseT_Half); |