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authorDavid S. Miller <davem@davemloft.net>2020-01-19 22:10:04 +0100
committerDavid S. Miller <davem@davemloft.net>2020-01-19 22:10:04 +0100
commitb3f7e3f23a763ccaae7b52d88d2c91e66c80d406 (patch)
treee00e90eb161305ed9895315ba12e30ac17de9523 /drivers/net/phy
parentMerge branch 'mlxsw-Add-tunnel-devlink-trap-support' (diff)
parentMerge tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (diff)
downloadlinux-dev-b3f7e3f23a763ccaae7b52d88d2c91e66c80d406.tar.xz
linux-dev-b3f7e3f23a763ccaae7b52d88d2c91e66c80d406.zip
Merge ra.kernel.org:/pub/scm/linux/kernel/git/netdev/net
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/Kconfig8
-rw-r--r--drivers/net/phy/dp83867.c8
2 files changed, 11 insertions, 5 deletions
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index ac82ff959b7c..6b5ee26795a2 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -346,14 +346,14 @@ config DAVICOM_PHY
Currently supports dm9161e and dm9131
config DP83822_PHY
- tristate "Texas Instruments DP83822 PHY"
+ tristate "Texas Instruments DP83822/825 PHYs"
---help---
- Supports the DP83822 PHY.
+ Supports the DP83822 and DP83825I PHYs.
config DP83TC811_PHY
- tristate "Texas Instruments DP83TC822 PHY"
+ tristate "Texas Instruments DP83TC811 PHY"
---help---
- Supports the DP83TC822 PHY.
+ Supports the DP83TC811 PHY.
config DP83848_PHY
tristate "Texas Instruments DP83848 PHY"
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index adda0d0eab80..967f57ed0b65 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -99,6 +99,7 @@
#define DP83867_PHYCR_TX_FIFO_DEPTH_MASK GENMASK(15, 14)
#define DP83867_PHYCR_RX_FIFO_DEPTH_MASK GENMASK(13, 12)
#define DP83867_PHYCR_RESERVED_MASK BIT(11)
+#define DP83867_PHYCR_FORCE_LINK_GOOD BIT(10)
/* RGMIIDCTL bits */
#define DP83867_RGMII_TX_CLK_DELAY_MAX 0xf
@@ -635,7 +636,12 @@ static int dp83867_phy_reset(struct phy_device *phydev)
usleep_range(10, 20);
- return 0;
+ /* After reset FORCE_LINK_GOOD bit is set. Although the
+ * default value should be unset. Disable FORCE_LINK_GOOD
+ * for the phy to work properly.
+ */
+ return phy_modify(phydev, MII_DP83867_PHYCTRL,
+ DP83867_PHYCR_FORCE_LINK_GOOD, 0);
}
static struct phy_driver dp83867_driver[] = {