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authorMichael Chan <mchan@broadcom.com>2005-08-09 20:16:32 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2005-08-29 15:50:12 -0700
commit2009493065e01b1fe27c1b98ffbcfab98e185f72 (patch)
tree8a8981461a4f84a007f4725a027f3185055737ea /drivers/net/tg3.h
parent[CCID3]: Reenable list_for_each_entry_safe_continue usage (diff)
downloadlinux-dev-2009493065e01b1fe27c1b98ffbcfab98e185f72.tar.xz
linux-dev-2009493065e01b1fe27c1b98ffbcfab98e185f72.zip
[TG3]: Add basic register access function pointers
This patch adds the basic function pointers to do register accesses in the fast path. This was suggested by David Miller. The idea is that various register access methods for different hardware errata can easily be implemented with these function pointers and performance will not be degraded on chips that use normal register access methods. The various register read write macros (e.g. tw32, tr32, tw32_mailbox) are redefined to call the function pointers. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
-rw-r--r--drivers/net/tg3.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 5c4433c147fa..394acddd53b3 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2049,6 +2049,10 @@ struct tg3 {
spinlock_t lock;
spinlock_t indirect_lock;
+ u32 (*read32) (struct tg3 *, u32);
+ void (*write32) (struct tg3 *, u32, u32);
+ void (*write32_mbox) (struct tg3 *, u32,
+ u32);
void __iomem *regs;
struct net_device *dev;
struct pci_dev *pdev;
@@ -2060,6 +2064,8 @@ struct tg3 {
u32 msg_enable;
/* begin "tx thread" cacheline section */
+ void (*write32_tx_mbox) (struct tg3 *, u32,
+ u32);
u32 tx_prod;
u32 tx_cons;
u32 tx_pending;
@@ -2071,6 +2077,8 @@ struct tg3 {
dma_addr_t tx_desc_mapping;
/* begin "rx thread" cacheline section */
+ void (*write32_rx_mbox) (struct tg3 *, u32,
+ u32);
u32 rx_rcb_ptr;
u32 rx_std_ptr;
u32 rx_jumbo_ptr;