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| author |   Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2015-06-09 18:47:14 +0200 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2015-06-10 13:59:40 +0200 |
| commit | 9e05db29e2ac7f1fec1a4d15db8c419634290535 (patch) | |
| tree | 8906e5703d7366c8f6ffa22eb3201d4f00957289 /drivers/pinctrl/mvebu/pinctrl-armada-370.c | |
| parent | pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet (diff) | |
| download | linux-dev-9e05db29e2ac7f1fec1a4d15db8c419634290535.tar.xz linux-dev-9e05db29e2ac7f1fec1a4d15db8c419634290535.zip | |
pinctrl: mvebu: armada-370: align spi1 clock pin naming
Across all SoCs, even on Armada 370 for SPI0, the clock pin uses the
'sck' subname and not 'clk', so this commit adjusts the code and
documentation accordingly.
Since this commit only changes the subname, DT backward compatibility
is not affected.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-armada-370.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c index fc16ef6e2435..c2e5e4de49c3 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c @@ -57,7 +57,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = { MPP_FUNCTION(0x0, "gpo", NULL), MPP_FUNCTION(0x1, "ge0", "txclkout"), MPP_FUNCTION(0x2, "uart1", "txd"), - MPP_FUNCTION(0x4, "spi1", "clk"), + MPP_FUNCTION(0x4, "spi1", "sck"), MPP_FUNCTION(0x5, "audio", "mclk")), MPP_MODE(6, MPP_FUNCTION(0x0, "gpio", NULL), |