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authorGregory CLEMENT <gregory.clement@bootlin.com>2019-11-15 16:57:52 +0100
committerLinus Walleij <linus.walleij@linaro.org>2019-11-21 14:54:49 +0100
commit04fb02757ae5188031eb71b2f6f189edb1caf5dc (patch)
treec1ff3eddc07924c46933c3ea3c3cd909ec339a70 /drivers/pinctrl
parentdt-bindings: pinctrl: intel: Add for new SoC (diff)
downloadlinux-dev-04fb02757ae5188031eb71b2f6f189edb1caf5dc.tar.xz
linux-dev-04fb02757ae5188031eb71b2f6f189edb1caf5dc.zip
pinctrl: armada-37xx: Fix irq mask access in armada_37xx_irq_set_type()
As explained in the following commit a9a1a4833613 ("pinctrl: armada-37xx: Fix gpio interrupt setup") the armada_37xx_irq_set_type() function can be called before the initialization of the mask field. That means that we can't use this field in this function and need to workaround it using hwirq. Fixes: 30ac0d3b0702 ("pinctrl: armada-37xx: Add edge both type gpio irq support") Cc: stable@vger.kernel.org Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191115155752.2562-1-gregory.clement@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-armada-37xx.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 9df4277a16be..aa9dcde0f069 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -595,10 +595,10 @@ static int armada_37xx_irq_set_type(struct irq_data *d, unsigned int type)
regmap_read(info->regmap, in_reg, &in_val);
/* Set initial polarity based on current input level. */
- if (in_val & d->mask)
- val |= d->mask; /* falling */
+ if (in_val & BIT(d->hwirq % GPIO_PER_REG))
+ val |= BIT(d->hwirq % GPIO_PER_REG); /* falling */
else
- val &= ~d->mask; /* rising */
+ val &= ~(BIT(d->hwirq % GPIO_PER_REG)); /* rising */
break;
}
default: