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| author |   Peter Oberparleiter <oberpar@linux.vnet.ibm.com> | 2015-12-18 12:59:32 +0100 |
|---|---|---|
| committer |   Martin Schwidefsky <schwidefsky@de.ibm.com> | 2015-12-18 14:59:34 +0100 |
| commit | 2ab59de7c5ce7c5ed6db07278554901d43fe80a0 (patch) | |
| tree | c5db8208dddcca4e9228f5ec57d6f80cc58b8232 /drivers/s390/cio/ioasm.h | |
| parent | s390/cio: Fix incorrect xsch opcode specification (diff) | |
| download | linux-dev-2ab59de7c5ce7c5ed6db07278554901d43fe80a0.tar.xz linux-dev-2ab59de7c5ce7c5ed6db07278554901d43fe80a0.zip | |
s390/cio: Consolidate inline assemblies and related data definitions
Replace the current semi-arbitrary distribution of inline assemblies:
- Inline assemblies used by CIO go into ioasm.h
- Data definitions used by inline assemblies go into cio.h
Beyond cleaning up the current structure this is also required for
use of tracepoints in inline assemblies introduced by a follow-on
patch.
Signed-off-by: Peter Oberparleiter <oberpar@linux.vnet.ibm.com>
Acked-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to '')
| -rw-r--r-- | drivers/s390/cio/ioasm.h | 75 |
1 files changed, 60 insertions, 15 deletions
diff --git a/drivers/s390/cio/ioasm.h b/drivers/s390/cio/ioasm.h index be6e2f5e11f7..dce25500812a 100644 --- a/drivers/s390/cio/ioasm.h +++ b/drivers/s390/cio/ioasm.h @@ -3,25 +3,11 @@ #include <asm/chpid.h> #include <asm/schid.h> +#include <asm/crw.h> #include "orb.h" #include "cio.h" /* - * TPI info structure - */ -struct tpi_info { - struct subchannel_id schid; - __u32 intparm; /* interruption parameter */ - __u32 adapter_IO : 1; - __u32 reserved2 : 1; - __u32 isc : 3; - __u32 reserved3 : 12; - __u32 int_type : 3; - __u32 reserved4 : 12; -} __attribute__ ((packed)); - - -/* * Some S390 specific IO instructions as inline */ @@ -149,4 +135,63 @@ static inline int rchp(struct chp_id chpid) return ccode; } +static inline int rsch(struct subchannel_id schid) +{ + register struct subchannel_id reg1 asm("1") = schid; + int ccode; + + asm volatile( + " rsch\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) + : "d" (reg1) + : "cc", "memory"); + return ccode; +} + +static inline int hsch(struct subchannel_id schid) +{ + register struct subchannel_id reg1 asm("1") = schid; + int ccode; + + asm volatile( + " hsch\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) + : "d" (reg1) + : "cc"); + return ccode; +} + +static inline int xsch(struct subchannel_id schid) +{ + register struct subchannel_id reg1 asm("1") = schid; + int ccode; + + asm volatile( + " xsch\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) + : "d" (reg1) + : "cc"); + return ccode; +} + +static inline int stcrw(struct crw *crw) +{ + int ccode; + + asm volatile( + " stcrw 0(%2)\n" + " ipm %0\n" + " srl %0,28\n" + : "=d" (ccode), "=m" (*crw) + : "a" (crw) + : "cc"); + return ccode; +} + #endif |