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| author |   Evan Quan <evan.quan@amd.com> | 2019-07-12 10:32:02 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-07-17 13:34:30 -0500 |
| commit | 7ef65bbd01fd59b749e8bd5b19d0c01e315fef8d (patch) | |
| tree | f21d1676b206fc840a7aa4cbfa23eca23761078b /drivers | |
| parent | drm/amd/powerplay: fix memory allocation failure check V2 (diff) | |
| download | linux-dev-7ef65bbd01fd59b749e8bd5b19d0c01e315fef8d.tar.xz linux-dev-7ef65bbd01fd59b749e8bd5b19d0c01e315fef8d.zip | |
drm/amd/powerplay: avoid access before allocation
No access before allocation.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c index 3c605257b89c..6d267aeacda3 100644 --- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c @@ -441,7 +441,6 @@ static int vega20_store_powerplay_table(struct smu_context *smu) { ATOM_Vega20_POWERPLAYTABLE *powerplay_table = NULL; struct smu_table_context *table_context = &smu->smu_table; - int ret; if (!table_context->power_play_table) return -EINVAL; @@ -455,9 +454,7 @@ static int vega20_store_powerplay_table(struct smu_context *smu) table_context->thermal_controller_type = powerplay_table->ucThermalControllerType; table_context->TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPERCENTAGE]); - ret = vega20_setup_od8_information(smu); - - return ret; + return 0; } static int vega20_append_powerplay_table(struct smu_context *smu) @@ -1507,6 +1504,12 @@ static int vega20_set_default_od8_setttings(struct smu_context *smu) smu->od_settings = (void *)od8_settings; + ret = vega20_setup_od8_information(smu); + if (ret) { + pr_err("Retrieve board OD limits failed!\n"); + return ret; + } + if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { if (od8_settings->od_feature_capabilities[ATOM_VEGA20_ODFEATURE_GFXCLK_LIMITS] && od8_settings->od_settings_max[OD8_SETTING_GFXCLK_FMAX] > 0 && |