diff options
author | Dave Stevenson <dave.stevenson@raspberrypi.com> | 2020-12-03 14:25:37 +0100 |
---|---|---|
committer | Maxime Ripard <maxime@cerno.tech> | 2020-12-07 10:33:20 +0100 |
commit | e02d5c43f2fdf7d71935de16e8c91b2cd3139f71 (patch) | |
tree | 0a85302fe9faed34de649bc217fafdc2d4702bd4 /drivers | |
parent | drm/vc4: drv: Remove the DSI pointer in vc4_drv (diff) | |
download | linux-dev-e02d5c43f2fdf7d71935de16e8c91b2cd3139f71.tar.xz linux-dev-e02d5c43f2fdf7d71935de16e8c91b2cd3139f71.zip |
drm/vc4: dsi: Correct DSI register definition
The DSI1_PHY_AFEC0_PD_DLANE1 and DSI1_PHY_AFEC0_PD_DLANE3 register
definitions were swapped, so trying to use more than a single data
lane failed as lane 1 would get powered down.
(In theory a 4 lane device would work as all lanes would remain
powered).
Correct the definitions.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-3-maxime@cerno.tech
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/vc4/vc4_dsi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c index b1d8765795f1..bb316e6cc12b 100644 --- a/drivers/gpu/drm/vc4/vc4_dsi.c +++ b/drivers/gpu/drm/vc4/vc4_dsi.c @@ -306,11 +306,11 @@ # define DSI0_PHY_AFEC0_RESET BIT(11) # define DSI1_PHY_AFEC0_PD_BG BIT(11) # define DSI0_PHY_AFEC0_PD BIT(10) -# define DSI1_PHY_AFEC0_PD_DLANE3 BIT(10) +# define DSI1_PHY_AFEC0_PD_DLANE1 BIT(10) # define DSI0_PHY_AFEC0_PD_BG BIT(9) # define DSI1_PHY_AFEC0_PD_DLANE2 BIT(9) # define DSI0_PHY_AFEC0_PD_DLANE1 BIT(8) -# define DSI1_PHY_AFEC0_PD_DLANE1 BIT(8) +# define DSI1_PHY_AFEC0_PD_DLANE3 BIT(8) # define DSI_PHY_AFEC0_PTATADJ_MASK VC4_MASK(7, 4) # define DSI_PHY_AFEC0_PTATADJ_SHIFT 4 # define DSI_PHY_AFEC0_CTATADJ_MASK VC4_MASK(3, 0) |