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| author |   Todd Poynor <tpoynor@mvista.com> | 2005-07-01 11:27:06 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@arm.linux.org.uk> | 2005-07-01 11:27:06 +0100 |
| commit | 3e18a45abc5b20db2e34f02b87226ac2713bbb13 (patch) | |
| tree | 1d0821530b802c1dd9bc20b09e7c5485f113201b /include/asm-arm/arch-pxa/pxa-regs.h | |
| parent | [PATCH] ARM: 2781/2: PXA27x Standby mode take 2 (diff) | |
| download | linux-dev-3e18a45abc5b20db2e34f02b87226ac2713bbb13.tar.xz linux-dev-3e18a45abc5b20db2e34f02b87226ac2713bbb13.zip | |
[PATCH] ARM: 2782/1: PXA27x MDREFR K0DB4 define
Patch from Todd Poynor
Add definition of K0DB4 SDCLK<0,3> divide-by-4 control/status bit in the
MDREFR register for Intel XScale PXA27x.
Signed-off-by: Todd Poynor <tpoynor@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to '')
| -rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 803dc92c9038..51f0fe0ac165 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1966,6 +1966,7 @@ #define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */ #define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */ +#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */ #define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ #define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ #define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */ |