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authorRoman Tereshonkov <roman.tereshonkov@nokia.com>2008-03-13 21:35:09 +0200
committerTony Lindgren <tony@atomide.com>2008-04-14 10:29:39 -0700
commit3760d31f11bfbd0ead9eaeb8573e0602437a9d7c (patch)
treefdb1d97cec8ed3f8d40bbcdabdca55fcbd26ce21 /include/asm-arm/arch-s3c2410
parentARM: OMAP2: Add 34xx clock code (diff)
downloadlinux-dev-3760d31f11bfbd0ead9eaeb8573e0602437a9d7c.tar.xz
linux-dev-3760d31f11bfbd0ead9eaeb8573e0602437a9d7c.zip
ARM: OMAP2: New DPLL clock framework
These changes is the result of the discussion with Paul Walmsley. His ideas are included into this patch. Remove DPLL output divider handling from DPLLs and CLKOUTX2 clocks, and place it into specific DPLL output divider clocks (e.g., dpll3_m2_clk). omap2_get_dpll_rate() now returns the correct DPLL rate, as represented by the DPLL's CLKOUT output. Also add MPU and IVA2 subsystem clocks, along with high-frequency bypass support. Add support for DPLLs function in locked and bypass clock modes. Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'include/asm-arm/arch-s3c2410')
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