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| author |   Ralf Baechle <ralf@linux-mips.org> | 2007-06-20 22:27:10 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-06-20 22:27:10 +0100 |
| commit | 3b1d4ed5353af04d6aa20be2701727b9cdb2ac61 (patch) | |
| tree | e4a3335c925abd933f1650e1ee4786e6bfad8f35 /include/asm-mips/mips-boards/simint.h | |
| parent | [POWERPC] rheap - eliminates internal fragments caused by alignment (diff) | |
| download | linux-dev-3b1d4ed5353af04d6aa20be2701727b9cdb2ac61.tar.xz linux-dev-3b1d4ed5353af04d6aa20be2701727b9cdb2ac61.zip | |
[MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict. So that's the one-liner.
The rest is 10 square kilometers of collateral damage fixup this include
used to paper over.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to '')
| -rw-r--r-- | include/asm-mips/mips-boards/simint.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/include/asm-mips/mips-boards/simint.h b/include/asm-mips/mips-boards/simint.h index 54f2fe621d69..8ef6db76d5c1 100644 --- a/include/asm-mips/mips-boards/simint.h +++ b/include/asm-mips/mips-boards/simint.h @@ -21,15 +21,11 @@ #define SIM_INT_BASE 0 #define MIPSCPU_INT_MB0 2 -#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE #define MIPS_CPU_TIMER_IRQ 7 -#define MIPSCPU_INT_CPUCTR 7 - #define MSC01E_INT_BASE 64 -#define MIPSCPU_INT_CPUCTR 7 #define MSC01E_INT_CPUCTR 11 #endif |