diff options
| author |   Magnus Damm <damm@igel.co.jp> | 2007-07-31 17:11:21 +0900 |
|---|---|---|
| committer |   Paul Mundt <lethal@linux-sh.org> | 2007-09-21 11:57:46 +0900 |
| commit | a0e23267d4c57cdaa88114c3d88e25c87ee32d84 (patch) | |
| tree | ef578c3f6267dd7d16ede6e3cd778f0b1e619a76 /include/asm-sh/hw_irq.h | |
| parent | sh: Support explicit L1 cache disabling. (diff) | |
| download | linux-dev-a0e23267d4c57cdaa88114c3d88e25c87ee32d84.tar.xz linux-dev-a0e23267d4c57cdaa88114c3d88e25c87ee32d84.zip | |
sh: intc - add support for SH7785
This patch converts the cpu specific interrupt setup code for sh7785
from intc2 to intc. New vectors are also added to match the information
provided by the datasheet.
No IRQ/IRL pin vectors are enabled by default. Use plat_irq_setup_pins()
to select between IRL and IRQ mode.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to '')
| -rw-r--r-- | include/asm-sh/hw_irq.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h index 20d42959f52a..921ddec6ccf4 100644 --- a/include/asm-sh/hw_irq.h +++ b/include/asm-sh/hw_irq.h @@ -115,7 +115,8 @@ void __init register_intc_controller(struct intc_desc *desc); void __init plat_irq_setup(void); -enum { IRQ_MODE_IRQ, IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; +enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, + IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; void __init plat_irq_setup_pins(int mode); #endif /* __ASM_SH_HW_IRQ_H */ |