diff options
| author |   Felix Fietkau <nbd@nbd.name> | 2019-01-11 15:22:35 +0100 |
|---|---|---|
| committer |   Paul Burton <paul.burton@mips.com> | 2019-01-22 11:17:22 -0800 |
| commit | 6810ed320ec621b37c395be67125f1f456f1e55a (patch) | |
| tree | ea20015bf8fb2918923cc7dcef4c7465d2ce23d2 /include/dt-bindings/clock/ath79-clk.h | |
| parent | MIPS: ath79: support setting up clock via DT on all SoC types (diff) | |
| download | linux-dev-6810ed320ec621b37c395be67125f1f456f1e55a.tar.xz linux-dev-6810ed320ec621b37c395be67125f1f456f1e55a.zip | |
MIPS: ath79: export switch MDIO reference clock
On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz
clock. If that feature is not used, it defaults to the main reference
clock, like on all other SoC.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Diffstat (limited to '')
| -rw-r--r-- | include/dt-bindings/clock/ath79-clk.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/ath79-clk.h b/include/dt-bindings/clock/ath79-clk.h index 262d7c5eb248..dcc679a7ad85 100644 --- a/include/dt-bindings/clock/ath79-clk.h +++ b/include/dt-bindings/clock/ath79-clk.h @@ -14,7 +14,8 @@ #define ATH79_CLK_DDR 1 #define ATH79_CLK_AHB 2 #define ATH79_CLK_REF 3 +#define ATH79_CLK_MDIO 4 -#define ATH79_CLK_END 4 +#define ATH79_CLK_END 5 #endif /* __DT_BINDINGS_ATH79_CLK_H */ |