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authorOren Duer <oren@mellanox.co.il>2011-11-26 19:55:15 +0000
committerDavid S. Miller <davem@davemloft.net>2011-11-27 17:17:04 -0500
commit559a9f1d354b577af28f84181751820ff7d29feb (patch)
treee148a9161da5a03d8778e05d1492955f8d38e0ac /include/linux/mlx4/device.h
parentnet/mlx4_en: using non collapsed CQ on TX (diff)
downloadlinux-dev-559a9f1d354b577af28f84181751820ff7d29feb.tar.xz
linux-dev-559a9f1d354b577af28f84181751820ff7d29feb.zip
net/mlx4_en: fix WOL handlers were always looking at port2 capability bit
There are 2 capability bits for WOL, one for each port. WOL handlers were looking only on the second bit, regardless of the port. Signed-off-by: Oren Duer <oren@mellanox.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
-rw-r--r--include/linux/mlx4/device.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 84b0b1848f17..ca2c39771c38 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -77,7 +77,8 @@ enum {
MLX4_DEV_CAP_FLAG_IBOE = 1LL << 30,
MLX4_DEV_CAP_FLAG_UC_LOOPBACK = 1LL << 32,
MLX4_DEV_CAP_FLAG_FCS_KEEP = 1LL << 34,
- MLX4_DEV_CAP_FLAG_WOL = 1LL << 38,
+ MLX4_DEV_CAP_FLAG_WOL_PORT1 = 1LL << 37,
+ MLX4_DEV_CAP_FLAG_WOL_PORT2 = 1LL << 38,
MLX4_DEV_CAP_FLAG_UDP_RSS = 1LL << 40,
MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41,
MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42,