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| author |   Yishai Hadas <yishaih@mellanox.com> | 2019-06-30 19:23:23 +0300 |
|---|---|---|
| committer |   Leon Romanovsky <leonro@mellanox.com> | 2019-07-03 20:55:45 +0300 |
| commit | b9a7ba5562074855e8a3f92ea7e1174b61a3e87d (patch) | |
| tree | 3d2f3e4af99d2d31565ead07481717908a22fcd2 /include/linux/mlx5/mlx5_ifc.h | |
| parent | net/mlx5: Fix mlx5_core_destroy_cq() error flow (diff) | |
| download | linux-dev-b9a7ba5562074855e8a3f92ea7e1174b61a3e87d.tar.xz linux-dev-b9a7ba5562074855e8a3f92ea7e1174b61a3e87d.zip | |
net/mlx5: Use event mask based on device capabilities
Use the reported device capabilities for the supported user events (i.e.
affiliated and un-affiliated) to set the EQ mask.
As the event mask can be up to 256 defined by 4 entries of u64 change
the applicable code to work accordingly.
Signed-off-by: Yishai Hadas <yishaih@mellanox.com>
Acked-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Diffstat (limited to '')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 031db53e94ce..4148c47a65ed 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -860,6 +860,12 @@ struct mlx5_ifc_device_mem_cap_bits { u8 reserved_at_180[0x680]; }; +struct mlx5_ifc_device_event_cap_bits { + u8 user_affiliated_events[4][0x40]; + + u8 user_unaffiliated_events[4][0x40]; +}; + enum { MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0, MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2, @@ -1017,7 +1023,8 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 log_max_srq_sz[0x8]; u8 log_max_qp_sz[0x8]; - u8 reserved_at_90[0x8]; + u8 event_cap[0x1]; + u8 reserved_at_91[0x7]; u8 prio_tag_required[0x1]; u8 reserved_at_99[0x2]; u8 log_max_qp[0x5]; @@ -7422,9 +7429,9 @@ struct mlx5_ifc_create_eq_in_bits { u8 reserved_at_280[0x40]; - u8 event_bitmask[0x40]; + u8 event_bitmask[4][0x40]; - u8 reserved_at_300[0x580]; + u8 reserved_at_3c0[0x4c0]; u8 pas[0][0x40]; }; |