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| author |   Eran Ben Elisha <eranbe@mellanox.com> | 2016-04-24 22:51:52 +0300 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2016-04-26 15:58:02 -0400 |
| commit | 94cb1ebbafd509210887eea6ced55c40da7b4baa (patch) | |
| tree | fa0c0c1b9c0ac6de735c8fc7cfb64f620893d7c6 /include/linux/mlx5/port.h | |
| parent | net/mlx5e: Improve set features ndo resiliency (diff) | |
| download | linux-dev-94cb1ebbafd509210887eea6ced55c40da7b4baa.tar.xz linux-dev-94cb1ebbafd509210887eea6ced55c40da7b4baa.zip | |
net/mlx5e: Add support for RXALL netdev feature
Introduce new access register named Ports Check Mask Register (PCMR) to
control all HW checks on port. With this register, the driver can
enable/disable Hardware FCS validation.
When RXALL is enabled/disabled using ndo_set_features, enable/disable
fcs check at HW.
User can change HW configuration using rx-all flag at ethtool.
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Gal Pressman <galp@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | include/linux/mlx5/port.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/mlx5/port.h b/include/linux/mlx5/port.h index a1d145abd4eb..577e953d0aa7 100644 --- a/include/linux/mlx5/port.h +++ b/include/linux/mlx5/port.h @@ -84,4 +84,8 @@ int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev, int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode); int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode); +int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable); +void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported, + bool *enabled); + #endif /* __MLX5_PORT_H__ */ |