path: root/include/linux/phy.h
diff options
authorKweh Hock Leong <hock.leong.kweh@intel.com>2019-07-06 01:33:27 +0800
committerDavid S. Miller <davem@davemloft.net>2019-07-08 16:08:55 -0700
commitd4117d63a30876a3654f587c3a419db63d8b529d (patch)
tree2d5b14fe951fa991e70b081616b661eb09837332 /include/linux/phy.h
parentnet: openvswitch: use netif_ovs_is_port() instead of opencode (diff)
net: stmmac: enable clause 45 mdio support
DWMAC4 is capable to support clause 45 mdio communication. This patch enable the feature on stmmac_mdio_write() and stmmac_mdio_read() by following phy_write_mmd() and phy_read_mmd() mdiobus read write implementation format. Reviewed-by: Li, Yifan <yifan2.li@intel.com> Signed-off-by: Kweh Hock Leong <hock.leong.kweh@intel.com> Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/phy.h')
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/phy.h b/include/linux/phy.h
index d0af7d37fdf9..1739c6dc470e 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -195,6 +195,8 @@ static inline const char *phy_modes(phy_interface_t interface)
/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
#define MII_ADDR_C45 (1<<30)
+#define MII_DEVADDR_C45_SHIFT 16
+#define MII_REGADDR_C45_MASK GENMASK(15, 0)
struct device;
struct phylink;