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author | Chanho Park <chanho61.park@samsung.com> | 2011-11-11 18:47:58 +0900 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2012-01-03 09:10:01 +0100 |
commit | 3c739ad0df5eb41cd7adad879eda6aa09879eb76 (patch) | |
tree | 4ab739e639373a18ca993b26b6c18ace7edee9e2 /include/linux/pinctrl/pinmux.h | |
parent | pinctrl: unify pin type from signed to unsigned (diff) | |
download | linux-dev-3c739ad0df5eb41cd7adad879eda6aa09879eb76.tar.xz linux-dev-3c739ad0df5eb41cd7adad879eda6aa09879eb76.zip |
pinctrl: add a pin_base for sparse gpio-ranges
This patch enables mapping a base offset of gpio ranges with
a pin offset even if does'nt matched. A base of pinctrl_gpio_range
means a base offset of gpio. However, we cannot convert gpio to pin
number for sparse gpio ranges just only using a gpio base offset.
We can convert a gpio to real pin number(even if not matched) using
a new pin_base which means a base pin offset of requested gpio range.
Now, the pin control subsystem passes the pin base offset to the
pinmux driver.
For example, let's assume below two gpio ranges in the system.
static struct pinctrl_gpio_range gpio_range_a = {
.name = "chip a",
.id = 0,
.base = 32,
.pin_base = 32,
.npins = 16,
.gc = &chip_a;
};
static struct pinctrl_gpio_range gpio_range_b = {
.name = "chip b",
.id = 0,
.base = 48,
.pin_base = 64,
.npins = 8,
.gc = &chip_b;
};
We can calucalate a exact pin ranges even if doesn't matched with gpio ranges.
chip a:
gpio-range : [32 .. 47]
pin-range : [32 .. 47]
chip b:
gpio-range : [48 .. 55]
pin-range : [64 .. 71]
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to '')
-rw-r--r-- | include/linux/pinctrl/pinmux.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/pinctrl/pinmux.h b/include/linux/pinctrl/pinmux.h index 350e32a98c6a..bb7a9792f1ea 100644 --- a/include/linux/pinctrl/pinmux.h +++ b/include/linux/pinctrl/pinmux.h @@ -52,7 +52,7 @@ struct pinctrl_dev; * @disable: disable a certain muxing selector with a certain pin group * @gpio_request_enable: requests and enables GPIO on a certain pin. * Implement this only if you can mux every pin individually as GPIO. The - * affected GPIO range is passed along with an offset into that + * affected GPIO range is passed along with an offset(pin number) into that * specific GPIO range - function selectors and pin groups are orthogonal * to this, the core will however make sure the pins do not collide */ |