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authorKan Liang <kan.liang@linux.intel.com>2020-05-01 05:54:42 -0700
committerPeter Zijlstra <peterz@infradead.org>2020-05-19 20:34:16 +0200
commit0813c40556fce1eeefb996e020cc5339e0b84137 (patch)
tree8f518e9e4e49767384858b372dc74d9195dff693 /include/linux
parentperf/x86/rapl: Add Ice Lake RAPL support (diff)
downloadlinux-dev-0813c40556fce1eeefb996e020cc5339e0b84137.tar.xz
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perf/x86/intel: Add more available bits for OFFCORE_RESPONSE of Intel Tremont
The mask in the extra_regs for Intel Tremont need to be extended to allow more defined bits. "Outstanding Requests" (bit 63) is only available on MSR_OFFCORE_RSP0; Fixes: 6daeb8737f8a ("perf/x86/intel: Add Tremont core PMU support") Reported-by: Stephane Eranian <eranian@google.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20200501125442.7030-1-kan.liang@linux.intel.com
Diffstat (limited to 'include/linux')
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