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| author |   Boris Brezillon <boris.brezillon@free-electrons.com> | 2015-12-02 15:10:40 +0100 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-04-19 22:05:37 +0200 |
| commit | 2f9992e080b8892a10d189cbc846c06e6594ad0b (patch) | |
| tree | 6c1f9950de031377b53548fde1a413181bc5101f /tools/perf/scripts/python/stackcollapse.py | |
| parent | mtd: nand: sunxi: fix call order in sunxi_nand_chip_init() (diff) | |
mtd: nand: sunxi: fix clk rate calculation
Unlike what is specified in the Allwinner datasheets, the NAND clock rate
is not equal to 2/T but 1/T. Fix the clock rate selection accordingly.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions