diff options
| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-12-09 18:54:16 +0200 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-12-11 23:52:15 +0100 |
| commit | e91e941bd566ae94ed576424c9e8b31bdfc55512 (patch) | |
| tree | ba681ae911ea1a075961a72f19dd27f35a3df109 /tools/perf/scripts/python/stackcollapse.py | |
| parent | drm/i915: Increase gen2 vco frequency limit to 1512 MHz (diff) | |
drm/i915: Fix 66 MHz LVDS SSC freq for gen2
Store the SSC refclock frequency in kHz to get more accuracy. Currently
we're pretending that 66 MHz is ~66000 kHz, when in fact it is actually
~66667 kHz. By storing the less rounded kHz value we get a much better
accuracy for out pixel clock calculations.
Cc: Bruno Prémont <bonbons@linux-vserver.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: Bruno Prémont <bonbons@linux-vserver.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions