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| author |   Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-05-03 17:23:44 -0300 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-05-21 12:00:26 +0200 |
| commit | 3e1f72664e0a8a31e9b90c48459deb6642fd52f3 (patch) | |
| tree | cf20d09a07accd98b0e81f94072b9e7fd8c737bb /tools/perf/scripts/python | |
| parent | drm/i915: set the IPS linetime watermark (diff) | |
drm/i915: MCH_SSKPD is a 64 bit register on Haswell
And the SNB_READ_WM0_LATENCY macro is not valid anymore because we
have the "New WM0" at 63:56, so the "Old WM0" could maybe be zero if
the new one is not zero.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions