diff options
| author |   Leo Yan <leo.yan@linaro.org> | 2022-05-18 13:57:19 +0800 |
|---|---|---|
| committer |   Arnaldo Carvalho de Melo <acme@redhat.com> | 2022-05-23 09:36:12 -0300 |
| commit | 98450637107254242dc71675b0ce98d582d5fcb9 (patch) | |
| tree | f0a418ea0956b241badd1ec726264705a7dc551a /tools/perf/util/mem-events.h | |
| parent | perf build: Error for BPF skeletons without LIBBPF (diff) | |
| download | linux-dev-98450637107254242dc71675b0ce98d582d5fcb9.tar.xz linux-dev-98450637107254242dc71675b0ce98d582d5fcb9.zip | |
perf mem: Add stats for store operation with no available memory level
Sometimes we don't know memory store operations happen on exactly which
memory (or cache) level, the memory level flag is set to PERF_MEM_LVL_NA
in this case; a practical example is Arm SPE AUX trace sets this flag
for all store operations due to absent info for cache level.
This patch is to add a new item "st_na" in structure c2c_stats to add
statistics for store operations with no available cache level.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Cc: Adam Li <adamli@amperemail.onmicrosoft.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ali Saidi <alisaidi@amazon.com>
Cc: Alyssa Ross <hi@alyssa.is>
Cc: German Gomez <german.gomez@arm.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joe Mario <jmario@redhat.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Li Huafei <lihuafei1@huawei.com>
Cc: Like Xu <likexu@tencent.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220518055729.1869566-2-leo.yan@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to '')
| -rw-r--r-- | tools/perf/util/mem-events.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/perf/util/mem-events.h b/tools/perf/util/mem-events.h index 916242f8020a..8a8b568baeee 100644 --- a/tools/perf/util/mem-events.h +++ b/tools/perf/util/mem-events.h @@ -63,6 +63,7 @@ struct c2c_stats { u32 st_noadrs; /* cacheable store with no address */ u32 st_l1hit; /* count of stores that hit L1D */ u32 st_l1miss; /* count of stores that miss L1D */ + u32 st_na; /* count of stores with memory level is not available */ u32 load; /* count of all loads in trace */ u32 ld_excl; /* exclusive loads, rmt/lcl DRAM - snp none/miss */ u32 ld_shared; /* shared loads, rmt/lcl DRAM - snp hit */ |