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| author |   Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2020-01-14 11:22:14 -0800 |
|---|---|---|
| committer |   Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2020-01-20 11:39:31 +0200 |
| commit | 645feeb2f571acfc36a7205a6302e8c7e442d617 (patch) | |
| tree | 316293e0bc8eb849c27a725922751127d3d7b667 /tools/power/x86/intel-speed-select/isst.h | |
| parent | platform/x86: ISST: Allow additional core-power mailbox commands (diff) | |
| download | linux-dev-645feeb2f571acfc36a7205a6302e8c7e442d617.tar.xz linux-dev-645feeb2f571acfc36a7205a6302e8c7e442d617.zip | |
tools/power/x86/intel-speed-select: Add support for core-power discovery
It is possible that BIOS may not enable core-power feature. In this case
this additional interface will allow to enable from this utility. Also
the information dump, includes the current status of core-power.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to '')
| -rw-r--r-- | tools/power/x86/intel-speed-select/isst.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/tools/power/x86/intel-speed-select/isst.h b/tools/power/x86/intel-speed-select/isst.h index cdf0f8a6dbbf..ad5aa6341d0f 100644 --- a/tools/power/x86/intel-speed-select/isst.h +++ b/tools/power/x86/intel-speed-select/isst.h @@ -69,6 +69,10 @@ #define PM_CLOS_OFFSET 0x08 #define PQR_ASSOC_OFFSET 0x20 +#define READ_PM_CONFIG 0x94 +#define WRITE_PM_CONFIG 0x95 +#define PM_FEATURE 0x03 + #define DISP_FREQ_MULTIPLIER 100 struct isst_clos_config { @@ -119,6 +123,8 @@ struct isst_pkg_ctdp_level_info { int pbf_support; int fact_enabled; int pbf_enabled; + int sst_cp_support; + int sst_cp_enabled; int tdp_ratio; int active; int tdp_control; |