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| author |   Rashmica Gupta <rashmicy@gmail.com> | 2015-12-23 16:49:51 +1100 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2016-05-11 21:54:12 +1000 |
| commit | da3ddc3b5fea695f7b2fa89c4ca17dfd529293d2 (patch) | |
| tree | 2a463c39e1567a184d24dc9c18e236adb62cc68f /tools/testing/selftests/powerpc | |
| parent | selftests/powerpc: Make reg.h common to all powerpc selftests (diff) | |
| download | linux-dev-da3ddc3b5fea695f7b2fa89c4ca17dfd529293d2.tar.xz linux-dev-da3ddc3b5fea695f7b2fa89c4ca17dfd529293d2.zip | |
selftests/powerpc: Standardise TM calls
Currently tbegin, tend etc are written as opcodes or asm instructions. So
standardise these to asm instructions.
Signed-off-by: Rashmica Gupta <rashmicy@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'tools/testing/selftests/powerpc')
| -rw-r--r-- | tools/testing/selftests/powerpc/tm/tm-resched-dscr.c | 16 | ||||
| -rw-r--r-- | tools/testing/selftests/powerpc/tm/tm-signal-stack.c | 4 |
2 files changed, 7 insertions, 13 deletions
diff --git a/tools/testing/selftests/powerpc/tm/tm-resched-dscr.c b/tools/testing/selftests/powerpc/tm/tm-resched-dscr.c index 8fde93d6021f..d9c49f41515e 100644 --- a/tools/testing/selftests/powerpc/tm/tm-resched-dscr.c +++ b/tools/testing/selftests/powerpc/tm/tm-resched-dscr.c @@ -31,12 +31,6 @@ #include "utils.h" #include "tm.h" -#define TBEGIN ".long 0x7C00051D ;" -#define TEND ".long 0x7C00055D ;" -#define TCHECK ".long 0x7C00059C ;" -#define TSUSPEND ".long 0x7C0005DD ;" -#define TRESUME ".long 0x7C2005DD ;" -#define SPRN_TEXASR 0x82 #define SPRN_DSCR 0x03 int test_body(void) @@ -55,13 +49,13 @@ int test_body(void) "mtspr %[sprn_dscr], 3;" /* start and suspend a transaction */ - TBEGIN + "tbegin.;" "beq 1f;" - TSUSPEND + "tsuspend.;" /* hard loop until the transaction becomes doomed */ "2: ;" - TCHECK + "tcheck 0;" "bc 4, 0, 2b;" /* record DSCR and TEXASR */ @@ -70,8 +64,8 @@ int test_body(void) "mfspr 3, %[sprn_texasr];" "std 3, %[texasr];" - TRESUME - TEND + "tresume.;" + "tend.;" "li %[rv], 0;" "1: ;" : [rv]"=r"(rv), [dscr2]"=m"(dscr2), [texasr]"=m"(texasr) diff --git a/tools/testing/selftests/powerpc/tm/tm-signal-stack.c b/tools/testing/selftests/powerpc/tm/tm-signal-stack.c index e44a238c1d77..1f0eb567438d 100644 --- a/tools/testing/selftests/powerpc/tm/tm-signal-stack.c +++ b/tools/testing/selftests/powerpc/tm/tm-signal-stack.c @@ -60,9 +60,9 @@ int tm_signal_stack() exit(1); asm volatile("li 1, 0 ;" /* stack ptr == NULL */ "1:" - ".long 0x7C00051D ;" /* tbegin */ + "tbegin.;" "beq 1b ;" /* retry forever */ - ".long 0x7C0005DD ; ;" /* tsuspend */ + "tsuspend.;" "ld 2, 0(1) ;" /* trigger segv" */ : : : "memory"); |