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authorMathieu Desnoyers <mathieu.desnoyers@efficios.com>2019-04-29 11:28:02 -0400
committerShuah Khan <skhan@linuxfoundation.org>2019-05-07 15:33:09 -0600
commit16b96b6ed87faa616e2d2750ba44d78ee157ce26 (patch)
treeab2eaa52ea2811de78929930ee3bc7b95fd3f255 /tools/testing/selftests
parentrseq/selftests: powerpc code signature: generate valid instructions (diff)
downloadlinux-dev-16b96b6ed87faa616e2d2750ba44d78ee157ce26.tar.xz
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rseq/selftests: mips: use break instruction for RSEQ_SIG
Use break as guard instruction for the restartable sequence abort handler. Previously, the chosen signature was simply data, based on the assumption that it could always sit in a literal pool. However, some compilation environments favor disabling literal pool. Therefore, ensure the signature is a valid uncommon trap instruction. Suggested-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> CC: Paul Burton <paul.burton@mips.com> CC: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
Diffstat (limited to 'tools/testing/selftests')
-rw-r--r--tools/testing/selftests/rseq/rseq-mips.h34
1 files changed, 33 insertions, 1 deletions
diff --git a/tools/testing/selftests/rseq/rseq-mips.h b/tools/testing/selftests/rseq/rseq-mips.h
index fe3eabcdcbe5..e989e7c14b09 100644
--- a/tools/testing/selftests/rseq/rseq-mips.h
+++ b/tools/testing/selftests/rseq/rseq-mips.h
@@ -7,7 +7,39 @@
* (C) Copyright 2016-2018 - Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
*/
-#define RSEQ_SIG 0x53053053
+/*
+ * RSEQ_SIG uses the break instruction. The instruction pattern is:
+ *
+ * On MIPS:
+ * 0350000d break 0x350
+ *
+ * On nanoMIPS:
+ * 00100350 break 0x350
+ *
+ * On microMIPS:
+ * 0000d407 break 0x350
+ *
+ * For nanoMIPS32 and microMIPS, the instruction stream is encoded as 16-bit
+ * halfwords, so the signature halfwords need to be swapped accordingly for
+ * little-endian.
+ */
+#if defined(__nanomips__)
+# ifdef __MIPSEL__
+# define RSEQ_SIG 0x03500010
+# else
+# define RSEQ_SIG 0x00100350
+# endif
+#elif defined(__mips_micromips)
+# ifdef __MIPSEL__
+# define RSEQ_SIG 0xd4070000
+# else
+# define RSEQ_SIG 0x0000d407
+# endif
+#elif defined(__mips__)
+# define RSEQ_SIG 0x0350000d
+#else
+/* Unknown MIPS architecture. */
+#endif
#define rseq_smp_mb() __asm__ __volatile__ ("sync" ::: "memory")
#define rseq_smp_rmb() rseq_smp_mb()