diff options
Diffstat (limited to 'Documentation/devicetree/bindings/power')
14 files changed, 467 insertions, 202 deletions
diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml index aab70e8b681e..d3098c924b25 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml @@ -18,7 +18,7 @@ description: |+ "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon" Refer to the the bindings described in - Documentation/devicetree/bindings/mfd/syscon.txt + Documentation/devicetree/bindings/mfd/syscon.yaml properties: compatible: diff --git a/Documentation/devicetree/bindings/power/avs/qcom,cpr.txt b/Documentation/devicetree/bindings/power/avs/qcom,cpr.txt new file mode 100644 index 000000000000..ab0d5ebbad4e --- /dev/null +++ b/Documentation/devicetree/bindings/power/avs/qcom,cpr.txt @@ -0,0 +1,130 @@ +QCOM CPR (Core Power Reduction) + +CPR (Core Power Reduction) is a technology to reduce core power on a CPU +or other device. Each OPP of a device corresponds to a "corner" that has +a range of valid voltages for a particular frequency. While the device is +running at a particular frequency, CPR monitors dynamic factors such as +temperature, etc. and suggests adjustments to the voltage to save power +and meet silicon characteristic requirements. + +- compatible: + Usage: required + Value type: <string> + Definition: should be "qcom,qcs404-cpr", "qcom,cpr" for qcs404 + +- reg: + Usage: required + Value type: <prop-encoded-array> + Definition: base address and size of the rbcpr register region + +- interrupts: + Usage: required + Value type: <prop-encoded-array> + Definition: should specify the CPR interrupt + +- clocks: + Usage: required + Value type: <prop-encoded-array> + Definition: phandle to the reference clock + +- clock-names: + Usage: required + Value type: <stringlist> + Definition: must be "ref" + +- vdd-apc-supply: + Usage: required + Value type: <phandle> + Definition: phandle to the vdd-apc-supply regulator + +- #power-domain-cells: + Usage: required + Value type: <u32> + Definition: should be 0 + +- operating-points-v2: + Usage: required + Value type: <phandle> + Definition: A phandle to the OPP table containing the + performance states supported by the CPR + power domain + +- acc-syscon: + Usage: optional + Value type: <phandle> + Definition: phandle to syscon for writing ACC settings + +- nvmem-cells: + Usage: required + Value type: <phandle> + Definition: phandle to nvmem cells containing the data + that makes up a fuse corner, for each fuse corner. + As well as the CPR fuse revision. + +- nvmem-cell-names: + Usage: required + Value type: <stringlist> + Definition: should be "cpr_quotient_offset1", "cpr_quotient_offset2", + "cpr_quotient_offset3", "cpr_init_voltage1", + "cpr_init_voltage2", "cpr_init_voltage3", "cpr_quotient1", + "cpr_quotient2", "cpr_quotient3", "cpr_ring_osc1", + "cpr_ring_osc2", "cpr_ring_osc3", "cpr_fuse_revision" + for qcs404. + +Example: + + cpr_opp_table: cpr-opp-table { + compatible = "operating-points-v2-qcom-level"; + + cpr_opp1: opp1 { + opp-level = <1>; + qcom,opp-fuse-level = <1>; + }; + cpr_opp2: opp2 { + opp-level = <2>; + qcom,opp-fuse-level = <2>; + }; + cpr_opp3: opp3 { + opp-level = <3>; + qcom,opp-fuse-level = <3>; + }; + }; + + power-controller@b018000 { + compatible = "qcom,qcs404-cpr", "qcom,cpr"; + reg = <0x0b018000 0x1000>; + interrupts = <0 15 IRQ_TYPE_EDGE_RISING>; + clocks = <&xo_board>; + clock-names = "ref"; + vdd-apc-supply = <&pms405_s3>; + #power-domain-cells = <0>; + operating-points-v2 = <&cpr_opp_table>; + acc-syscon = <&tcsr>; + + nvmem-cells = <&cpr_efuse_quot_offset1>, + <&cpr_efuse_quot_offset2>, + <&cpr_efuse_quot_offset3>, + <&cpr_efuse_init_voltage1>, + <&cpr_efuse_init_voltage2>, + <&cpr_efuse_init_voltage3>, + <&cpr_efuse_quot1>, + <&cpr_efuse_quot2>, + <&cpr_efuse_quot3>, + <&cpr_efuse_ring1>, + <&cpr_efuse_ring2>, + <&cpr_efuse_ring3>, + <&cpr_efuse_revision>; + nvmem-cell-names = "cpr_quotient_offset1", + "cpr_quotient_offset2", + "cpr_quotient_offset3", + "cpr_init_voltage1", + "cpr_init_voltage2", + "cpr_init_voltage3", + "cpr_quotient1", + "cpr_quotient2", + "cpr_quotient3", + "cpr_ring_osc1", + "cpr_ring_osc2", + "cpr_ring_osc3", + "cpr_fuse_revision"; + }; diff --git a/Documentation/devicetree/bindings/power/domain-idle-state.txt b/Documentation/devicetree/bindings/power/domain-idle-state.txt deleted file mode 100644 index eefc7ed22ca2..000000000000 --- a/Documentation/devicetree/bindings/power/domain-idle-state.txt +++ /dev/null @@ -1,33 +0,0 @@ -PM Domain Idle State Node: - -A domain idle state node represents the state parameters that will be used to -select the state when there are no active components in the domain. - -The state node has the following parameters - - -- compatible: - Usage: Required - Value type: <string> - Definition: Must be "domain-idle-state". - -- entry-latency-us - Usage: Required - Value type: <prop-encoded-array> - Definition: u32 value representing worst case latency in - microseconds required to enter the idle state. - The exit-latency-us duration may be guaranteed - only after entry-latency-us has passed. - -- exit-latency-us - Usage: Required - Value type: <prop-encoded-array> - Definition: u32 value representing worst case latency - in microseconds required to exit the idle state. - -- min-residency-us - Usage: Required - Value type: <prop-encoded-array> - Definition: u32 value representing minimum residency duration - in microseconds after which the idle state will yield - power benefits after overcoming the overhead in entering -i the idle state. diff --git a/Documentation/devicetree/bindings/power/domain-idle-state.yaml b/Documentation/devicetree/bindings/power/domain-idle-state.yaml new file mode 100644 index 000000000000..dfba1af9abe5 --- /dev/null +++ b/Documentation/devicetree/bindings/power/domain-idle-state.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/domain-idle-state.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PM Domain Idle States binding description + +maintainers: + - Ulf Hansson <ulf.hansson@linaro.org> + +description: + A domain idle state node represents the state parameters that will be used to + select the state when there are no active components in the PM domain. + +properties: + $nodename: + const: domain-idle-states + +patternProperties: + "^(cpu|cluster|domain)-": + type: object + description: + Each state node represents a domain idle state description. + + properties: + compatible: + const: domain-idle-state + + entry-latency-us: + description: + The worst case latency in microseconds required to enter the idle + state. Note that, the exit-latency-us duration may be guaranteed only + after the entry-latency-us has passed. + + exit-latency-us: + description: + The worst case latency in microseconds required to exit the idle + state. + + min-residency-us: + description: + The minimum residency duration in microseconds after which the idle + state will yield power benefits, after overcoming the overhead while + entering the idle state. + + required: + - compatible + - entry-latency-us + - exit-latency-us + - min-residency-us + +examples: + - | + + domain-idle-states { + domain_retention: domain-retention { + compatible = "domain-idle-state"; + entry-latency-us = <20>; + exit-latency-us = <40>; + min-residency-us = <80>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml index 455b573293ae..6047aacd7766 100644 --- a/Documentation/devicetree/bindings/power/power-domain.yaml +++ b/Documentation/devicetree/bindings/power/power-domain.yaml @@ -25,22 +25,20 @@ description: |+ properties: $nodename: - pattern: "^(power-controller|power-domain)(@.*)?$" + pattern: "^(power-controller|power-domain)([@-].*)?$" domain-idle-states: $ref: /schemas/types.yaml#/definitions/phandle-array - description: - A phandle of an idle-state that shall be soaked into a generic domain - power state. The idle state definitions are compatible with - domain-idle-state specified in - Documentation/devicetree/bindings/power/domain-idle-state.txt - phandles that are not compatible with domain-idle-state will be ignored. - The domain-idle-state property reflects the idle state of this PM domain - and not the idle states of the devices or sub-domains in the PM domain. - Devices and sub-domains have their own idle-states independent - of the parent domain's idle states. In the absence of this property, - the domain would be considered as capable of being powered-on - or powered-off. + description: | + Phandles of idle states that defines the available states for the + power-domain provider. The idle state definitions are compatible with the + domain-idle-state bindings, specified in ./domain-idle-state.yaml. + + Note that, the domain-idle-state property reflects the idle states of this + PM domain and not the idle states of the devices or sub-domains in the PM + domain. Devices and sub-domains have their own idle states independent of + the parent domain's idle states. In the absence of this property, the + domain would be considered as capable of being powered-on or powered-off. operating-points-v2: $ref: /schemas/types.yaml#/definitions/phandle-array diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt index 5b09b2deb483..08497ef26c7a 100644 --- a/Documentation/devicetree/bindings/power/power_domain.txt +++ b/Documentation/devicetree/bindings/power/power_domain.txt @@ -109,4 +109,4 @@ Example: required-opps = <&domain1_opp_1>; }; -[1]. Documentation/devicetree/bindings/power/domain-idle-state.txt +[1]. Documentation/devicetree/bindings/power/domain-idle-state.yaml diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.txt b/Documentation/devicetree/bindings/power/qcom,rpmpd.txt deleted file mode 100644 index bc75bf49cdae..000000000000 --- a/Documentation/devicetree/bindings/power/qcom,rpmpd.txt +++ /dev/null @@ -1,148 +0,0 @@ -Qualcomm RPM/RPMh Power domains - -For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh -which then translates it into a corresponding voltage on a rail - -Required Properties: - - compatible: Should be one of the following - * qcom,msm8976-rpmpd: RPM Power domain for the msm8976 family of SoC - * qcom,msm8996-rpmpd: RPM Power domain for the msm8996 family of SoC - * qcom,msm8998-rpmpd: RPM Power domain for the msm8998 family of SoC - * qcom,qcs404-rpmpd: RPM Power domain for the qcs404 family of SoC - * qcom,sdm845-rpmhpd: RPMh Power domain for the sdm845 family of SoC - - #power-domain-cells: number of cells in Power domain specifier - must be 1. - - operating-points-v2: Phandle to the OPP table for the Power domain. - Refer to Documentation/devicetree/bindings/power/power_domain.txt - and Documentation/devicetree/bindings/opp/opp.txt for more details - -Refer to <dt-bindings/power/qcom-rpmpd.h> for the level values for -various OPPs for different platforms as well as Power domain indexes - -Example: rpmh power domain controller and OPP table - -#include <dt-bindings/power/qcom-rpmhpd.h> - -opp-level values specified in the OPP tables for RPMh power domains -should use the RPMH_REGULATOR_LEVEL_* constants from -<dt-bindings/power/qcom-rpmhpd.h> - - rpmhpd: power-controller { - compatible = "qcom,sdm845-rpmhpd"; - #power-domain-cells = <1>; - operating-points-v2 = <&rpmhpd_opp_table>; - - rpmhpd_opp_table: opp-table { - compatible = "operating-points-v2"; - - rpmhpd_opp_ret: opp1 { - opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; - }; - - rpmhpd_opp_min_svs: opp2 { - opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; - }; - - rpmhpd_opp_low_svs: opp3 { - opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; - }; - - rpmhpd_opp_svs: opp4 { - opp-level = <RPMH_REGULATOR_LEVEL_SVS>; - }; - - rpmhpd_opp_svs_l1: opp5 { - opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; - }; - - rpmhpd_opp_nom: opp6 { - opp-level = <RPMH_REGULATOR_LEVEL_NOM>; - }; - - rpmhpd_opp_nom_l1: opp7 { - opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; - }; - - rpmhpd_opp_nom_l2: opp8 { - opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; - }; - - rpmhpd_opp_turbo: opp9 { - opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; - }; - - rpmhpd_opp_turbo_l1: opp10 { - opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; - }; - }; - }; - -Example: rpm power domain controller and OPP table - - rpmpd: power-controller { - compatible = "qcom,msm8996-rpmpd"; - #power-domain-cells = <1>; - operating-points-v2 = <&rpmpd_opp_table>; - - rpmpd_opp_table: opp-table { - compatible = "operating-points-v2"; - - rpmpd_opp_low: opp1 { - opp-level = <1>; - }; - - rpmpd_opp_ret: opp2 { - opp-level = <2>; - }; - - rpmpd_opp_svs: opp3 { - opp-level = <3>; - }; - - rpmpd_opp_normal: opp4 { - opp-level = <4>; - }; - - rpmpd_opp_high: opp5 { - opp-level = <5>; - }; - - rpmpd_opp_turbo: opp6 { - opp-level = <6>; - }; - }; - }; - -Example: Client/Consumer device using OPP table - - leaky-device0@12350000 { - compatible = "foo,i-leak-current"; - reg = <0x12350000 0x1000>; - power-domains = <&rpmhpd SDM845_MX>; - operating-points-v2 = <&leaky_opp_table>; - }; - - - leaky_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp1 { - opp-hz = /bits/ 64 <144000>; - required-opps = <&rpmhpd_opp_low>; - }; - - opp2 { - opp-hz = /bits/ 64 <400000>; - required-opps = <&rpmhpd_opp_ret>; - }; - - opp3 { - opp-hz = /bits/ 64 <20000000>; - required-opps = <&rpmpd_opp_svs>; - }; - - opp4 { - opp-hz = /bits/ 64 <25000000>; - required-opps = <&rpmpd_opp_normal>; - }; - }; diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml new file mode 100644 index 000000000000..ba605310abeb --- /dev/null +++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml @@ -0,0 +1,170 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/qcom,rpmpd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm RPM/RPMh Power domains + +maintainers: + - Rajendra Nayak <rnayak@codeaurora.org> + +description: + For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh + which then translates it into a corresponding voltage on a rail. + +properties: + compatible: + enum: + - qcom,msm8976-rpmpd + - qcom,msm8996-rpmpd + - qcom,msm8998-rpmpd + - qcom,qcs404-rpmpd + - qcom,sc7180-rpmhpd + - qcom,sdm845-rpmhpd + - qcom,sm8150-rpmhpd + + '#power-domain-cells': + const: 1 + + operating-points-v2: true + + opp-table: + type: object + +required: + - compatible + - '#power-domain-cells' + - operating-points-v2 + +additionalProperties: false + +examples: + - | + + // Example 1 (rpmh power domain controller and OPP table): + + #include <dt-bindings/power/qcom-rpmpd.h> + + rpmhpd: power-controller { + compatible = "qcom,sdm845-rpmhpd"; + #power-domain-cells = <1>; + operating-points-v2 = <&rpmhpd_opp_table>; + + rpmhpd_opp_table: opp-table { + compatible = "operating-points-v2"; + + rpmhpd_opp_ret: opp1 { + opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; + }; + + rpmhpd_opp_min_svs: opp2 { + opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; + }; + + rpmhpd_opp_low_svs: opp3 { + opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; + }; + + rpmhpd_opp_svs: opp4 { + opp-level = <RPMH_REGULATOR_LEVEL_SVS>; + }; + + rpmhpd_opp_svs_l1: opp5 { + opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; + }; + + rpmhpd_opp_nom: opp6 { + opp-level = <RPMH_REGULATOR_LEVEL_NOM>; + }; + + rpmhpd_opp_nom_l1: opp7 { + opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; + }; + + rpmhpd_opp_nom_l2: opp8 { + opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; + }; + + rpmhpd_opp_turbo: opp9 { + opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; + }; + + rpmhpd_opp_turbo_l1: opp10 { + opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; + }; + }; + }; + + - | + + // Example 2 (rpm power domain controller and OPP table): + + rpmpd: power-controller { + compatible = "qcom,msm8996-rpmpd"; + #power-domain-cells = <1>; + operating-points-v2 = <&rpmpd_opp_table>; + + rpmpd_opp_table: opp-table { + compatible = "operating-points-v2"; + + rpmpd_opp_low: opp1 { + opp-level = <1>; + }; + + rpmpd_opp_ret: opp2 { + opp-level = <2>; + }; + + rpmpd_opp_svs: opp3 { + opp-level = <3>; + }; + + rpmpd_opp_normal: opp4 { + opp-level = <4>; + }; + + rpmpd_opp_high: opp5 { + opp-level = <5>; + }; + + rpmpd_opp_turbo: opp6 { + opp-level = <6>; + }; + }; + }; + + - | + + // Example 3 (Client/Consumer device using OPP table): + + leaky-device0@12350000 { + compatible = "foo,i-leak-current"; + reg = <0x12350000 0x1000>; + power-domains = <&rpmhpd 0>; + operating-points-v2 = <&leaky_opp_table>; + }; + + leaky_opp_table: opp-table { + compatible = "operating-points-v2"; + opp1 { + opp-hz = /bits/ 64 <144000>; + required-opps = <&rpmhpd_opp_low>; + }; + + opp2 { + opp-hz = /bits/ 64 <400000>; + required-opps = <&rpmhpd_opp_ret>; + }; + + opp3 { + opp-hz = /bits/ 64 <20000000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp4 { + opp-hz = /bits/ 64 <25000000>; + required-opps = <&rpmpd_opp_normal>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.txt b/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.txt index d366f1eb623a..bb529ecf8a57 100644 --- a/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.txt +++ b/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.txt @@ -8,9 +8,41 @@ Required properties: - compatible: Must contain: "xlnx,zynqmp-power" - interrupts: Interrupt specifier -------- -Example -------- +Optional properties: + - mbox-names : Name given to channels seen in the 'mboxes' property. + "tx" - Mailbox corresponding to transmit path + "rx" - Mailbox corresponding to receive path + - mboxes : Standard property to specify a Mailbox. Each value of + the mboxes property should contain a phandle to the + mailbox controller device node and an args specifier + that will be the phandle to the intended sub-mailbox + child node to be used for communication. See + Documentation/devicetree/bindings/mailbox/mailbox.txt + for more details about the generic mailbox controller + and client driver bindings. Also see + Documentation/devicetree/bindings/mailbox/ \ + xlnx,zynqmp-ipi-mailbox.txt for typical controller that + is used to communicate with this System controllers. + +-------- +Examples +-------- + +Example with interrupt method: + +firmware { + zynqmp_firmware: zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; + method = "smc"; + + zynqmp_power: zynqmp-power { + compatible = "xlnx,zynqmp-power"; + interrupts = <0 35 4>; + }; + }; +}; + +Example with IPI mailbox method: firmware { zynqmp_firmware: zynqmp-firmware { @@ -19,7 +51,11 @@ firmware { zynqmp_power: zynqmp-power { compatible = "xlnx,zynqmp-power"; + interrupt-parent = <&gic>; interrupts = <0 35 4>; + mboxes = <&ipi_mailbox_pmu0 0>, + <&ipi_mailbox_pmu0 1>; + mbox-names = "tx", "rx"; }; }; }; diff --git a/Documentation/devicetree/bindings/power/supply/battery.txt b/Documentation/devicetree/bindings/power/supply/battery.txt index 5c913d4cf36c..3049cf88bdcf 100644 --- a/Documentation/devicetree/bindings/power/supply/battery.txt +++ b/Documentation/devicetree/bindings/power/supply/battery.txt @@ -35,6 +35,10 @@ Optional Properties: for each of the battery capacity lookup table. The first temperature value specifies the OCV table 0, and the second temperature value specifies the OCV table 1, and so on. + - resistance-temp-table: An array providing the temperature in degree Celsius + and corresponding battery internal resistance percent, which is used to look + up the resistance percent according to current temperature to get a accurate + batterty internal resistance in different temperatures. Battery properties are named, where possible, for the corresponding elements in enum power_supply_property, defined in @@ -61,6 +65,7 @@ Example: ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>, ...; ocv-capacity-table-1 = <4200000 100>, <4185000 95>, <4113000 90>, ...; ocv-capacity-table-2 = <4250000 100>, <4200000 95>, <4185000 90>, ...; + resistance-temp-table = <20 100>, <10 90>, <0 80>, <(-10) 60>; }; charger: charger@11 { diff --git a/Documentation/devicetree/bindings/power/supply/bq25890.txt b/Documentation/devicetree/bindings/power/supply/bq25890.txt index dc0568933359..dc9c8f76e06c 100644 --- a/Documentation/devicetree/bindings/power/supply/bq25890.txt +++ b/Documentation/devicetree/bindings/power/supply/bq25890.txt @@ -1,11 +1,14 @@ Binding for TI bq25890 Li-Ion Charger -This driver will support the bq25896 and the bq25890. There are other ICs -in the same family but those have not been tested. +This driver will support the bq25892, the bq25896 and the bq25890. There are +other ICs in the same family but those have not been tested. Required properties: - compatible: Should contain one of the following: * "ti,bq25890" + * "ti,bq25892" + * "ti,bq25895" + * "ti,bq25896" - reg: integer, i2c address of the device. - ti,battery-regulation-voltage: integer, maximum charging voltage (in uV); - ti,charge-current: integer, maximum charging current (in uA); diff --git a/Documentation/devicetree/bindings/power/supply/max17040_battery.txt b/Documentation/devicetree/bindings/power/supply/max17040_battery.txt new file mode 100644 index 000000000000..4e0186b8380f --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/max17040_battery.txt @@ -0,0 +1,33 @@ +max17040_battery +~~~~~~~~~~~~~~~~ + +Required properties : + - compatible : "maxim,max17040" or "maxim,max77836-battery" + - reg: i2c slave address + +Optional properties : +- maxim,alert-low-soc-level : The alert threshold that sets the state of + charge level (%) where an interrupt is + generated. Can be configured from 1 up to 32 + (%). If skipped the power up default value of + 4 (%) will be used. +- interrupts : Interrupt line see Documentation/devicetree/ + bindings/interrupt-controller/interrupts.txt +- wakeup-source : This device has wakeup capabilities. Use this + property to use alert low SOC level interrupt + as wake up source. + +Optional properties support interrupt functionality for alert low state of +charge level, present in some ICs in the same family, and should be used with +compatible "maxim,max77836-battery". + +Example: + + battery-fuel-gauge@36 { + compatible = "maxim,max77836-battery"; + reg = <0x36>; + maxim,alert-low-soc-level = <10>; + interrupt-parent = <&gpio7>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; + wakeup-source; + }; diff --git a/Documentation/devicetree/bindings/power/supply/max17042_battery.txt b/Documentation/devicetree/bindings/power/supply/max17042_battery.txt index 3f3894aaeebc..f34c5daae9af 100644 --- a/Documentation/devicetree/bindings/power/supply/max17042_battery.txt +++ b/Documentation/devicetree/bindings/power/supply/max17042_battery.txt @@ -2,7 +2,11 @@ max17042_battery ~~~~~~~~~~~~~~~~ Required properties : - - compatible : "maxim,max17042" + - compatible : one of the following + * "maxim,max17042" + * "maxim,max17047" + * "maxim,max17050" + * "maxim,max17055" Optional properties : - maxim,rsns-microohm : Resistance of rsns resistor in micro Ohms diff --git a/Documentation/devicetree/bindings/power/supply/sc27xx-fg.txt b/Documentation/devicetree/bindings/power/supply/sc27xx-fg.txt index 0a5705b8b592..b6359b590383 100644 --- a/Documentation/devicetree/bindings/power/supply/sc27xx-fg.txt +++ b/Documentation/devicetree/bindings/power/supply/sc27xx-fg.txt @@ -13,6 +13,8 @@ Required properties: - io-channel-names: Should be "bat-temp" or "charge-vol". - nvmem-cells: A phandle to the calibration cells provided by eFuse device. - nvmem-cell-names: Should be "fgu_calib". +- sprd,calib-resistance-micro-ohms: Specify the real resistance of coulomb counter + chip in micro Ohms. - monitored-battery: Phandle of battery characteristics devicetree node. See Documentation/devicetree/bindings/power/supply/battery.txt @@ -52,5 +54,6 @@ Example: nvmem-cells = <&fgu_calib>; nvmem-cell-names = "fgu_calib"; monitored-battery = <&bat>; + sprd,calib-resistance-micro-ohms = <21500>; }; }; |