diff options
Diffstat (limited to 'Documentation')
240 files changed, 12345 insertions, 6739 deletions
diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX index 5bd4b07c2f90..c8a8eb1a2b11 100644 --- a/Documentation/00-INDEX +++ b/Documentation/00-INDEX @@ -152,8 +152,6 @@ driver-model/ - directory with info about Linux driver model. early-userspace/ - info about initramfs, klibc, and userspace early during boot. -edac.txt - - information on EDAC - Error Detection And Correction efi-stub.txt - How to use the EFI boot stub to bypass GRUB or elilo on EFI systems. eisa.txt diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci index b3bc50f650ee..5a1732b78707 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci +++ b/Documentation/ABI/testing/sysfs-bus-pci @@ -294,3 +294,10 @@ Description: a firmware bug to the system vendor. Writing to this file taints the kernel with TAINT_FIRMWARE_WORKAROUND, which reduces the supportability of your system. + +What: /sys/bus/pci/devices/.../revision +Date: November 2016 +Contact: Emil Velikov <emil.l.velikov@gmail.com> +Description: + This file contains the revision field of the the PCI device. + The value comes from device config space. The file is read only. diff --git a/Documentation/ABI/testing/sysfs-class-rtc-rtc0-device-rtc_calibration b/Documentation/ABI/testing/sysfs-class-rtc-rtc0-device-rtc_calibration index 4cf1e72222d9..ec950c93e5c6 100644 --- a/Documentation/ABI/testing/sysfs-class-rtc-rtc0-device-rtc_calibration +++ b/Documentation/ABI/testing/sysfs-class-rtc-rtc0-device-rtc_calibration @@ -1,8 +1,9 @@ -What: Attribute for calibrating ST-Ericsson AB8500 Real Time Clock +What: /sys/class/rtc/rtc0/device/rtc_calibration Date: Oct 2011 KernelVersion: 3.0 Contact: Mark Godfrey <mark.godfrey@stericsson.com> -Description: The rtc_calibration attribute allows the userspace to +Description: Attribute for calibrating ST-Ericsson AB8500 Real Time Clock + The rtc_calibration attribute allows the userspace to calibrate the AB8500.s 32KHz Real Time Clock. Every 60 seconds the AB8500 will correct the RTC's value by adding to it the value of this attribute. diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index 498741737055..2a4a423d08e0 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -272,6 +272,22 @@ Description: Parameters for the CPU cache attributes the modified cache line is written to main memory only when it is replaced + +What: /sys/devices/system/cpu/cpu*/cache/index*/id +Date: September 2016 +Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> +Description: Cache id + + The id provides a unique number for a specific instance of + a cache of a particular type. E.g. there may be a level + 3 unified cache on each socket in a server and we may + assign them ids 0, 1, 2, ... + + Note that id value can be non-contiguous. E.g. level 1 + caches typically exist per core, but there may not be a + power of two cores on a socket, so these caches may be + numbered 0, 1, 2, 3, 4, 5, 8, 9, 10, ... + What: /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/turbo_stat /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/sub_turbo_stat diff --git a/Documentation/ABI/testing/sysfs-platform-sst-atom b/Documentation/ABI/testing/sysfs-platform-sst-atom new file mode 100644 index 000000000000..0d07c0395660 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-platform-sst-atom @@ -0,0 +1,17 @@ +What: /sys/devices/platform/8086%x:00/firmware_version +Date: November 2016 +KernelVersion: 4.10 +Contact: "Sebastien Guiriec" <sebastien.guiriec@intel.com> +Description: + LPE Firmware version for SST driver on all atom + plaforms (BYT/CHT/Merrifield/BSW). + If the FW has never been loaded it will display: + "FW not yet loaded" + If FW has been loaded it will display: + "v01.aa.bb.cc" + aa: Major version is reflecting SoC version: + 0d: BYT FW + 0b: BSW FW + 07: Merrifield FW + bb: Minor version + cc: Build version diff --git a/Documentation/Changes b/Documentation/Changes new file mode 120000 index 000000000000..7564ae1682ba --- /dev/null +++ b/Documentation/Changes @@ -0,0 +1 @@ +process/changes.rst
\ No newline at end of file diff --git a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile index caab9039362f..a6eb7dcd4dd5 100644 --- a/Documentation/DocBook/Makefile +++ b/Documentation/DocBook/Makefile @@ -12,8 +12,8 @@ DOCBOOKS := z8530book.xml \ kernel-api.xml filesystems.xml lsm.xml kgdb.xml \ gadget.xml libata.xml mtdnand.xml librs.xml rapidio.xml \ genericirq.xml s390-drivers.xml uio-howto.xml scsi.xml \ - 80211.xml sh.xml regulator.xml w1.xml \ - writing_musb_glue_layer.xml crypto-API.xml iio.xml + sh.xml regulator.xml w1.xml \ + writing_musb_glue_layer.xml iio.xml ifeq ($(DOCBOOKS),) diff --git a/Documentation/DocBook/crypto-API.tmpl b/Documentation/DocBook/crypto-API.tmpl deleted file mode 100644 index 088b79c341ff..000000000000 --- a/Documentation/DocBook/crypto-API.tmpl +++ /dev/null @@ -1,2092 +0,0 @@ -<?xml version="1.0" encoding="UTF-8"?> -<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN" - "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []> - -<book id="KernelCryptoAPI"> - <bookinfo> - <title>Linux Kernel Crypto API</title> - - <authorgroup> - <author> - <firstname>Stephan</firstname> - <surname>Mueller</surname> - <affiliation> - <address> - <email>smueller@chronox.de</email> - </address> - </affiliation> - </author> - <author> - <firstname>Marek</firstname> - <surname>Vasut</surname> - <affiliation> - <address> - <email>marek@denx.de</email> - </address> - </affiliation> - </author> - </authorgroup> - - <copyright> - <year>2014</year> - <holder>Stephan Mueller</holder> - </copyright> - - - <legalnotice> - <para> - This documentation is free software; you can redistribute - it and/or modify it under the terms of the GNU General Public - License as published by the Free Software Foundation; either - version 2 of the License, or (at your option) any later - version. - </para> - - <para> - This program is distributed in the hope that it will be - useful, but WITHOUT ANY WARRANTY; without even the implied - warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - See the GNU General Public License for more details. - </para> - - <para> - You should have received a copy of the GNU General Public - License along with this program; if not, write to the Free - Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, - MA 02111-1307 USA - </para> - - <para> - For more details see the file COPYING in the source - distribution of Linux. - </para> - </legalnotice> - </bookinfo> - - <toc></toc> - - <chapter id="Intro"> - <title>Kernel Crypto API Interface Specification</title> - - <sect1><title>Introduction</title> - - <para> - The kernel crypto API offers a rich set of cryptographic ciphers as - well as other data transformation mechanisms and methods to invoke - these. This document contains a description of the API and provides - example code. - </para> - - <para> - To understand and properly use the kernel crypto API a brief - explanation of its structure is given. Based on the architecture, - the API can be separated into different components. Following the - architecture specification, hints to developers of ciphers are - provided. Pointers to the API function call documentation are - given at the end. - </para> - - <para> - The kernel crypto API refers to all algorithms as "transformations". - Therefore, a cipher handle variable usually has the name "tfm". - Besides cryptographic operations, the kernel crypto API also knows - compression transformations and handles them the same way as ciphers. - </para> - - <para> - The kernel crypto API serves the following entity types: - - <itemizedlist> - <listitem> - <para>consumers requesting cryptographic services</para> - </listitem> - <listitem> - <para>data transformation implementations (typically ciphers) - that can be called by consumers using the kernel crypto - API</para> - </listitem> - </itemizedlist> - </para> - - <para> - This specification is intended for consumers of the kernel crypto - API as well as for developers implementing ciphers. This API - specification, however, does not discuss all API calls available - to data transformation implementations (i.e. implementations of - ciphers and other transformations (such as CRC or even compression - algorithms) that can register with the kernel crypto API). - </para> - - <para> - Note: The terms "transformation" and cipher algorithm are used - interchangeably. - </para> - </sect1> - - <sect1><title>Terminology</title> - <para> - The transformation implementation is an actual code or interface - to hardware which implements a certain transformation with precisely - defined behavior. - </para> - - <para> - The transformation object (TFM) is an instance of a transformation - implementation. There can be multiple transformation objects - associated with a single transformation implementation. Each of - those transformation objects is held by a crypto API consumer or - another transformation. Transformation object is allocated when a - crypto API consumer requests a transformation implementation. - The consumer is then provided with a structure, which contains - a transformation object (TFM). - </para> - - <para> - The structure that contains transformation objects may also be - referred to as a "cipher handle". Such a cipher handle is always - subject to the following phases that are reflected in the API calls - applicable to such a cipher handle: - </para> - - <orderedlist> - <listitem> - <para>Initialization of a cipher handle.</para> - </listitem> - <listitem> - <para>Execution of all intended cipher operations applicable - for the handle where the cipher handle must be furnished to - every API call.</para> - </listitem> - <listitem> - <para>Destruction of a cipher handle.</para> - </listitem> - </orderedlist> - - <para> - When using the initialization API calls, a cipher handle is - created and returned to the consumer. Therefore, please refer - to all initialization API calls that refer to the data - structure type a consumer is expected to receive and subsequently - to use. The initialization API calls have all the same naming - conventions of crypto_alloc_*. - </para> - - <para> - The transformation context is private data associated with - the transformation object. - </para> - </sect1> - </chapter> - - <chapter id="Architecture"><title>Kernel Crypto API Architecture</title> - <sect1><title>Cipher algorithm types</title> - <para> - The kernel crypto API provides different API calls for the - following cipher types: - - <itemizedlist> - <listitem><para>Symmetric ciphers</para></listitem> - <listitem><para>AEAD ciphers</para></listitem> - <listitem><para>Message digest, including keyed message digest</para></listitem> - <listitem><para>Random number generation</para></listitem> - <listitem><para>User space interface</para></listitem> - </itemizedlist> - </para> - </sect1> - - <sect1><title>Ciphers And Templates</title> - <para> - The kernel crypto API provides implementations of single block - ciphers and message digests. In addition, the kernel crypto API - provides numerous "templates" that can be used in conjunction - with the single block ciphers and message digests. Templates - include all types of block chaining mode, the HMAC mechanism, etc. - </para> - - <para> - Single block ciphers and message digests can either be directly - used by a caller or invoked together with a template to form - multi-block ciphers or keyed message digests. - </para> - - <para> - A single block cipher may even be called with multiple templates. - However, templates cannot be used without a single cipher. - </para> - - <para> - See /proc/crypto and search for "name". For example: - - <itemizedlist> - <listitem><para>aes</para></listitem> - <listitem><para>ecb(aes)</para></listitem> - <listitem><para>cmac(aes)</para></listitem> - <listitem><para>ccm(aes)</para></listitem> - <listitem><para>rfc4106(gcm(aes))</para></listitem> - <listitem><para>sha1</para></listitem> - <listitem><para>hmac(sha1)</para></listitem> - <listitem><para>authenc(hmac(sha1),cbc(aes))</para></listitem> - </itemizedlist> - </para> - - <para> - In these examples, "aes" and "sha1" are the ciphers and all - others are the templates. - </para> - </sect1> - - <sect1><title>Synchronous And Asynchronous Operation</title> - <para> - The kernel crypto API provides synchronous and asynchronous - API operations. - </para> - - <para> - When using the synchronous API operation, the caller invokes - a cipher operation which is performed synchronously by the - kernel crypto API. That means, the caller waits until the - cipher operation completes. Therefore, the kernel crypto API - calls work like regular function calls. For synchronous - operation, the set of API calls is small and conceptually - similar to any other crypto library. - </para> - - <para> - Asynchronous operation is provided by the kernel crypto API - which implies that the invocation of a cipher operation will - complete almost instantly. That invocation triggers the - cipher operation but it does not signal its completion. Before - invoking a cipher operation, the caller must provide a callback - function the kernel crypto API can invoke to signal the - completion of the cipher operation. Furthermore, the caller - must ensure it can handle such asynchronous events by applying - appropriate locking around its data. The kernel crypto API - does not perform any special serialization operation to protect - the caller's data integrity. - </para> - </sect1> - - <sect1><title>Crypto API Cipher References And Priority</title> - <para> - A cipher is referenced by the caller with a string. That string - has the following semantics: - - <programlisting> - template(single block cipher) - </programlisting> - - where "template" and "single block cipher" is the aforementioned - template and single block cipher, respectively. If applicable, - additional templates may enclose other templates, such as - - <programlisting> - template1(template2(single block cipher))) - </programlisting> - </para> - - <para> - The kernel crypto API may provide multiple implementations of a - template or a single block cipher. For example, AES on newer - Intel hardware has the following implementations: AES-NI, - assembler implementation, or straight C. Now, when using the - string "aes" with the kernel crypto API, which cipher - implementation is used? The answer to that question is the - priority number assigned to each cipher implementation by the - kernel crypto API. When a caller uses the string to refer to a - cipher during initialization of a cipher handle, the kernel - crypto API looks up all implementations providing an - implementation with that name and selects the implementation - with the highest priority. - </para> - - <para> - Now, a caller may have the need to refer to a specific cipher - implementation and thus does not want to rely on the - priority-based selection. To accommodate this scenario, the - kernel crypto API allows the cipher implementation to register - a unique name in addition to common names. When using that - unique name, a caller is therefore always sure to refer to - the intended cipher implementation. - </para> - - <para> - The list of available ciphers is given in /proc/crypto. However, - that list does not specify all possible permutations of - templates and ciphers. Each block listed in /proc/crypto may - contain the following information -- if one of the components - listed as follows are not applicable to a cipher, it is not - displayed: - </para> - - <itemizedlist> - <listitem> - <para>name: the generic name of the cipher that is subject - to the priority-based selection -- this name can be used by - the cipher allocation API calls (all names listed above are - examples for such generic names)</para> - </listitem> - <listitem> - <para>driver: the unique name of the cipher -- this name can - be used by the cipher allocation API calls</para> - </listitem> - <listitem> - <para>module: the kernel module providing the cipher - implementation (or "kernel" for statically linked ciphers)</para> - </listitem> - <listitem> - <para>priority: the priority value of the cipher implementation</para> - </listitem> - <listitem> - <para>refcnt: the reference count of the respective cipher - (i.e. the number of current consumers of this cipher)</para> - </listitem> - <listitem> - <para>selftest: specification whether the self test for the - cipher passed</para> - </listitem> - <listitem> - <para>type: - <itemizedlist> - <listitem> - <para>skcipher for symmetric key ciphers</para> - </listitem> - <listitem> - <para>cipher for single block ciphers that may be used with - an additional template</para> - </listitem> - <listitem> - <para>shash for synchronous message digest</para> - </listitem> - <listitem> - <para>ahash for asynchronous message digest</para> - </listitem> - <listitem> - <para>aead for AEAD cipher type</para> - </listitem> - <listitem> - <para>compression for compression type transformations</para> - </listitem> - <listitem> - <para>rng for random number generator</para> - </listitem> - <listitem> - <para>givcipher for cipher with associated IV generator - (see the geniv entry below for the specification of the - IV generator type used by the cipher implementation)</para> - </listitem> - </itemizedlist> - </para> - </listitem> - <listitem> - <para>blocksize: blocksize of cipher in bytes</para> - </listitem> - <listitem> - <para>keysize: key size in bytes</para> - </listitem> - <listitem> - <para>ivsize: IV size in bytes</para> - </listitem> - <listitem> - <para>seedsize: required size of seed data for random number - generator</para> - </listitem> - <listitem> - <para>digestsize: output size of the message digest</para> - </listitem> - <listitem> - <para>geniv: IV generation type: - <itemizedlist> - <listitem> - <para>eseqiv for encrypted sequence number based IV - generation</para> - </listitem> - <listitem> - <para>seqiv for sequence number based IV generation</para> - </listitem> - <listitem> - <para>chainiv for chain iv generation</para> - </listitem> - <listitem> - <para><builtin> is a marker that the cipher implements - IV generation and handling as it is specific to the given - cipher</para> - </listitem> - </itemizedlist> - </para> - </listitem> - </itemizedlist> - </sect1> - - <sect1><title>Key Sizes</title> - <para> - When allocating a cipher handle, the caller only specifies the - cipher type. Symmetric ciphers, however, typically support - multiple key sizes (e.g. AES-128 vs. AES-192 vs. AES-256). - These key sizes are determined with the length of the provided - key. Thus, the kernel crypto API does not provide a separate - way to select the particular symmetric cipher key size. - </para> - </sect1> - - <sect1><title>Cipher Allocation Type And Masks</title> - <para> - The different cipher handle allocation functions allow the - specification of a type and mask flag. Both parameters have - the following meaning (and are therefore not covered in the - subsequent sections). - </para> - - <para> - The type flag specifies the type of the cipher algorithm. - The caller usually provides a 0 when the caller wants the - default handling. Otherwise, the caller may provide the - following selections which match the aforementioned cipher - types: - </para> - - <itemizedlist> - <listitem> - <para>CRYPTO_ALG_TYPE_CIPHER Single block cipher</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_COMPRESS Compression</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_AEAD Authenticated Encryption with - Associated Data (MAC)</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_BLKCIPHER Synchronous multi-block cipher</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_ABLKCIPHER Asynchronous multi-block cipher</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_GIVCIPHER Asynchronous multi-block - cipher packed together with an IV generator (see geniv field - in the /proc/crypto listing for the known IV generators)</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_DIGEST Raw message digest</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_HASH Alias for CRYPTO_ALG_TYPE_DIGEST</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_SHASH Synchronous multi-block hash</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_AHASH Asynchronous multi-block hash</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_RNG Random Number Generation</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_AKCIPHER Asymmetric cipher</para> - </listitem> - <listitem> - <para>CRYPTO_ALG_TYPE_PCOMPRESS Enhanced version of - CRYPTO_ALG_TYPE_COMPRESS allowing for segmented compression / - decompression instead of performing the operation on one - segment only. CRYPTO_ALG_TYPE_PCOMPRESS is intended to replace - CRYPTO_ALG_TYPE_COMPRESS once existing consumers are converted.</para> - </listitem> - </itemizedlist> - - <para> - The mask flag restricts the type of cipher. The only allowed - flag is CRYPTO_ALG_ASYNC to restrict the cipher lookup function - to asynchronous ciphers. Usually, a caller provides a 0 for the - mask flag. - </para> - - <para> - When the caller provides a mask and type specification, the - caller limits the search the kernel crypto API can perform for - a suitable cipher implementation for the given cipher name. - That means, even when a caller uses a cipher name that exists - during its initialization call, the kernel crypto API may not - select it due to the used type and mask field. - </para> - </sect1> - - <sect1><title>Internal Structure of Kernel Crypto API</title> - - <para> - The kernel crypto API has an internal structure where a cipher - implementation may use many layers and indirections. This section - shall help to clarify how the kernel crypto API uses - various components to implement the complete cipher. - </para> - - <para> - The following subsections explain the internal structure based - on existing cipher implementations. The first section addresses - the most complex scenario where all other scenarios form a logical - subset. - </para> - - <sect2><title>Generic AEAD Cipher Structure</title> - - <para> - The following ASCII art decomposes the kernel crypto API layers - when using the AEAD cipher with the automated IV generation. The - shown example is used by the IPSEC layer. - </para> - - <para> - For other use cases of AEAD ciphers, the ASCII art applies as - well, but the caller may not use the AEAD cipher with a separate - IV generator. In this case, the caller must generate the IV. - </para> - - <para> - The depicted example decomposes the AEAD cipher of GCM(AES) based - on the generic C implementations (gcm.c, aes-generic.c, ctr.c, - ghash-generic.c, seqiv.c). The generic implementation serves as an - example showing the complete logic of the kernel crypto API. - </para> - - <para> - It is possible that some streamlined cipher implementations (like - AES-NI) provide implementations merging aspects which in the view - of the kernel crypto API cannot be decomposed into layers any more. - In case of the AES-NI implementation, the CTR mode, the GHASH - implementation and the AES cipher are all merged into one cipher - implementation registered with the kernel crypto API. In this case, - the concept described by the following ASCII art applies too. However, - the decomposition of GCM into the individual sub-components - by the kernel crypto API is not done any more. - </para> - - <para> - Each block in the following ASCII art is an independent cipher - instance obtained from the kernel crypto API. Each block - is accessed by the caller or by other blocks using the API functions - defined by the kernel crypto API for the cipher implementation type. - </para> - - <para> - The blocks below indicate the cipher type as well as the specific - logic implemented in the cipher. - </para> - - <para> - The ASCII art picture also indicates the call structure, i.e. who - calls which component. The arrows point to the invoked block - where the caller uses the API applicable to the cipher type - specified for the block. - </para> - - <programlisting> -<![CDATA[ -kernel crypto API | IPSEC Layer - | -+-----------+ | -| | (1) -| aead | <----------------------------------- esp_output -| (seqiv) | ---+ -+-----------+ | - | (2) -+-----------+ | -| | <--+ (2) -| aead | <----------------------------------- esp_input -| (gcm) | ------------+ -+-----------+ | - | (3) | (5) - v v -+-----------+ +-----------+ -| | | | -| skcipher | | ahash | -| (ctr) | ---+ | (ghash) | -+-----------+ | +-----------+ - | -+-----------+ | (4) -| | <--+ -| cipher | -| (aes) | -+-----------+ -]]> - </programlisting> - - <para> - The following call sequence is applicable when the IPSEC layer - triggers an encryption operation with the esp_output function. During - configuration, the administrator set up the use of rfc4106(gcm(aes)) as - the cipher for ESP. The following call sequence is now depicted in the - ASCII art above: - </para> - - <orderedlist> - <listitem> - <para> - esp_output() invokes crypto_aead_encrypt() to trigger an encryption - operation of the AEAD cipher with IV generator. - </para> - - <para> - In case of GCM, the SEQIV implementation is registered as GIVCIPHER - in crypto_rfc4106_alloc(). - </para> - - <para> - The SEQIV performs its operation to generate an IV where the core - function is seqiv_geniv(). - </para> - </listitem> - - <listitem> - <para> - Now, SEQIV uses the AEAD API function calls to invoke the associated - AEAD cipher. In our case, during the instantiation of SEQIV, the - cipher handle for GCM is provided to SEQIV. This means that SEQIV - invokes AEAD cipher operations with the GCM cipher handle. - </para> - - <para> - During instantiation of the GCM handle, the CTR(AES) and GHASH - ciphers are instantiated. The cipher handles for CTR(AES) and GHASH - are retained for later use. - </para> - - <para> - The GCM implementation is responsible to invoke the CTR mode AES and - the GHASH cipher in the right manner to implement the GCM - specification. - </para> - </listitem> - - <listitem> - <para> - The GCM AEAD cipher type implementation now invokes the SKCIPHER API - with the instantiated CTR(AES) cipher handle. - </para> - - <para> - During instantiation of the CTR(AES) cipher, the CIPHER type - implementation of AES is instantiated. The cipher handle for AES is - retained. - </para> - - <para> - That means that the SKCIPHER implementation of CTR(AES) only - implements the CTR block chaining mode. After performing the block - chaining operation, the CIPHER implementation of AES is invoked. - </para> - </listitem> - - <listitem> - <para> - The SKCIPHER of CTR(AES) now invokes the CIPHER API with the AES - cipher handle to encrypt one block. - </para> - </listitem> - - <listitem> - <para> - The GCM AEAD implementation also invokes the GHASH cipher - implementation via the AHASH API. - </para> - </listitem> - </orderedlist> - - <para> - When the IPSEC layer triggers the esp_input() function, the same call - sequence is followed with the only difference that the operation starts - with step (2). - </para> - </sect2> - - <sect2><title>Generic Block Cipher Structure</title> - <para> - Generic block ciphers follow the same concept as depicted with the ASCII - art picture above. - </para> - - <para> - For example, CBC(AES) is implemented with cbc.c, and aes-generic.c. The - ASCII art picture above applies as well with the difference that only - step (4) is used and the SKCIPHER block chaining mode is CBC. - </para> - </sect2> - - <sect2><title>Generic Keyed Message Digest Structure</title> - <para> - Keyed message digest implementations again follow the same concept as - depicted in the ASCII art picture above. - </para> - - <para> - For example, HMAC(SHA256) is implemented with hmac.c and - sha256_generic.c. The following ASCII art illustrates the - implementation: - </para> - - <programlisting> -<![CDATA[ -kernel crypto API | Caller - | -+-----------+ (1) | -| | <------------------ some_function -| ahash | -| (hmac) | ---+ -+-----------+ | - | (2) -+-----------+ | -| | <--+ -| shash | -| (sha256) | -+-----------+ -]]> - </programlisting> - - <para> - The following call sequence is applicable when a caller triggers - an HMAC operation: - </para> - - <orderedlist> - <listitem> - <para> - The AHASH API functions are invoked by the caller. The HMAC - implementation performs its operation as needed. - </para> - - <para> - During initialization of the HMAC cipher, the SHASH cipher type of - SHA256 is instantiated. The cipher handle for the SHA256 instance is - retained. - </para> - - <para> - At one time, the HMAC implementation requires a SHA256 operation - where the SHA256 cipher handle is used. - </para> - </listitem> - - <listitem> - <para> - The HMAC instance now invokes the SHASH API with the SHA256 - cipher handle to calculate the message digest. - </para> - </listitem> - </orderedlist> - </sect2> - </sect1> - </chapter> - - <chapter id="Development"><title>Developing Cipher Algorithms</title> - <sect1><title>Registering And Unregistering Transformation</title> - <para> - There are three distinct types of registration functions in - the Crypto API. One is used to register a generic cryptographic - transformation, while the other two are specific to HASH - transformations and COMPRESSion. We will discuss the latter - two in a separate chapter, here we will only look at the - generic ones. - </para> - - <para> - Before discussing the register functions, the data structure - to be filled with each, struct crypto_alg, must be considered - -- see below for a description of this data structure. - </para> - - <para> - The generic registration functions can be found in - include/linux/crypto.h and their definition can be seen below. - The former function registers a single transformation, while - the latter works on an array of transformation descriptions. - The latter is useful when registering transformations in bulk, - for example when a driver implements multiple transformations. - </para> - - <programlisting> - int crypto_register_alg(struct crypto_alg *alg); - int crypto_register_algs(struct crypto_alg *algs, int count); - </programlisting> - - <para> - The counterparts to those functions are listed below. - </para> - - <programlisting> - int crypto_unregister_alg(struct crypto_alg *alg); - int crypto_unregister_algs(struct crypto_alg *algs, int count); - </programlisting> - - <para> - Notice that both registration and unregistration functions - do return a value, so make sure to handle errors. A return - code of zero implies success. Any return code < 0 implies - an error. - </para> - - <para> - The bulk registration/unregistration functions - register/unregister each transformation in the given array of - length count. They handle errors as follows: - </para> - <itemizedlist> - <listitem> - <para> - crypto_register_algs() succeeds if and only if it - successfully registers all the given transformations. If an - error occurs partway through, then it rolls back successful - registrations before returning the error code. Note that if - a driver needs to handle registration errors for individual - transformations, then it will need to use the non-bulk - function crypto_register_alg() instead. - </para> - </listitem> - <listitem> - <para> - crypto_unregister_algs() tries to unregister all the given - transformations, continuing on error. It logs errors and - always returns zero. - </para> - </listitem> - </itemizedlist> - - </sect1> - - <sect1><title>Single-Block Symmetric Ciphers [CIPHER]</title> - <para> - Example of transformations: aes, arc4, ... - </para> - - <para> - This section describes the simplest of all transformation - implementations, that being the CIPHER type used for symmetric - ciphers. The CIPHER type is used for transformations which - operate on exactly one block at a time and there are no - dependencies between blocks at all. - </para> - - <sect2><title>Registration specifics</title> - <para> - The registration of [CIPHER] algorithm is specific in that - struct crypto_alg field .cra_type is empty. The .cra_u.cipher - has to be filled in with proper callbacks to implement this - transformation. - </para> - - <para> - See struct cipher_alg below. - </para> - </sect2> - - <sect2><title>Cipher Definition With struct cipher_alg</title> - <para> - Struct cipher_alg defines a single block cipher. - </para> - - <para> - Here are schematics of how these functions are called when - operated from other part of the kernel. Note that the - .cia_setkey() call might happen before or after any of these - schematics happen, but must not happen during any of these - are in-flight. - </para> - - <para> - <programlisting> - KEY ---. PLAINTEXT ---. - v v - .cia_setkey() -> .cia_encrypt() - | - '-----> CIPHERTEXT - </programlisting> - </para> - - <para> - Please note that a pattern where .cia_setkey() is called - multiple times is also valid: - </para> - - <para> - <programlisting> - - KEY1 --. PLAINTEXT1 --. KEY2 --. PLAINTEXT2 --. - v v v v - .cia_setkey() -> .cia_encrypt() -> .cia_setkey() -> .cia_encrypt() - | | - '---> CIPHERTEXT1 '---> CIPHERTEXT2 - </programlisting> - </para> - - </sect2> - </sect1> - - <sect1><title>Multi-Block Ciphers</title> - <para> - Example of transformations: cbc(aes), ecb(arc4), ... - </para> - - <para> - This section describes the multi-block cipher transformation - implementations. The multi-block ciphers are - used for transformations which operate on scatterlists of - data supplied to the transformation functions. They output - the result into a scatterlist of data as well. - </para> - - <sect2><title>Registration Specifics</title> - - <para> - The registration of multi-block cipher algorithms - is one of the most standard procedures throughout the crypto API. - </para> - - <para> - Note, if a cipher implementation requires a proper alignment - of data, the caller should use the functions of - crypto_skcipher_alignmask() to identify a memory alignment mask. - The kernel crypto API is able to process requests that are unaligned. - This implies, however, additional overhead as the kernel - crypto API needs to perform the realignment of the data which - may imply moving of data. - </para> - </sect2> - - <sect2><title>Cipher Definition With struct blkcipher_alg and ablkcipher_alg</title> - <para> - Struct blkcipher_alg defines a synchronous block cipher whereas - struct ablkcipher_alg defines an asynchronous block cipher. - </para> - - <para> - Please refer to the single block cipher description for schematics - of the block cipher usage. - </para> - </sect2> - - <sect2><title>Specifics Of Asynchronous Multi-Block Cipher</title> - <para> - There are a couple of specifics to the asynchronous interface. - </para> - - <para> - First of all, some of the drivers will want to use the - Generic ScatterWalk in case the hardware needs to be fed - separate chunks of the scatterlist which contains the - plaintext and will contain the ciphertext. Please refer - to the ScatterWalk interface offered by the Linux kernel - scatter / gather list implementation. - </para> - </sect2> - </sect1> - - <sect1><title>Hashing [HASH]</title> - - <para> - Example of transformations: crc32, md5, sha1, sha256,... - </para> - - <sect2><title>Registering And Unregistering The Transformation</title> - - <para> - There are multiple ways to register a HASH transformation, - depending on whether the transformation is synchronous [SHASH] - or asynchronous [AHASH] and the amount of HASH transformations - we are registering. You can find the prototypes defined in - include/crypto/internal/hash.h: - </para> - - <programlisting> - int crypto_register_ahash(struct ahash_alg *alg); - - int crypto_register_shash(struct shash_alg *alg); - int crypto_register_shashes(struct shash_alg *algs, int count); - </programlisting> - - <para> - The respective counterparts for unregistering the HASH - transformation are as follows: - </para> - - <programlisting> - int crypto_unregister_ahash(struct ahash_alg *alg); - - int crypto_unregister_shash(struct shash_alg *alg); - int crypto_unregister_shashes(struct shash_alg *algs, int count); - </programlisting> - </sect2> - - <sect2><title>Cipher Definition With struct shash_alg and ahash_alg</title> - <para> - Here are schematics of how these functions are called when - operated from other part of the kernel. Note that the .setkey() - call might happen before or after any of these schematics happen, - but must not happen during any of these are in-flight. Please note - that calling .init() followed immediately by .finish() is also a - perfectly valid transformation. - </para> - - <programlisting> - I) DATA -----------. - v - .init() -> .update() -> .final() ! .update() might not be called - ^ | | at all in this scenario. - '----' '---> HASH - - II) DATA -----------.-----------. - v v - .init() -> .update() -> .finup() ! .update() may not be called - ^ | | at all in this scenario. - '----' '---> HASH - - III) DATA -----------. - v - .digest() ! The entire process is handled - | by the .digest() call. - '---------------> HASH - </programlisting> - - <para> - Here is a schematic of how the .export()/.import() functions are - called when used from another part of the kernel. - </para> - - <programlisting> - KEY--. DATA--. - v v ! .update() may not be called - .setkey() -> .init() -> .update() -> .export() at all in this scenario. - ^ | | - '-----' '--> PARTIAL_HASH - - ----------- other transformations happen here ----------- - - PARTIAL_HASH--. DATA1--. - v v - .import -> .update() -> .final() ! .update() may not be called - ^ | | at all in this scenario. - '----' '--> HASH1 - - PARTIAL_HASH--. DATA2-. - v v - .import -> .finup() - | - '---------------> HASH2 - </programlisting> - </sect2> - - <sect2><title>Specifics Of Asynchronous HASH Transformation</title> - <para> - Some of the drivers will want to use the Generic ScatterWalk - in case the implementation needs to be fed separate chunks of the - scatterlist which contains the input data. The buffer containing - the resulting hash will always be properly aligned to - .cra_alignmask so there is no need to worry about this. - </para> - </sect2> - </sect1> - </chapter> - - <chapter id="User"><title>User Space Interface</title> - <sect1><title>Introduction</title> - <para> - The concepts of the kernel crypto API visible to kernel space is fully - applicable to the user space interface as well. Therefore, the kernel - crypto API high level discussion for the in-kernel use cases applies - here as well. - </para> - - <para> - The major difference, however, is that user space can only act as a - consumer and never as a provider of a transformation or cipher algorithm. - </para> - - <para> - The following covers the user space interface exported by the kernel - crypto API. A working example of this description is libkcapi that - can be obtained from [1]. That library can be used by user space - applications that require cryptographic services from the kernel. - </para> - - <para> - Some details of the in-kernel kernel crypto API aspects do not - apply to user space, however. This includes the difference between - synchronous and asynchronous invocations. The user space API call - is fully synchronous. - </para> - - <para> - [1] <ulink url="http://www.chronox.de/libkcapi.html">http://www.chronox.de/libkcapi.html</ulink> - </para> - - </sect1> - - <sect1><title>User Space API General Remarks</title> - <para> - The kernel crypto API is accessible from user space. Currently, - the following ciphers are accessible: - </para> - - <itemizedlist> - <listitem> - <para>Message digest including keyed message digest (HMAC, CMAC)</para> - </listitem> - - <listitem> - <para>Symmetric ciphers</para> - </listitem> - - <listitem> - <para>AEAD ciphers</para> - </listitem> - - <listitem> - <para>Random Number Generators</para> - </listitem> - </itemizedlist> - - <para> - The interface is provided via socket type using the type AF_ALG. - In addition, the setsockopt option type is SOL_ALG. In case the - user space header files do not export these flags yet, use the - following macros: - </para> - - <programlisting> -#ifndef AF_ALG -#define AF_ALG 38 -#endif -#ifndef SOL_ALG -#define SOL_ALG 279 -#endif - </programlisting> - - <para> - A cipher is accessed with the same name as done for the in-kernel - API calls. This includes the generic vs. unique naming schema for - ciphers as well as the enforcement of priorities for generic names. - </para> - - <para> - To interact with the kernel crypto API, a socket must be - created by the user space application. User space invokes the cipher - operation with the send()/write() system call family. The result of the - cipher operation is obtained with the read()/recv() system call family. - </para> - - <para> - The following API calls assume that the socket descriptor - is already opened by the user space application and discusses only - the kernel crypto API specific invocations. - </para> - - <para> - To initialize the socket interface, the following sequence has to - be performed by the consumer: - </para> - - <orderedlist> - <listitem> - <para> - Create a socket of type AF_ALG with the struct sockaddr_alg - parameter specified below for the different cipher types. - </para> - </listitem> - - <listitem> - <para> - Invoke bind with the socket descriptor - </para> - </listitem> - - <listitem> - <para> - Invoke accept with the socket descriptor. The accept system call - returns a new file descriptor that is to be used to interact with - the particular cipher instance. When invoking send/write or recv/read - system calls to send data to the kernel or obtain data from the - kernel, the file descriptor returned by accept must be used. - </para> - </listitem> - </orderedlist> - </sect1> - - <sect1><title>In-place Cipher operation</title> - <para> - Just like the in-kernel operation of the kernel crypto API, the user - space interface allows the cipher operation in-place. That means that - the input buffer used for the send/write system call and the output - buffer used by the read/recv system call may be one and the same. - This is of particular interest for symmetric cipher operations where a - copying of the output data to its final destination can be avoided. - </para> - - <para> - If a consumer on the other hand wants to maintain the plaintext and - the ciphertext in different memory locations, all a consumer needs - to do is to provide different memory pointers for the encryption and - decryption operation. - </para> - </sect1> - - <sect1><title>Message Digest API</title> - <para> - The message digest type to be used for the cipher operation is - selected when invoking the bind syscall. bind requires the caller - to provide a filled struct sockaddr data structure. This data - structure must be filled as follows: - </para> - - <programlisting> -struct sockaddr_alg sa = { - .salg_family = AF_ALG, - .salg_type = "hash", /* this selects the hash logic in the kernel */ - .salg_name = "sha1" /* this is the cipher name */ -}; - </programlisting> - - <para> - The salg_type value "hash" applies to message digests and keyed - message digests. Though, a keyed message digest is referenced by - the appropriate salg_name. Please see below for the setsockopt - interface that explains how the key can be set for a keyed message - digest. - </para> - - <para> - Using the send() system call, the application provides the data that - should be processed with the message digest. The send system call - allows the following flags to be specified: - </para> - - <itemizedlist> - <listitem> - <para> - MSG_MORE: If this flag is set, the send system call acts like a - message digest update function where the final hash is not - yet calculated. If the flag is not set, the send system call - calculates the final message digest immediately. - </para> - </listitem> - </itemizedlist> - - <para> - With the recv() system call, the application can read the message - digest from the kernel crypto API. If the buffer is too small for the - message digest, the flag MSG_TRUNC is set by the kernel. - </para> - - <para> - In order to set a message digest key, the calling application must use - the setsockopt() option of ALG_SET_KEY. If the key is not set the HMAC - operation is performed without the initial HMAC state change caused by - the key. - </para> - </sect1> - - <sect1><title>Symmetric Cipher API</title> - <para> - The operation is very similar to the message digest discussion. - During initialization, the struct sockaddr data structure must be - filled as follows: - </para> - - <programlisting> -struct sockaddr_alg sa = { - .salg_family = AF_ALG, - .salg_type = "skcipher", /* this selects the symmetric cipher */ - .salg_name = "cbc(aes)" /* this is the cipher name */ -}; - </programlisting> - - <para> - Before data can be sent to the kernel using the write/send system - call family, the consumer must set the key. The key setting is - described with the setsockopt invocation below. - </para> - - <para> - Using the sendmsg() system call, the application provides the data that should be processed for encryption or decryption. In addition, the IV is - specified with the data structure provided by the sendmsg() system call. - </para> - - <para> - The sendmsg system call parameter of struct msghdr is embedded into the - struct cmsghdr data structure. See recv(2) and cmsg(3) for more - information on how the cmsghdr data structure is used together with the - send/recv system call family. That cmsghdr data structure holds the - following information specified with a separate header instances: - </para> - - <itemizedlist> - <listitem> - <para> - specification of the cipher operation type with one of these flags: - </para> - <itemizedlist> - <listitem> - <para>ALG_OP_ENCRYPT - encryption of data</para> - </listitem> - <listitem> - <para>ALG_OP_DECRYPT - decryption of data</para> - </listitem> - </itemizedlist> - </listitem> - - <listitem> - <para> - specification of the IV information marked with the flag ALG_SET_IV - </para> - </listitem> - </itemizedlist> - - <para> - The send system call family allows the following flag to be specified: - </para> - - <itemizedlist> - <listitem> - <para> - MSG_MORE: If this flag is set, the send system call acts like a - cipher update function where more input data is expected - with a subsequent invocation of the send system call. - </para> - </listitem> - </itemizedlist> - - <para> - Note: The kernel reports -EINVAL for any unexpected data. The caller - must make sure that all data matches the constraints given in - /proc/crypto for the selected cipher. - </para> - - <para> - With the recv() system call, the application can read the result of - the cipher operation from the kernel crypto API. The output buffer - must be at least as large as to hold all blocks of the encrypted or - decrypted data. If the output data size is smaller, only as many - blocks are returned that fit into that output buffer size. - </para> - </sect1> - - <sect1><title>AEAD Cipher API</title> - <para> - The operation is very similar to the symmetric cipher discussion. - During initialization, the struct sockaddr data structure must be - filled as follows: - </para> - - <programlisting> -struct sockaddr_alg sa = { - .salg_family = AF_ALG, - .salg_type = "aead", /* this selects the symmetric cipher */ - .salg_name = "gcm(aes)" /* this is the cipher name */ -}; - </programlisting> - - <para> - Before data can be sent to the kernel using the write/send system - call family, the consumer must set the key. The key setting is - described with the setsockopt invocation below. - </para> - - <para> - In addition, before data can be sent to the kernel using the - write/send system call family, the consumer must set the authentication - tag size. To set the authentication tag size, the caller must use the - setsockopt invocation described below. - </para> - - <para> - Using the sendmsg() system call, the application provides the data that should be processed for encryption or decryption. In addition, the IV is - specified with the data structure provided by the sendmsg() system call. - </para> - - <para> - The sendmsg system call parameter of struct msghdr is embedded into the - struct cmsghdr data structure. See recv(2) and cmsg(3) for more - information on how the cmsghdr data structure is used together with the - send/recv system call family. That cmsghdr data structure holds the - following information specified with a separate header instances: - </para> - - <itemizedlist> - <listitem> - <para> - specification of the cipher operation type with one of these flags: - </para> - <itemizedlist> - <listitem> - <para>ALG_OP_ENCRYPT - encryption of data</para> - </listitem> - <listitem> - <para>ALG_OP_DECRYPT - decryption of data</para> - </listitem> - </itemizedlist> - </listitem> - - <listitem> - <para> - specification of the IV information marked with the flag ALG_SET_IV - </para> - </listitem> - - <listitem> - <para> - specification of the associated authentication data (AAD) with the - flag ALG_SET_AEAD_ASSOCLEN. The AAD is sent to the kernel together - with the plaintext / ciphertext. See below for the memory structure. - </para> - </listitem> - </itemizedlist> - - <para> - The send system call family allows the following flag to be specified: - </para> - - <itemizedlist> - <listitem> - <para> - MSG_MORE: If this flag is set, the send system call acts like a - cipher update function where more input data is expected - with a subsequent invocation of the send system call. - </para> - </listitem> - </itemizedlist> - - <para> - Note: The kernel reports -EINVAL for any unexpected data. The caller - must make sure that all data matches the constraints given in - /proc/crypto for the selected cipher. - </para> - - <para> - With the recv() system call, the application can read the result of - the cipher operation from the kernel crypto API. The output buffer - must be at least as large as defined with the memory structure below. - If the output data size is smaller, the cipher operation is not performed. - </para> - - <para> - The authenticated decryption operation may indicate an integrity error. - Such breach in integrity is marked with the -EBADMSG error code. - </para> - - <sect2><title>AEAD Memory Structure</title> - <para> - The AEAD cipher operates with the following information that - is communicated between user and kernel space as one data stream: - </para> - - <itemizedlist> - <listitem> - <para>plaintext or ciphertext</para> - </listitem> - - <listitem> - <para>associated authentication data (AAD)</para> - </listitem> - - <listitem> - <para>authentication tag</para> - </listitem> - </itemizedlist> - - <para> - The sizes of the AAD and the authentication tag are provided with - the sendmsg and setsockopt calls (see there). As the kernel knows - the size of the entire data stream, the kernel is now able to - calculate the right offsets of the data components in the data - stream. - </para> - - <para> - The user space caller must arrange the aforementioned information - in the following order: - </para> - - <itemizedlist> - <listitem> - <para> - AEAD encryption input: AAD || plaintext - </para> - </listitem> - - <listitem> - <para> - AEAD decryption input: AAD || ciphertext || authentication tag - </para> - </listitem> - </itemizedlist> - - <para> - The output buffer the user space caller provides must be at least as - large to hold the following data: - </para> - - <itemizedlist> - <listitem> - <para> - AEAD encryption output: ciphertext || authentication tag - </para> - </listitem> - - <listitem> - <para> - AEAD decryption output: plaintext - </para> - </listitem> - </itemizedlist> - </sect2> - </sect1> - - <sect1><title>Random Number Generator API</title> - <para> - Again, the operation is very similar to the other APIs. - During initialization, the struct sockaddr data structure must be - filled as follows: - </para> - - <programlisting> -struct sockaddr_alg sa = { - .salg_family = AF_ALG, - .salg_type = "rng", /* this selects the symmetric cipher */ - .salg_name = "drbg_nopr_sha256" /* this is the cipher name */ -}; - </programlisting> - - <para> - Depending on the RNG type, the RNG must be seeded. The seed is provided - using the setsockopt interface to set the key. For example, the - ansi_cprng requires a seed. The DRBGs do not require a seed, but - may be seeded. - </para> - - <para> - Using the read()/recvmsg() system calls, random numbers can be obtained. - The kernel generates at most 128 bytes in one call. If user space - requires more data, multiple calls to read()/recvmsg() must be made. - </para> - - <para> - WARNING: The user space caller may invoke the initially mentioned - accept system call multiple times. In this case, the returned file - descriptors have the same state. - </para> - - </sect1> - - <sect1><title>Zero-Copy Interface</title> - <para> - In addition to the send/write/read/recv system call family, the AF_ALG - interface can be accessed with the zero-copy interface of splice/vmsplice. - As the name indicates, the kernel tries to avoid a copy operation into - kernel space. - </para> - - <para> - The zero-copy operation requires data to be aligned at the page boundary. - Non-aligned data can be used as well, but may require more operations of - the kernel which would defeat the speed gains obtained from the zero-copy - interface. - </para> - - <para> - The system-interent limit for the size of one zero-copy operation is - 16 pages. If more data is to be sent to AF_ALG, user space must slice - the input into segments with a maximum size of 16 pages. - </para> - - <para> - Zero-copy can be used with the following code example (a complete working - example is provided with libkcapi): - </para> - - <programlisting> -int pipes[2]; - -pipe(pipes); -/* input data in iov */ -vmsplice(pipes[1], iov, iovlen, SPLICE_F_GIFT); -/* opfd is the file descriptor returned from accept() system call */ -splice(pipes[0], NULL, opfd, NULL, ret, 0); -read(opfd, out, outlen); - </programlisting> - - </sect1> - - <sect1><title>Setsockopt Interface</title> - <para> - In addition to the read/recv and send/write system call handling - to send and retrieve data subject to the cipher operation, a consumer - also needs to set the additional information for the cipher operation. - This additional information is set using the setsockopt system call - that must be invoked with the file descriptor of the open cipher - (i.e. the file descriptor returned by the accept system call). - </para> - - <para> - Each setsockopt invocation must use the level SOL_ALG. - </para> - - <para> - The setsockopt interface allows setting the following data using - the mentioned optname: - </para> - - <itemizedlist> - <listitem> - <para> - ALG_SET_KEY -- Setting the key. Key setting is applicable to: - </para> - <itemizedlist> - <listitem> - <para>the skcipher cipher type (symmetric ciphers)</para> - </listitem> - <listitem> - <para>the hash cipher type (keyed message digests)</para> - </listitem> - <listitem> - <para>the AEAD cipher type</para> - </listitem> - <listitem> - <para>the RNG cipher type to provide the seed</para> - </listitem> - </itemizedlist> - </listitem> - - <listitem> - <para> - ALG_SET_AEAD_AUTHSIZE -- Setting the authentication tag size - for AEAD ciphers. For a encryption operation, the authentication - tag of the given size will be generated. For a decryption operation, - the provided ciphertext is assumed to contain an authentication tag - of the given size (see section about AEAD memory layout below). - </para> - </listitem> - </itemizedlist> - - </sect1> - - <sect1><title>User space API example</title> - <para> - Please see [1] for libkcapi which provides an easy-to-use wrapper - around the aforementioned Netlink kernel interface. [1] also contains - a test application that invokes all libkcapi API calls. - </para> - - <para> - [1] <ulink url="http://www.chronox.de/libkcapi.html">http://www.chronox.de/libkcapi.html</ulink> - </para> - - </sect1> - - </chapter> - - <chapter id="API"><title>Programming Interface</title> - <para> - Please note that the kernel crypto API contains the AEAD givcrypt - API (crypto_aead_giv* and aead_givcrypt_* function calls in - include/crypto/aead.h). This API is obsolete and will be removed - in the future. To obtain the functionality of an AEAD cipher with - internal IV generation, use the IV generator as a regular cipher. - For example, rfc4106(gcm(aes)) is the AEAD cipher with external - IV generation and seqniv(rfc4106(gcm(aes))) implies that the kernel - crypto API generates the IV. Different IV generators are available. - </para> - <sect1><title>Block Cipher Context Data Structures</title> -!Pinclude/linux/crypto.h Block Cipher Context Data Structures -!Finclude/crypto/aead.h aead_request - </sect1> - <sect1><title>Block Cipher Algorithm Definitions</title> -!Pinclude/linux/crypto.h Block Cipher Algorithm Definitions -!Finclude/linux/crypto.h crypto_alg -!Finclude/linux/crypto.h ablkcipher_alg -!Finclude/crypto/aead.h aead_alg -!Finclude/linux/crypto.h blkcipher_alg -!Finclude/linux/crypto.h cipher_alg -!Finclude/crypto/rng.h rng_alg - </sect1> - <sect1><title>Symmetric Key Cipher API</title> -!Pinclude/crypto/skcipher.h Symmetric Key Cipher API -!Finclude/crypto/skcipher.h crypto_alloc_skcipher -!Finclude/crypto/skcipher.h crypto_free_skcipher -!Finclude/crypto/skcipher.h crypto_has_skcipher -!Finclude/crypto/skcipher.h crypto_skcipher_ivsize -!Finclude/crypto/skcipher.h crypto_skcipher_blocksize -!Finclude/crypto/skcipher.h crypto_skcipher_setkey -!Finclude/crypto/skcipher.h crypto_skcipher_reqtfm -!Finclude/crypto/skcipher.h crypto_skcipher_encrypt -!Finclude/crypto/skcipher.h crypto_skcipher_decrypt - </sect1> - <sect1><title>Symmetric Key Cipher Request Handle</title> -!Pinclude/crypto/skcipher.h Symmetric Key Cipher Request Handle -!Finclude/crypto/skcipher.h crypto_skcipher_reqsize -!Finclude/crypto/skcipher.h skcipher_request_set_tfm -!Finclude/crypto/skcipher.h skcipher_request_alloc -!Finclude/crypto/skcipher.h skcipher_request_free -!Finclude/crypto/skcipher.h skcipher_request_set_callback -!Finclude/crypto/skcipher.h skcipher_request_set_crypt - </sect1> - <sect1><title>Asynchronous Block Cipher API - Deprecated</title> -!Pinclude/linux/crypto.h Asynchronous Block Cipher API -!Finclude/linux/crypto.h crypto_alloc_ablkcipher -!Finclude/linux/crypto.h crypto_free_ablkcipher -!Finclude/linux/crypto.h crypto_has_ablkcipher -!Finclude/linux/crypto.h crypto_ablkcipher_ivsize -!Finclude/linux/crypto.h crypto_ablkcipher_blocksize -!Finclude/linux/crypto.h crypto_ablkcipher_setkey -!Finclude/linux/crypto.h crypto_ablkcipher_reqtfm -!Finclude/linux/crypto.h crypto_ablkcipher_encrypt -!Finclude/linux/crypto.h crypto_ablkcipher_decrypt - </sect1> - <sect1><title>Asynchronous Cipher Request Handle - Deprecated</title> -!Pinclude/linux/crypto.h Asynchronous Cipher Request Handle -!Finclude/linux/crypto.h crypto_ablkcipher_reqsize -!Finclude/linux/crypto.h ablkcipher_request_set_tfm -!Finclude/linux/crypto.h ablkcipher_request_alloc -!Finclude/linux/crypto.h ablkcipher_request_free -!Finclude/linux/crypto.h ablkcipher_request_set_callback -!Finclude/linux/crypto.h ablkcipher_request_set_crypt - </sect1> - <sect1><title>Authenticated Encryption With Associated Data (AEAD) Cipher API</title> -!Pinclude/crypto/aead.h Authenticated Encryption With Associated Data (AEAD) Cipher API -!Finclude/crypto/aead.h crypto_alloc_aead -!Finclude/crypto/aead.h crypto_free_aead -!Finclude/crypto/aead.h crypto_aead_ivsize -!Finclude/crypto/aead.h crypto_aead_authsize -!Finclude/crypto/aead.h crypto_aead_blocksize -!Finclude/crypto/aead.h crypto_aead_setkey -!Finclude/crypto/aead.h crypto_aead_setauthsize -!Finclude/crypto/aead.h crypto_aead_encrypt -!Finclude/crypto/aead.h crypto_aead_decrypt - </sect1> - <sect1><title>Asynchronous AEAD Request Handle</title> -!Pinclude/crypto/aead.h Asynchronous AEAD Request Handle -!Finclude/crypto/aead.h crypto_aead_reqsize -!Finclude/crypto/aead.h aead_request_set_tfm -!Finclude/crypto/aead.h aead_request_alloc -!Finclude/crypto/aead.h aead_request_free -!Finclude/crypto/aead.h aead_request_set_callback -!Finclude/crypto/aead.h aead_request_set_crypt -!Finclude/crypto/aead.h aead_request_set_ad - </sect1> - <sect1><title>Synchronous Block Cipher API - Deprecated</title> -!Pinclude/linux/crypto.h Synchronous Block Cipher API -!Finclude/linux/crypto.h crypto_alloc_blkcipher -!Finclude/linux/crypto.h crypto_free_blkcipher -!Finclude/linux/crypto.h crypto_has_blkcipher -!Finclude/linux/crypto.h crypto_blkcipher_name -!Finclude/linux/crypto.h crypto_blkcipher_ivsize -!Finclude/linux/crypto.h crypto_blkcipher_blocksize -!Finclude/linux/crypto.h crypto_blkcipher_setkey -!Finclude/linux/crypto.h crypto_blkcipher_encrypt -!Finclude/linux/crypto.h crypto_blkcipher_encrypt_iv -!Finclude/linux/crypto.h crypto_blkcipher_decrypt -!Finclude/linux/crypto.h crypto_blkcipher_decrypt_iv -!Finclude/linux/crypto.h crypto_blkcipher_set_iv -!Finclude/linux/crypto.h crypto_blkcipher_get_iv - </sect1> - <sect1><title>Single Block Cipher API</title> -!Pinclude/linux/crypto.h Single Block Cipher API -!Finclude/linux/crypto.h crypto_alloc_cipher -!Finclude/linux/crypto.h crypto_free_cipher -!Finclude/linux/crypto.h crypto_has_cipher -!Finclude/linux/crypto.h crypto_cipher_blocksize -!Finclude/linux/crypto.h crypto_cipher_setkey -!Finclude/linux/crypto.h crypto_cipher_encrypt_one -!Finclude/linux/crypto.h crypto_cipher_decrypt_one - </sect1> - <sect1><title>Message Digest Algorithm Definitions</title> -!Pinclude/crypto/hash.h Message Digest Algorithm Definitions -!Finclude/crypto/hash.h hash_alg_common -!Finclude/crypto/hash.h ahash_alg -!Finclude/crypto/hash.h shash_alg - </sect1> - <sect1><title>Asynchronous Message Digest API</title> -!Pinclude/crypto/hash.h Asynchronous Message Digest API -!Finclude/crypto/hash.h crypto_alloc_ahash -!Finclude/crypto/hash.h crypto_free_ahash -!Finclude/crypto/hash.h crypto_ahash_init -!Finclude/crypto/hash.h crypto_ahash_digestsize -!Finclude/crypto/hash.h crypto_ahash_reqtfm -!Finclude/crypto/hash.h crypto_ahash_reqsize -!Finclude/crypto/hash.h crypto_ahash_setkey -!Finclude/crypto/hash.h crypto_ahash_finup -!Finclude/crypto/hash.h crypto_ahash_final -!Finclude/crypto/hash.h crypto_ahash_digest -!Finclude/crypto/hash.h crypto_ahash_export -!Finclude/crypto/hash.h crypto_ahash_import - </sect1> - <sect1><title>Asynchronous Hash Request Handle</title> -!Pinclude/crypto/hash.h Asynchronous Hash Request Handle -!Finclude/crypto/hash.h ahash_request_set_tfm -!Finclude/crypto/hash.h ahash_request_alloc -!Finclude/crypto/hash.h ahash_request_free -!Finclude/crypto/hash.h ahash_request_set_callback -!Finclude/crypto/hash.h ahash_request_set_crypt - </sect1> - <sect1><title>Synchronous Message Digest API</title> -!Pinclude/crypto/hash.h Synchronous Message Digest API -!Finclude/crypto/hash.h crypto_alloc_shash -!Finclude/crypto/hash.h crypto_free_shash -!Finclude/crypto/hash.h crypto_shash_blocksize -!Finclude/crypto/hash.h crypto_shash_digestsize -!Finclude/crypto/hash.h crypto_shash_descsize -!Finclude/crypto/hash.h crypto_shash_setkey -!Finclude/crypto/hash.h crypto_shash_digest -!Finclude/crypto/hash.h crypto_shash_export -!Finclude/crypto/hash.h crypto_shash_import -!Finclude/crypto/hash.h crypto_shash_init -!Finclude/crypto/hash.h crypto_shash_update -!Finclude/crypto/hash.h crypto_shash_final -!Finclude/crypto/hash.h crypto_shash_finup - </sect1> - <sect1><title>Crypto API Random Number API</title> -!Pinclude/crypto/rng.h Random number generator API -!Finclude/crypto/rng.h crypto_alloc_rng -!Finclude/crypto/rng.h crypto_rng_alg -!Finclude/crypto/rng.h crypto_free_rng -!Finclude/crypto/rng.h crypto_rng_generate -!Finclude/crypto/rng.h crypto_rng_get_bytes -!Finclude/crypto/rng.h crypto_rng_reset -!Finclude/crypto/rng.h crypto_rng_seedsize -!Cinclude/crypto/rng.h - </sect1> - <sect1><title>Asymmetric Cipher API</title> -!Pinclude/crypto/akcipher.h Generic Public Key API -!Finclude/crypto/akcipher.h akcipher_alg -!Finclude/crypto/akcipher.h akcipher_request -!Finclude/crypto/akcipher.h crypto_alloc_akcipher -!Finclude/crypto/akcipher.h crypto_free_akcipher -!Finclude/crypto/akcipher.h crypto_akcipher_set_pub_key -!Finclude/crypto/akcipher.h crypto_akcipher_set_priv_key - </sect1> - <sect1><title>Asymmetric Cipher Request Handle</title> -!Finclude/crypto/akcipher.h akcipher_request_alloc -!Finclude/crypto/akcipher.h akcipher_request_free -!Finclude/crypto/akcipher.h akcipher_request_set_callback -!Finclude/crypto/akcipher.h akcipher_request_set_crypt -!Finclude/crypto/akcipher.h crypto_akcipher_maxsize -!Finclude/crypto/akcipher.h crypto_akcipher_encrypt -!Finclude/crypto/akcipher.h crypto_akcipher_decrypt -!Finclude/crypto/akcipher.h crypto_akcipher_sign -!Finclude/crypto/akcipher.h crypto_akcipher_verify - </sect1> - </chapter> - - <chapter id="Code"><title>Code Examples</title> - <sect1><title>Code Example For Symmetric Key Cipher Operation</title> - <programlisting> - -struct tcrypt_result { - struct completion completion; - int err; -}; - -/* tie all data structures together */ -struct skcipher_def { - struct scatterlist sg; - struct crypto_skcipher *tfm; - struct skcipher_request *req; - struct tcrypt_result result; -}; - -/* Callback function */ -static void test_skcipher_cb(struct crypto_async_request *req, int error) -{ - struct tcrypt_result *result = req->data; - - if (error == -EINPROGRESS) - return; - result->err = error; - complete(&result->completion); - pr_info("Encryption finished successfully\n"); -} - -/* Perform cipher operation */ -static unsigned int test_skcipher_encdec(struct skcipher_def *sk, - int enc) -{ - int rc = 0; - - if (enc) - rc = crypto_skcipher_encrypt(sk->req); - else - rc = crypto_skcipher_decrypt(sk->req); - - switch (rc) { - case 0: - break; - case -EINPROGRESS: - case -EBUSY: - rc = wait_for_completion_interruptible( - &sk->result.completion); - if (!rc && !sk->result.err) { - reinit_completion(&sk->result.completion); - break; - } - default: - pr_info("skcipher encrypt returned with %d result %d\n", - rc, sk->result.err); - break; - } - init_completion(&sk->result.completion); - - return rc; -} - -/* Initialize and trigger cipher operation */ -static int test_skcipher(void) -{ - struct skcipher_def sk; - struct crypto_skcipher *skcipher = NULL; - struct skcipher_request *req = NULL; - char *scratchpad = NULL; - char *ivdata = NULL; - unsigned char key[32]; - int ret = -EFAULT; - - skcipher = crypto_alloc_skcipher("cbc-aes-aesni", 0, 0); - if (IS_ERR(skcipher)) { - pr_info("could not allocate skcipher handle\n"); - return PTR_ERR(skcipher); - } - - req = skcipher_request_alloc(skcipher, GFP_KERNEL); - if (!req) { - pr_info("could not allocate skcipher request\n"); - ret = -ENOMEM; - goto out; - } - - skcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG, - test_skcipher_cb, - &sk.result); - - /* AES 256 with random key */ - get_random_bytes(&key, 32); - if (crypto_skcipher_setkey(skcipher, key, 32)) { - pr_info("key could not be set\n"); - ret = -EAGAIN; - goto out; - } - - /* IV will be random */ - ivdata = kmalloc(16, GFP_KERNEL); - if (!ivdata) { - pr_info("could not allocate ivdata\n"); - goto out; - } - get_random_bytes(ivdata, 16); - - /* Input data will be random */ - scratchpad = kmalloc(16, GFP_KERNEL); - if (!scratchpad) { - pr_info("could not allocate scratchpad\n"); - goto out; - } - get_random_bytes(scratchpad, 16); - - sk.tfm = skcipher; - sk.req = req; - - /* We encrypt one block */ - sg_init_one(&sk.sg, scratchpad, 16); - skcipher_request_set_crypt(req, &sk.sg, &sk.sg, 16, ivdata); - init_completion(&sk.result.completion); - - /* encrypt data */ - ret = test_skcipher_encdec(&sk, 1); - if (ret) - goto out; - - pr_info("Encryption triggered successfully\n"); - -out: - if (skcipher) - crypto_free_skcipher(skcipher); - if (req) - skcipher_request_free(req); - if (ivdata) - kfree(ivdata); - if (scratchpad) - kfree(scratchpad); - return ret; -} - </programlisting> - </sect1> - - <sect1><title>Code Example For Use of Operational State Memory With SHASH</title> - <programlisting> - -struct sdesc { - struct shash_desc shash; - char ctx[]; -}; - -static struct sdescinit_sdesc(struct crypto_shash *alg) -{ - struct sdescsdesc; - int size; - - size = sizeof(struct shash_desc) + crypto_shash_descsize(alg); - sdesc = kmalloc(size, GFP_KERNEL); - if (!sdesc) - return ERR_PTR(-ENOMEM); - sdesc->shash.tfm = alg; - sdesc->shash.flags = 0x0; - return sdesc; -} - -static int calc_hash(struct crypto_shashalg, - const unsigned chardata, unsigned int datalen, - unsigned chardigest) { - struct sdescsdesc; - int ret; - - sdesc = init_sdesc(alg); - if (IS_ERR(sdesc)) { - pr_info("trusted_key: can't alloc %s\n", hash_alg); - return PTR_ERR(sdesc); - } - - ret = crypto_shash_digest(&sdesc->shash, data, datalen, digest); - kfree(sdesc); - return ret; -} - </programlisting> - </sect1> - - <sect1><title>Code Example For Random Number Generator Usage</title> - <programlisting> - -static int get_random_numbers(u8 *buf, unsigned int len) -{ - struct crypto_rngrng = NULL; - chardrbg = "drbg_nopr_sha256"; /* Hash DRBG with SHA-256, no PR */ - int ret; - - if (!buf || !len) { - pr_debug("No output buffer provided\n"); - return -EINVAL; - } - - rng = crypto_alloc_rng(drbg, 0, 0); - if (IS_ERR(rng)) { - pr_debug("could not allocate RNG handle for %s\n", drbg); - return -PTR_ERR(rng); - } - - ret = crypto_rng_get_bytes(rng, buf, len); - if (ret < 0) - pr_debug("generation of random numbers failed\n"); - else if (ret == 0) - pr_debug("RNG returned no data"); - else - pr_debug("RNG returned %d bytes of data\n", ret); - -out: - crypto_free_rng(rng); - return ret; -} - </programlisting> - </sect1> - </chapter> - </book> diff --git a/Documentation/IPMI.txt b/Documentation/IPMI.txt index c0d8788e75d3..72292308d0f5 100644 --- a/Documentation/IPMI.txt +++ b/Documentation/IPMI.txt @@ -111,6 +111,8 @@ ipmi_ssif - A driver for accessing BMCs on the SMBus. It uses the I2C kernel driver's SMBus interfaces to send and receive IPMI messages over the SMBus. +ipmi_powernv - A driver for access BMCs on POWERNV systems. + ipmi_watchdog - IPMI requires systems to have a very capable watchdog timer. This driver implements the standard Linux watchdog timer interface on top of the IPMI message handler. @@ -118,17 +120,15 @@ interface on top of the IPMI message handler. ipmi_poweroff - Some systems support the ability to be turned off via IPMI commands. -These are all individually selectable via configuration options. +bt-bmc - This is not part of the main driver, but instead a driver for +accessing a BMC-side interface of a BT interface. It is used on BMCs +running Linux to provide an interface to the host. -Note that the KCS-only interface has been removed. The af_ipmi driver -is no longer supported and has been removed because it was impossible -to do 32 bit emulation on 64-bit kernels with it. +These are all individually selectable via configuration options. Much documentation for the interface is in the include files. The IPMI include files are: -net/af_ipmi.h - Contains the socket interface. - linux/ipmi.h - Contains the user interface and IOCTL interface for IPMI. linux/ipmi_smi.h - Contains the interface for system management interfaces @@ -245,6 +245,16 @@ addressed (because some boards actually have multiple BMCs on them) and the user should not have to care what type of SMI is below them. +Watching For Interfaces + +When your code comes up, the IPMI driver may or may not have detected +if IPMI devices exist. So you might have to defer your setup until +the device is detected, or you might be able to do it immediately. +To handle this, and to allow for discovery, you register an SMI +watcher with ipmi_smi_watcher_register() to iterate over interfaces +and tell you when they come and go. + + Creating the User To user the message handler, you must first create a user using @@ -263,7 +273,7 @@ closing the device automatically destroys the user. Messaging -To send a message from kernel-land, the ipmi_request() call does +To send a message from kernel-land, the ipmi_request_settime() call does pretty much all message handling. Most of the parameter are self-explanatory. However, it takes a "msgid" parameter. This is NOT the sequence number of messages. It is simply a long value that is @@ -352,11 +362,12 @@ that for more details. The SI Driver ------------- -The SI driver allows up to 4 KCS or SMIC interfaces to be configured -in the system. By default, scan the ACPI tables for interfaces, and -if it doesn't find any the driver will attempt to register one KCS -interface at the spec-specified I/O port 0xca2 without interrupts. -You can change this at module load time (for a module) with: +The SI driver allows KCS, BT, and SMIC interfaces to be configured +in the system. It discovers interfaces through a host of different +methods, depending on the system. + +You can specify up to four interfaces on the module load line and +control some module parameters: modprobe ipmi_si.o type=<type1>,<type2>.... ports=<port1>,<port2>... addrs=<addr1>,<addr2>... @@ -367,7 +378,7 @@ You can change this at module load time (for a module) with: force_kipmid=<enable1>,<enable2>,... kipmid_max_busy_us=<ustime1>,<ustime2>,... unload_when_empty=[0|1] - trydefaults=[0|1] trydmi=[0|1] tryacpi=[0|1] + trydmi=[0|1] tryacpi=[0|1] tryplatform=[0|1] trypci=[0|1] Each of these except try... items is a list, the first item for the @@ -386,10 +397,6 @@ use the I/O port given as the device address. If you specify irqs as non-zero for an interface, the driver will attempt to use the given interrupt for the device. -trydefaults sets whether the standard IPMI interface at 0xca2 and -any interfaces specified by ACPE are tried. By default, the driver -tries it, set this value to zero to turn this off. - The other try... items disable discovery by their corresponding names. These are all enabled by default, set them to zero to disable them. The tryplatform disables openfirmware. @@ -434,7 +441,7 @@ kernel command line as: ipmi_si.type=<type1>,<type2>... ipmi_si.ports=<port1>,<port2>... ipmi_si.addrs=<addr1>,<addr2>... - ipmi_si.irqs=<irq1>,<irq2>... ipmi_si.trydefaults=[0|1] + ipmi_si.irqs=<irq1>,<irq2>... ipmi_si.regspacings=<sp1>,<sp2>,... ipmi_si.regsizes=<size1>,<size2>,... ipmi_si.regshifts=<shift1>,<shift2>,... @@ -444,11 +451,6 @@ kernel command line as: It works the same as the module parameters of the same names. -By default, the driver will attempt to detect any device specified by -ACPI, and if none of those then a KCS device at the spec-specified -0xca2. If you want to turn this off, set the "trydefaults" option to -false. - If your IPMI interface does not support interrupts and is a KCS or SMIC interface, the IPMI driver will start a kernel thread for the interface to help speed things up. This is a low-priority kernel @@ -500,7 +502,8 @@ at module load time (for a module) with: addr=<i2caddr1>[,<i2caddr2>[,...]] adapter=<adapter1>[,<adapter2>[...]] dbg=<flags1>,<flags2>... - slave_addrs=<addr1>,<addr2>,... + slave_addrs=<addr1>,<addr2>,... + tryacpi=[0|1] trydmi=[0|1] [dbg_probe=1] The addresses are normal I2C addresses. The adapter is the string @@ -513,6 +516,9 @@ spaces in kernel parameters. The debug flags are bit flags for each BMC found, they are: IPMI messages: 1, driver state: 2, timing: 4, I2C probe: 8 +The tryxxx parameters can be used to disable detecting interfaces +from various sources. + Setting dbg_probe to 1 will enable debugging of the probing and detection process for BMCs on the SMBusses. @@ -535,7 +541,8 @@ kernel command line as: ipmi_ssif.adapter=<adapter1>[,<adapter2>[...]] ipmi_ssif.dbg=<flags1>[,<flags2>[...]] ipmi_ssif.dbg_probe=1 - ipmi_ssif.slave_addrs=<addr1>[,<addr2>[...]] + ipmi_ssif.slave_addrs=<addr1>[,<addr2>[...]] + ipmi_ssif.tryacpi=[0|1] ipmi_ssif.trydmi=[0|1] These are the same options as on the module command line. diff --git a/Documentation/admin-guide/index.rst b/Documentation/admin-guide/index.rst index 2681cbd24cdd..8ddae4e4299a 100644 --- a/Documentation/admin-guide/index.rst +++ b/Documentation/admin-guide/index.rst @@ -59,6 +59,7 @@ configure specific aspects of kernel behavior to your liking. binfmt-misc mono java + ras .. only:: subproject and html diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 7d5f4f4cecfa..be7c0d9506b1 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -106,6 +106,16 @@ use by PCI Format: <irq>,<irq>... + acpi_mask_gpe= [HW,ACPI] + Due to the existence of _Lxx/_Exx, some GPEs triggered + by unsupported hardware/firmware features can result in + GPE floodings that cannot be automatically disabled by + the GPE dispatcher. + This facility can be used to prevent such uncontrolled + GPE floodings. + Format: <int> + Support masking of GPEs numbered from 0x00 to 0x7f. + acpi_no_auto_serialize [HW,ACPI] Disable auto-serialization of AML methods AML control methods that contain the opcodes to create @@ -1441,6 +1451,10 @@ The builtin appraise policy appraises all files owned by uid=0. + ima_canonical_fmt [IMA] + Use the canonical format for the binary runtime + measurements, instead of host native format. + ima_hash= [IMA] Format: { md5 | sha1 | rmd160 | sha256 | sha384 | sha512 | ... } diff --git a/Documentation/admin-guide/ras.rst b/Documentation/admin-guide/ras.rst new file mode 100644 index 000000000000..d71340e86c27 --- /dev/null +++ b/Documentation/admin-guide/ras.rst @@ -0,0 +1,1190 @@ +.. include:: <isonum.txt> + +============================================ +Reliability, Availability and Serviceability +============================================ + +RAS concepts +************ + +Reliability, Availability and Serviceability (RAS) is a concept used on +servers meant to measure their robusteness. + +Reliability + is the probability that a system will produce correct outputs. + + * Generally measured as Mean Time Between Failures (MTBF) + * Enhanced by features that help to avoid, detect and repair hardware faults + +Availability + is the probability that a system is operational at a given time + + * Generally measured as a percentage of downtime per a period of time + * Often uses mechanisms to detect and correct hardware faults in + runtime; + +Serviceability (or maintainability) + is the simplicity and speed with which a system can be repaired or + maintained + + * Generally measured on Mean Time Between Repair (MTBR) + +Improving RAS +------------- + +In order to reduce systems downtime, a system should be capable of detecting +hardware errors, and, when possible correcting them in runtime. It should +also provide mechanisms to detect hardware degradation, in order to warn +the system administrator to take the action of replacing a component before +it causes data loss or system downtime. + +Among the monitoring measures, the most usual ones include: + +* CPU – detect errors at instruction execution and at L1/L2/L3 caches; +* Memory – add error correction logic (ECC) to detect and correct errors; +* I/O – add CRC checksums for tranfered data; +* Storage – RAID, journal file systems, checksums, + Self-Monitoring, Analysis and Reporting Technology (SMART). + +By monitoring the number of occurrences of error detections, it is possible +to identify if the probability of hardware errors is increasing, and, on such +case, do a preventive maintainance to replace a degrated component while +those errors are correctable. + +Types of errors +--------------- + +Most mechanisms used on modern systems use use technologies like Hamming +Codes that allow error correction when the number of errors on a bit packet +is below a threshold. If the number of errors is above, those mechanisms +can indicate with a high degree of confidence that an error happened, but +they can't correct. + +Also, sometimes an error occur on a component that it is not used. For +example, a part of the memory that it is not currently allocated. + +That defines some categories of errors: + +* **Correctable Error (CE)** - the error detection mechanism detected and + corrected the error. Such errors are usually not fatal, although some + Kernel mechanisms allow the system administrator to consider them as fatal. + +* **Uncorrected Error (UE)** - the amount of errors happened above the error + correction threshold, and the system was unable to auto-correct. + +* **Fatal Error** - when an UE error happens on a critical component of the + system (for example, a piece of the Kernel got corrupted by an UE), the + only reliable way to avoid data corruption is to hang or reboot the machine. + +* **Non-fatal Error** - when an UE error happens on an unused component, + like a CPU in power down state or an unused memory bank, the system may + still run, eventually replacing the affected hardware by a hot spare, + if available. + + Also, when an error happens on an userspace process, it is also possible to + kill such process and let userspace restart it. + +The mechanism for handling non-fatal errors is usually complex and may +require the help of some userspace application, in order to apply the +policy desired by the system administrator. + +Identifying a bad hardware component +------------------------------------ + +Just detecting a hardware flaw is usually not enough, as the system needs +to pinpoint to the minimal replaceable unit (MRU) that should be exchanged +to make the hardware reliable again. + +So, it requires not only error logging facilities, but also mechanisms that +will translate the error message to the silkscreen or component label for +the MRU. + +Typically, it is very complex for memory, as modern CPUs interlace memory +from different memory modules, in order to provide a better performance. The +DMI BIOS usually have a list of memory module labels, with can be obtained +using the ``dmidecode`` tool. For example, on a desktop machine, it shows:: + + Memory Device + Total Width: 64 bits + Data Width: 64 bits + Size: 16384 MB + Form Factor: SODIMM + Set: None + Locator: ChannelA-DIMM0 + Bank Locator: BANK 0 + Type: DDR4 + Type Detail: Synchronous + Speed: 2133 MHz + Rank: 2 + Configured Clock Speed: 2133 MHz + +On the above example, a DDR4 SO-DIMM memory module is located at the +system's memory labeled as "BANK 0", as given by the *bank locator* field. +Please notice that, on such system, the *total width* is equal to the +*data witdh*. It means that such memory module doesn't have error +detection/correction mechanisms. + +Unfortunately, not all systems use the same field to specify the memory +bank. On this example, from an older server, ``dmidecode`` shows:: + + Memory Device + Array Handle: 0x1000 + Error Information Handle: Not Provided + Total Width: 72 bits + Data Width: 64 bits + Size: 8192 MB + Form Factor: DIMM + Set: 1 + Locator: DIMM_A1 + Bank Locator: Not Specified + Type: DDR3 + Type Detail: Synchronous Registered (Buffered) + Speed: 1600 MHz + Rank: 2 + Configured Clock Speed: 1600 MHz + +There, the DDR3 RDIMM memory module is located at the system's memory labeled +as "DIMM_A1", as given by the *locator* field. Please notice that this +memory module has 64 bits of *data witdh* and 72 bits of *total width*. So, +it has 8 extra bits to be used by error detection and correction mechanisms. +Such kind of memory is called Error-correcting code memory (ECC memory). + +To make things even worse, it is not uncommon that systems with different +labels on their system's board to use exactly the same BIOS, meaning that +the labels provided by the BIOS won't match the real ones. + +ECC memory +---------- + +As mentioned on the previous section, ECC memory has extra bits to be +used for error correction. So, on 64 bit systems, a memory module +has 64 bits of *data width*, and 74 bits of *total width*. So, there are +8 bits extra bits to be used for the error detection and correction +mechanisms. Those extra bits are called *syndrome*\ [#f1]_\ [#f2]_. + +So, when the cpu requests the memory controller to write a word with +*data width*, the memory controller calculates the *syndrome* in real time, +using Hamming code, or some other error correction code, like SECDED+, +producing a code with *total width* size. Such code is then written +on the memory modules. + +At read, the *total width* bits code is converted back, using the same +ECC code used on write, producing a word with *data width* and a *syndrome*. +The word with *data width* is sent to the CPU, even when errors happen. + +The memory controller also looks at the *syndrome* in order to check if +there was an error, and if the ECC code was able to fix such error. +If the error was corrected, a Corrected Error (CE) happened. If not, an +Uncorrected Error (UE) happened. + +The information about the CE/UE errors is stored on some special registers +at the memory controller and can be accessed by reading such registers, +either by BIOS, by some special CPUs or by Linux EDAC driver. On x86 64 +bit CPUs, such errors can also be retrieved via the Machine Check +Architecture (MCA)\ [#f3]_. + +.. [#f1] Please notice that several memory controllers allow operation on a + mode called "Lock-Step", where it groups two memory modules together, + doing 128-bit reads/writes. That gives 16 bits for error correction, with + significatively improves the error correction mechanism, at the expense + that, when an error happens, there's no way to know what memory module is + to blame. So, it has to blame both memory modules. + +.. [#f2] Some memory controllers also allow using memory in mirror mode. + On such mode, the same data is written to two memory modules. At read, + the system checks both memory modules, in order to check if both provide + identical data. On such configuration, when an error happens, there's no + way to know what memory module is to blame. So, it has to blame both + memory modules (or 4 memory modules, if the system is also on Lock-step + mode). + +.. [#f3] For more details about the Machine Check Architecture (MCA), + please read Documentation/x86/x86_64/machinecheck at the Kernel tree. + +EDAC - Error Detection And Correction +************************************* + +.. note:: + + "bluesmoke" was the name for this device driver subsystem when it + was "out-of-tree" and maintained at http://bluesmoke.sourceforge.net. + That site is mostly archaic now and can be used only for historical + purposes. + + When the subsystem was pushed upstream for the first time, on + Kernel 2.6.16, for the first time, it was renamed to ``EDAC``. + +Purpose +------- + +The ``edac`` kernel module's goal is to detect and report hardware errors +that occur within the computer system running under linux. + +Memory +------ + +Memory Correctable Errors (CE) and Uncorrectable Errors (UE) are the +primary errors being harvested. These types of errors are harvested by +the ``edac_mc`` device. + +Detecting CE events, then harvesting those events and reporting them, +**can** but must not necessarily be a predictor of future UE events. With +CE events only, the system can and will continue to operate as no data +has been damaged yet. + +However, preventive maintenance and proactive part replacement of memory +modules exhibiting CEs can reduce the likelihood of the dreaded UE events +and system panics. + +Other hardware elements +----------------------- + +A new feature for EDAC, the ``edac_device`` class of device, was added in +the 2.6.23 version of the kernel. + +This new device type allows for non-memory type of ECC hardware detectors +to have their states harvested and presented to userspace via the sysfs +interface. + +Some architectures have ECC detectors for L1, L2 and L3 caches, +along with DMA engines, fabric switches, main data path switches, +interconnections, and various other hardware data paths. If the hardware +reports it, then a edac_device device probably can be constructed to +harvest and present that to userspace. + + +PCI bus scanning +---------------- + +In addition, PCI devices are scanned for PCI Bus Parity and SERR Errors +in order to determine if errors are occurring during data transfers. + +The presence of PCI Parity errors must be examined with a grain of salt. +There are several add-in adapters that do **not** follow the PCI specification +with regards to Parity generation and reporting. The specification says +the vendor should tie the parity status bits to 0 if they do not intend +to generate parity. Some vendors do not do this, and thus the parity bit +can "float" giving false positives. + +There is a PCI device attribute located in sysfs that is checked by +the EDAC PCI scanning code. If that attribute is set, PCI parity/error +scanning is skipped for that device. The attribute is:: + + broken_parity_status + +and is located in ``/sys/devices/pci<XXX>/0000:XX:YY.Z`` directories for +PCI devices. + + +Versioning +---------- + +EDAC is composed of a "core" module (``edac_core.ko``) and several Memory +Controller (MC) driver modules. On a given system, the CORE is loaded +and one MC driver will be loaded. Both the CORE and the MC driver (or +``edac_device`` driver) have individual versions that reflect current +release level of their respective modules. + +Thus, to "report" on what version a system is running, one must report +both the CORE's and the MC driver's versions. + + +Loading +------- + +If ``edac`` was statically linked with the kernel then no loading +is necessary. If ``edac`` was built as modules then simply modprobe +the ``edac`` pieces that you need. You should be able to modprobe +hardware-specific modules and have the dependencies load the necessary +core modules. + +Example:: + + $ modprobe amd76x_edac + +loads both the ``amd76x_edac.ko`` memory controller module and the +``edac_mc.ko`` core module. + + +Sysfs interface +--------------- + +EDAC presents a ``sysfs`` interface for control and reporting purposes. It +lives in the /sys/devices/system/edac directory. + +Within this directory there currently reside 2 components: + + ======= ============================== + mc memory controller(s) system + pci PCI control and status system + ======= ============================== + + + +Memory Controller (mc) Model +---------------------------- + +Each ``mc`` device controls a set of memory modules [#f4]_. These modules +are laid out in a Chip-Select Row (``csrowX``) and Channel table (``chX``). +There can be multiple csrows and multiple channels. + +.. [#f4] Nowadays, the term DIMM (Dual In-line Memory Module) is widely + used to refer to a memory module, although there are other memory + packaging alternatives, like SO-DIMM, SIMM, etc. Along this document, + and inside the EDAC system, the term "dimm" is used for all memory + modules, even when they use a different kind of packaging. + +Memory controllers allow for several csrows, with 8 csrows being a +typical value. Yet, the actual number of csrows depends on the layout of +a given motherboard, memory controller and memory module characteristics. + +Dual channels allow for dual data length (e. g. 128 bits, on 64 bit systems) +data transfers to/from the CPU from/to memory. Some newer chipsets allow +for more than 2 channels, like Fully Buffered DIMMs (FB-DIMMs) memory +controllers. The following example will assume 2 channels: + + +------------+-----------------------+ + | Chip | Channels | + | Select +-----------+-----------+ + | rows | ``ch0`` | ``ch1`` | + +============+===========+===========+ + | ``csrow0`` | DIMM_A0 | DIMM_B0 | + +------------+ | | + | ``csrow1`` | | | + +------------+-----------+-----------+ + | ``csrow2`` | DIMM_A1 | DIMM_B1 | + +------------+ | | + | ``csrow3`` | | | + +------------+-----------+-----------+ + +In the above example, there are 4 physical slots on the motherboard +for memory DIMMs: + + +---------+---------+ + | DIMM_A0 | DIMM_B0 | + +---------+---------+ + | DIMM_A1 | DIMM_B1 | + +---------+---------+ + +Labels for these slots are usually silk-screened on the motherboard. +Slots labeled ``A`` are channel 0 in this example. Slots labeled ``B`` are +channel 1. Notice that there are two csrows possible on a physical DIMM. +These csrows are allocated their csrow assignment based on the slot into +which the memory DIMM is placed. Thus, when 1 DIMM is placed in each +Channel, the csrows cross both DIMMs. + +Memory DIMMs come single or dual "ranked". A rank is a populated csrow. +Thus, 2 single ranked DIMMs, placed in slots DIMM_A0 and DIMM_B0 above +will have just one csrow (csrow0). csrow1 will be empty. On the other +hand, when 2 dual ranked DIMMs are similarly placed, then both csrow0 +and csrow1 will be populated. The pattern repeats itself for csrow2 and +csrow3. + +The representation of the above is reflected in the directory +tree in EDAC's sysfs interface. Starting in directory +``/sys/devices/system/edac/mc``, each memory controller will be +represented by its own ``mcX`` directory, where ``X`` is the +index of the MC:: + + ..../edac/mc/ + | + |->mc0 + |->mc1 + |->mc2 + .... + +Under each ``mcX`` directory each ``csrowX`` is again represented by a +``csrowX``, where ``X`` is the csrow index:: + + .../mc/mc0/ + | + |->csrow0 + |->csrow2 + |->csrow3 + .... + +Notice that there is no csrow1, which indicates that csrow0 is composed +of a single ranked DIMMs. This should also apply in both Channels, in +order to have dual-channel mode be operational. Since both csrow2 and +csrow3 are populated, this indicates a dual ranked set of DIMMs for +channels 0 and 1. + +Within each of the ``mcX`` and ``csrowX`` directories are several EDAC +control and attribute files. + +``mcX`` directories +------------------- + +In ``mcX`` directories are EDAC control and attribute files for +this ``X`` instance of the memory controllers. + +For a description of the sysfs API, please see: + + Documentation/ABI/testing/sysfs-devices-edac + + +``dimmX`` or ``rankX`` directories +---------------------------------- + +The recommended way to use the EDAC subsystem is to look at the information +provided by the ``dimmX`` or ``rankX`` directories [#f5]_. + +A typical EDAC system has the following structure under +``/sys/devices/system/edac/``\ [#f6]_:: + + /sys/devices/system/edac/ + ├── mc + │ ├── mc0 + │ │ ├── ce_count + │ │ ├── ce_noinfo_count + │ │ ├── dimm0 + │ │ │ ├── dimm_dev_type + │ │ │ ├── dimm_edac_mode + │ │ │ ├── dimm_label + │ │ │ ├── dimm_location + │ │ │ ├── dimm_mem_type + │ │ │ ├── size + │ │ │ └── uevent + │ │ ├── max_location + │ │ ├── mc_name + │ │ ├── reset_counters + │ │ ├── seconds_since_reset + │ │ ├── size_mb + │ │ ├── ue_count + │ │ ├── ue_noinfo_count + │ │ └── uevent + │ ├── mc1 + │ │ ├── ce_count + │ │ ├── ce_noinfo_count + │ │ ├── dimm0 + │ │ │ ├── dimm_dev_type + │ │ │ ├── dimm_edac_mode + │ │ │ ├── dimm_label + │ │ │ ├── dimm_location + │ │ │ ├── dimm_mem_type + │ │ │ ├── size + │ │ │ └── uevent + │ │ ├── max_location + │ │ ├── mc_name + │ │ ├── reset_counters + │ │ ├── seconds_since_reset + │ │ ├── size_mb + │ │ ├── ue_count + │ │ ├── ue_noinfo_count + │ │ └── uevent + │ └── uevent + └── uevent + +In the ``dimmX`` directories are EDAC control and attribute files for +this ``X`` memory module: + +- ``size`` - Total memory managed by this csrow attribute file + + This attribute file displays, in count of megabytes, the memory + that this csrow contains. + +- ``dimm_dev_type`` - Device type attribute file + + This attribute file will display what type of DRAM device is + being utilized on this DIMM. + Examples: + + - x1 + - x2 + - x4 + - x8 + +- ``dimm_edac_mode`` - EDAC Mode of operation attribute file + + This attribute file will display what type of Error detection + and correction is being utilized. + +- ``dimm_label`` - memory module label control file + + This control file allows this DIMM to have a label assigned + to it. With this label in the module, when errors occur + the output can provide the DIMM label in the system log. + This becomes vital for panic events to isolate the + cause of the UE event. + + DIMM Labels must be assigned after booting, with information + that correctly identifies the physical slot with its + silk screen label. This information is currently very + motherboard specific and determination of this information + must occur in userland at this time. + +- ``dimm_location`` - location of the memory module + + The location can have up to 3 levels, and describe how the + memory controller identifies the location of a memory module. + Depending on the type of memory and memory controller, it + can be: + + - *csrow* and *channel* - used when the memory controller + doesn't identify a single DIMM - e. g. in ``rankX`` dir; + - *branch*, *channel*, *slot* - typically used on FB-DIMM memory + controllers; + - *channel*, *slot* - used on Nehalem and newer Intel drivers. + +- ``dimm_mem_type`` - Memory Type attribute file + + This attribute file will display what type of memory is currently + on this csrow. Normally, either buffered or unbuffered memory. + Examples: + + - Registered-DDR + - Unbuffered-DDR + +.. [#f5] On some systems, the memory controller doesn't have any logic + to identify the memory module. On such systems, the directory is called ``rankX`` and works on a similar way as the ``csrowX`` directories. + On modern Intel memory controllers, the memory controller identifies the + memory modules directly. On such systems, the directory is called ``dimmX``. + +.. [#f6] There are also some ``power`` directories and ``subsystem`` + symlinks inside the sysfs mapping that are automatically created by + the sysfs subsystem. Currently, they serve no purpose. + +``csrowX`` directories +---------------------- + +When CONFIG_EDAC_LEGACY_SYSFS is enabled, sysfs will contain the ``csrowX`` +directories. As this API doesn't work properly for Rambus, FB-DIMMs and +modern Intel Memory Controllers, this is being deprecated in favor of +``dimmX`` directories. + +In the ``csrowX`` directories are EDAC control and attribute files for +this ``X`` instance of csrow: + + +- ``ue_count`` - Total Uncorrectable Errors count attribute file + + This attribute file displays the total count of uncorrectable + errors that have occurred on this csrow. If panic_on_ue is set + this counter will not have a chance to increment, since EDAC + will panic the system. + + +- ``ce_count`` - Total Correctable Errors count attribute file + + This attribute file displays the total count of correctable + errors that have occurred on this csrow. This count is very + important to examine. CEs provide early indications that a + DIMM is beginning to fail. This count field should be + monitored for non-zero values and report such information + to the system administrator. + + +- ``size_mb`` - Total memory managed by this csrow attribute file + + This attribute file displays, in count of megabytes, the memory + that this csrow contains. + + +- ``mem_type`` - Memory Type attribute file + + This attribute file will display what type of memory is currently + on this csrow. Normally, either buffered or unbuffered memory. + Examples: + + - Registered-DDR + - Unbuffered-DDR + + +- ``edac_mode`` - EDAC Mode of operation attribute file + + This attribute file will display what type of Error detection + and correction is being utilized. + + +- ``dev_type`` - Device type attribute file + + This attribute file will display what type of DRAM device is + being utilized on this DIMM. + Examples: + + - x1 + - x2 + - x4 + - x8 + + +- ``ch0_ce_count`` - Channel 0 CE Count attribute file + + This attribute file will display the count of CEs on this + DIMM located in channel 0. + + +- ``ch0_ue_count`` - Channel 0 UE Count attribute file + + This attribute file will display the count of UEs on this + DIMM located in channel 0. + + +- ``ch0_dimm_label`` - Channel 0 DIMM Label control file + + + This control file allows this DIMM to have a label assigned + to it. With this label in the module, when errors occur + the output can provide the DIMM label in the system log. + This becomes vital for panic events to isolate the + cause of the UE event. + + DIMM Labels must be assigned after booting, with information + that correctly identifies the physical slot with its + silk screen label. This information is currently very + motherboard specific and determination of this information + must occur in userland at this time. + + +- ``ch1_ce_count`` - Channel 1 CE Count attribute file + + + This attribute file will display the count of CEs on this + DIMM located in channel 1. + + +- ``ch1_ue_count`` - Channel 1 UE Count attribute file + + + This attribute file will display the count of UEs on this + DIMM located in channel 0. + + +- ``ch1_dimm_label`` - Channel 1 DIMM Label control file + + This control file allows this DIMM to have a label assigned + to it. With this label in the module, when errors occur + the output can provide the DIMM label in the system log. + This becomes vital for panic events to isolate the + cause of the UE event. + + DIMM Labels must be assigned after booting, with information + that correctly identifies the physical slot with its + silk screen label. This information is currently very + motherboard specific and determination of this information + must occur in userland at this time. + + +System Logging +-------------- + +If logging for UEs and CEs is enabled, then system logs will contain +information indicating that errors have been detected:: + + EDAC MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0, channel 1 "DIMM_B1": amd76x_edac + EDAC MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0, channel 1 "DIMM_B1": amd76x_edac + + +The structure of the message is: + + +---------------------------------------+-------------+ + | Content + Example | + +=======================================+=============+ + | The memory controller | MC0 | + +---------------------------------------+-------------+ + | Error type | CE | + +---------------------------------------+-------------+ + | Memory page | 0x283 | + +---------------------------------------+-------------+ + | Offset in the page | 0xce0 | + +---------------------------------------+-------------+ + | The byte granularity | grain 8 | + | or resolution of the error | | + +---------------------------------------+-------------+ + | The error syndrome | 0xb741 | + +---------------------------------------+-------------+ + | Memory row | row 0 + + +---------------------------------------+-------------+ + | Memory channel | channel 1 | + +---------------------------------------+-------------+ + | DIMM label, if set prior | DIMM B1 | + +---------------------------------------+-------------+ + | And then an optional, driver-specific | | + | message that may have additional | | + | information. | | + +---------------------------------------+-------------+ + +Both UEs and CEs with no info will lack all but memory controller, error +type, a notice of "no info" and then an optional, driver-specific error +message. + + +PCI Bus Parity Detection +------------------------ + +On Header Type 00 devices, the primary status is looked at for any +parity error regardless of whether parity is enabled on the device or +not. (The spec indicates parity is generated in some cases). On Header +Type 01 bridges, the secondary status register is also looked at to see +if parity occurred on the bus on the other side of the bridge. + + +Sysfs configuration +------------------- + +Under ``/sys/devices/system/edac/pci`` are control and attribute files as +follows: + + +- ``check_pci_parity`` - Enable/Disable PCI Parity checking control file + + This control file enables or disables the PCI Bus Parity scanning + operation. Writing a 1 to this file enables the scanning. Writing + a 0 to this file disables the scanning. + + Enable:: + + echo "1" >/sys/devices/system/edac/pci/check_pci_parity + + Disable:: + + echo "0" >/sys/devices/system/edac/pci/check_pci_parity + + +- ``pci_parity_count`` - Parity Count + + This attribute file will display the number of parity errors that + have been detected. + + +Module parameters +----------------- + +- ``edac_mc_panic_on_ue`` - Panic on UE control file + + An uncorrectable error will cause a machine panic. This is usually + desirable. It is a bad idea to continue when an uncorrectable error + occurs - it is indeterminate what was uncorrected and the operating + system context might be so mangled that continuing will lead to further + corruption. If the kernel has MCE configured, then EDAC will never + notice the UE. + + LOAD TIME:: + + module/kernel parameter: edac_mc_panic_on_ue=[0|1] + + RUN TIME:: + + echo "1" > /sys/module/edac_core/parameters/edac_mc_panic_on_ue + + +- ``edac_mc_log_ue`` - Log UE control file + + + Generate kernel messages describing uncorrectable errors. These errors + are reported through the system message log system. UE statistics + will be accumulated even when UE logging is disabled. + + LOAD TIME:: + + module/kernel parameter: edac_mc_log_ue=[0|1] + + RUN TIME:: + + echo "1" > /sys/module/edac_core/parameters/edac_mc_log_ue + + +- ``edac_mc_log_ce`` - Log CE control file + + + Generate kernel messages describing correctable errors. These + errors are reported through the system message log system. + CE statistics will be accumulated even when CE logging is disabled. + + LOAD TIME:: + + module/kernel parameter: edac_mc_log_ce=[0|1] + + RUN TIME:: + + echo "1" > /sys/module/edac_core/parameters/edac_mc_log_ce + + +- ``edac_mc_poll_msec`` - Polling period control file + + + The time period, in milliseconds, for polling for error information. + Too small a value wastes resources. Too large a value might delay + necessary handling of errors and might loose valuable information for + locating the error. 1000 milliseconds (once each second) is the current + default. Systems which require all the bandwidth they can get, may + increase this. + + LOAD TIME:: + + module/kernel parameter: edac_mc_poll_msec=[0|1] + + RUN TIME:: + + echo "1000" > /sys/module/edac_core/parameters/edac_mc_poll_msec + + +- ``panic_on_pci_parity`` - Panic on PCI PARITY Error + + + This control file enables or disables panicking when a parity + error has been detected. + + + module/kernel parameter:: + + edac_panic_on_pci_pe=[0|1] + + Enable:: + + echo "1" > /sys/module/edac_core/parameters/edac_panic_on_pci_pe + + Disable:: + + echo "0" > /sys/module/edac_core/parameters/edac_panic_on_pci_pe + + + +EDAC device type +---------------- + +In the header file, edac_pci.h, there is a series of edac_device structures +and APIs for the EDAC_DEVICE. + +User space access to an edac_device is through the sysfs interface. + +At the location ``/sys/devices/system/edac`` (sysfs) new edac_device devices +will appear. + +There is a three level tree beneath the above ``edac`` directory. For example, +the ``test_device_edac`` device (found at the http://bluesmoke.sourceforget.net +website) installs itself as:: + + /sys/devices/system/edac/test-instance + +in this directory are various controls, a symlink and one or more ``instance`` +directories. + +The standard default controls are: + + ============== ======================================================= + log_ce boolean to log CE events + log_ue boolean to log UE events + panic_on_ue boolean to ``panic`` the system if an UE is encountered + (default off, can be set true via startup script) + poll_msec time period between POLL cycles for events + ============== ======================================================= + +The test_device_edac device adds at least one of its own custom control: + + ============== ================================================== + test_bits which in the current test driver does nothing but + show how it is installed. A ported driver can + add one or more such controls and/or attributes + for specific uses. + One out-of-tree driver uses controls here to allow + for ERROR INJECTION operations to hardware + injection registers + ============== ================================================== + +The symlink points to the 'struct dev' that is registered for this edac_device. + +Instances +--------- + +One or more instance directories are present. For the ``test_device_edac`` +case: + + +----------------+ + | test-instance0 | + +----------------+ + + +In this directory there are two default counter attributes, which are totals of +counter in deeper subdirectories. + + ============== ==================================== + ce_count total of CE events of subdirectories + ue_count total of UE events of subdirectories + ============== ==================================== + +Blocks +------ + +At the lowest directory level is the ``block`` directory. There can be 0, 1 +or more blocks specified in each instance: + + +-------------+ + | test-block0 | + +-------------+ + +In this directory the default attributes are: + + ============== ================================================ + ce_count which is counter of CE events for this ``block`` + of hardware being monitored + ue_count which is counter of UE events for this ``block`` + of hardware being monitored + ============== ================================================ + + +The ``test_device_edac`` device adds 4 attributes and 1 control: + + ================== ==================================================== + test-block-bits-0 for every POLL cycle this counter + is incremented + test-block-bits-1 every 10 cycles, this counter is bumped once, + and test-block-bits-0 is set to 0 + test-block-bits-2 every 100 cycles, this counter is bumped once, + and test-block-bits-1 is set to 0 + test-block-bits-3 every 1000 cycles, this counter is bumped once, + and test-block-bits-2 is set to 0 + ================== ==================================================== + + + ================== ==================================================== + reset-counters writing ANY thing to this control will + reset all the above counters. + ================== ==================================================== + + +Use of the ``test_device_edac`` driver should enable any others to create their own +unique drivers for their hardware systems. + +The ``test_device_edac`` sample driver is located at the +http://bluesmoke.sourceforge.net project site for EDAC. + + +Usage of EDAC APIs on Nehalem and newer Intel CPUs +-------------------------------------------------- + +On older Intel architectures, the memory controller was part of the North +Bridge chipset. Nehalem, Sandy Bridge, Ivy Bridge, Haswell, Sky Lake and +newer Intel architectures integrated an enhanced version of the memory +controller (MC) inside the CPUs. + +This chapter will cover the differences of the enhanced memory controllers +found on newer Intel CPUs, such as ``i7core_edac``, ``sb_edac`` and +``sbx_edac`` drivers. + +.. note:: + + The Xeon E7 processor families use a separate chip for the memory + controller, called Intel Scalable Memory Buffer. This section doesn't + apply for such families. + +1) There is one Memory Controller per Quick Patch Interconnect + (QPI). At the driver, the term "socket" means one QPI. This is + associated with a physical CPU socket. + + Each MC have 3 physical read channels, 3 physical write channels and + 3 logic channels. The driver currently sees it as just 3 channels. + Each channel can have up to 3 DIMMs. + + The minimum known unity is DIMMs. There are no information about csrows. + As EDAC API maps the minimum unity is csrows, the driver sequentially + maps channel/DIMM into different csrows. + + For example, supposing the following layout:: + + Ch0 phy rd0, wr0 (0x063f4031): 2 ranks, UDIMMs + dimm 0 1024 Mb offset: 0, bank: 8, rank: 1, row: 0x4000, col: 0x400 + dimm 1 1024 Mb offset: 4, bank: 8, rank: 1, row: 0x4000, col: 0x400 + Ch1 phy rd1, wr1 (0x063f4031): 2 ranks, UDIMMs + dimm 0 1024 Mb offset: 0, bank: 8, rank: 1, row: 0x4000, col: 0x400 + Ch2 phy rd3, wr3 (0x063f4031): 2 ranks, UDIMMs + dimm 0 1024 Mb offset: 0, bank: 8, rank: 1, row: 0x4000, col: 0x400 + + The driver will map it as:: + + csrow0: channel 0, dimm0 + csrow1: channel 0, dimm1 + csrow2: channel 1, dimm0 + csrow3: channel 2, dimm0 + + exports one DIMM per csrow. + + Each QPI is exported as a different memory controller. + +2) The MC has the ability to inject errors to test drivers. The drivers + implement this functionality via some error injection nodes: + + For injecting a memory error, there are some sysfs nodes, under + ``/sys/devices/system/edac/mc/mc?/``: + + - ``inject_addrmatch/*``: + Controls the error injection mask register. It is possible to specify + several characteristics of the address to match an error code:: + + dimm = the affected dimm. Numbers are relative to a channel; + rank = the memory rank; + channel = the channel that will generate an error; + bank = the affected bank; + page = the page address; + column (or col) = the address column. + + each of the above values can be set to "any" to match any valid value. + + At driver init, all values are set to any. + + For example, to generate an error at rank 1 of dimm 2, for any channel, + any bank, any page, any column:: + + echo 2 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/dimm + echo 1 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/rank + + To return to the default behaviour of matching any, you can do:: + + echo any >/sys/devices/system/edac/mc/mc0/inject_addrmatch/dimm + echo any >/sys/devices/system/edac/mc/mc0/inject_addrmatch/rank + + - ``inject_eccmask``: + specifies what bits will have troubles, + + - ``inject_section``: + specifies what ECC cache section will get the error:: + + 3 for both + 2 for the highest + 1 for the lowest + + - ``inject_type``: + specifies the type of error, being a combination of the following bits:: + + bit 0 - repeat + bit 1 - ecc + bit 2 - parity + + - ``inject_enable``: + starts the error generation when something different than 0 is written. + + All inject vars can be read. root permission is needed for write. + + Datasheet states that the error will only be generated after a write on an + address that matches inject_addrmatch. It seems, however, that reading will + also produce an error. + + For example, the following code will generate an error for any write access + at socket 0, on any DIMM/address on channel 2:: + + echo 2 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/channel + echo 2 >/sys/devices/system/edac/mc/mc0/inject_type + echo 64 >/sys/devices/system/edac/mc/mc0/inject_eccmask + echo 3 >/sys/devices/system/edac/mc/mc0/inject_section + echo 1 >/sys/devices/system/edac/mc/mc0/inject_enable + dd if=/dev/mem of=/dev/null seek=16k bs=4k count=1 >& /dev/null + + For socket 1, it is needed to replace "mc0" by "mc1" at the above + commands. + + The generated error message will look like:: + + EDAC MC0: UE row 0, channel-a= 0 channel-b= 0 labels "-": NON_FATAL (addr = 0x0075b980, socket=0, Dimm=0, Channel=2, syndrome=0x00000040, count=1, Err=8c0000400001009f:4000080482 (read error: read ECC error)) + +3) Corrected Error memory register counters + + Those newer MCs have some registers to count memory errors. The driver + uses those registers to report Corrected Errors on devices with Registered + DIMMs. + + However, those counters don't work with Unregistered DIMM. As the chipset + offers some counters that also work with UDIMMs (but with a worse level of + granularity than the default ones), the driver exposes those registers for + UDIMM memories. + + They can be read by looking at the contents of ``all_channel_counts/``:: + + $ for i in /sys/devices/system/edac/mc/mc0/all_channel_counts/*; do echo $i; cat $i; done + /sys/devices/system/edac/mc/mc0/all_channel_counts/udimm0 + 0 + /sys/devices/system/edac/mc/mc0/all_channel_counts/udimm1 + 0 + /sys/devices/system/edac/mc/mc0/all_channel_counts/udimm2 + 0 + + What happens here is that errors on different csrows, but at the same + dimm number will increment the same counter. + So, in this memory mapping:: + + csrow0: channel 0, dimm0 + csrow1: channel 0, dimm1 + csrow2: channel 1, dimm0 + csrow3: channel 2, dimm0 + + The hardware will increment udimm0 for an error at the first dimm at either + csrow0, csrow2 or csrow3; + + The hardware will increment udimm1 for an error at the second dimm at either + csrow0, csrow2 or csrow3; + + The hardware will increment udimm2 for an error at the third dimm at either + csrow0, csrow2 or csrow3; + +4) Standard error counters + + The standard error counters are generated when an mcelog error is received + by the driver. Since, with UDIMM, this is counted by software, it is + possible that some errors could be lost. With RDIMM's, they display the + contents of the registers + +Reference documents used on ``amd64_edac`` +------------------------------------------ + +``amd64_edac`` module is based on the following documents +(available from http://support.amd.com/en-us/search/tech-docs): + +1. :Title: BIOS and Kernel Developer's Guide for AMD Athlon 64 and AMD + Opteron Processors + :AMD publication #: 26094 + :Revision: 3.26 + :Link: http://support.amd.com/TechDocs/26094.PDF + +2. :Title: BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh + Processors + :AMD publication #: 32559 + :Revision: 3.00 + :Issue Date: May 2006 + :Link: http://support.amd.com/TechDocs/32559.pdf + +3. :Title: BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h + Processors + :AMD publication #: 31116 + :Revision: 3.00 + :Issue Date: September 07, 2007 + :Link: http://support.amd.com/TechDocs/31116.pdf + +4. :Title: BIOS and Kernel Developer's Guide (BKDG) for AMD Family 15h + Models 30h-3Fh Processors + :AMD publication #: 49125 + :Revision: 3.06 + :Issue Date: 2/12/2015 (latest release) + :Link: http://support.amd.com/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf + +5. :Title: BIOS and Kernel Developer's Guide (BKDG) for AMD Family 15h + Models 60h-6Fh Processors + :AMD publication #: 50742 + :Revision: 3.01 + :Issue Date: 7/23/2015 (latest release) + :Link: http://support.amd.com/TechDocs/50742_15h_Models_60h-6Fh_BKDG.pdf + +6. :Title: BIOS and Kernel Developer's Guide (BKDG) for AMD Family 16h + Models 00h-0Fh Processors + :AMD publication #: 48751 + :Revision: 3.03 + :Issue Date: 2/23/2015 (latest release) + :Link: http://support.amd.com/TechDocs/48751_16h_bkdg.pdf + +Credits +======= + +* Written by Doug Thompson <dougthompson@xmission.com> + + - 7 Dec 2005 + - 17 Jul 2007 Updated + +* |copy| Mauro Carvalho Chehab + + - 05 Aug 2009 Nehalem interface + - 26 Oct 2016 Converted to ReST and cleanups at the Nehalem section + +* EDAC authors/maintainers: + + - Doug Thompson, Dave Jiang, Dave Peterson et al, + - Mauro Carvalho Chehab + - Borislav Petkov + - original author: Thayne Harbaugh diff --git a/Documentation/arm/stm32/overview.txt b/Documentation/arm/stm32/overview.txt index 09aed5588d7c..a03b0357c017 100644 --- a/Documentation/arm/stm32/overview.txt +++ b/Documentation/arm/stm32/overview.txt @@ -5,7 +5,8 @@ Introduction ------------ The STMicroelectronics family of Cortex-M based MCUs are supported by the - 'STM32' platform of ARM Linux. Currently only the STM32F429 is supported. + 'STM32' platform of ARM Linux. Currently only the STM32F429 (Cortex-M4) + and STM32F746 (Cortex-M7) are supported. Configuration diff --git a/Documentation/arm/stm32/stm32f746-overview.txt b/Documentation/arm/stm32/stm32f746-overview.txt new file mode 100644 index 000000000000..cffd2b1ccd6f --- /dev/null +++ b/Documentation/arm/stm32/stm32f746-overview.txt @@ -0,0 +1,34 @@ + STM32F746 Overview + ================== + + Introduction + ------------ + The STM32F746 is a Cortex-M7 MCU aimed at various applications. + It features: + - Cortex-M7 core running up to @216MHz + - 1MB internal flash, 320KBytes internal RAM (+4KB of backup SRAM) + - FMC controller to connect SDRAM, NOR and NAND memories + - Dual mode QSPI + - SD/MMC/SDIO support + - Ethernet controller + - USB OTFG FS & HS controllers + - I2C, SPI, CAN busses support + - Several 16 & 32 bits general purpose timers + - Serial Audio interface + - LCD controller + - HDMI-CEC + - SPDIFRX + + Resources + --------- + Datasheet and reference manual are publicly available on ST website: + - http://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32f7-series/stm32f7x6/stm32f746ng.html + + Document Author + --------------- + Alexandre Torgue <alexandre.torgue@st.com> + + + + + diff --git a/Documentation/block/queue-sysfs.txt b/Documentation/block/queue-sysfs.txt index 51642159aedb..c0a3bb5a6e4e 100644 --- a/Documentation/block/queue-sysfs.txt +++ b/Documentation/block/queue-sysfs.txt @@ -54,9 +54,9 @@ This is the hardware sector size of the device, in bytes. io_poll (RW) ------------ -When read, this file shows the total number of block IO polls and how -many returned success. Writing '0' to this file will disable polling -for this device. Writing any non-zero value will enable this feature. +When read, this file shows whether polling is enabled (1) or disabled +(0). Writing '0' to this file will disable polling for this device. +Writing any non-zero value will enable this feature. io_poll_delay (RW) ------------------ diff --git a/Documentation/crypto/api-aead.rst b/Documentation/crypto/api-aead.rst new file mode 100644 index 000000000000..d15256f1ae36 --- /dev/null +++ b/Documentation/crypto/api-aead.rst @@ -0,0 +1,23 @@ +Authenticated Encryption With Associated Data (AEAD) Algorithm Definitions +-------------------------------------------------------------------------- + +.. kernel-doc:: include/crypto/aead.h + :doc: Authenticated Encryption With Associated Data (AEAD) Cipher API + +.. kernel-doc:: include/crypto/aead.h + :functions: aead_request aead_alg + +Authenticated Encryption With Associated Data (AEAD) Cipher API +--------------------------------------------------------------- + +.. kernel-doc:: include/crypto/aead.h + :functions: crypto_alloc_aead crypto_free_aead crypto_aead_ivsize crypto_aead_authsize crypto_aead_blocksize crypto_aead_setkey crypto_aead_setauthsize crypto_aead_encrypt crypto_aead_decrypt + +Asynchronous AEAD Request Handle +-------------------------------- + +.. kernel-doc:: include/crypto/aead.h + :doc: Asynchronous AEAD Request Handle + +.. kernel-doc:: include/crypto/aead.h + :functions: crypto_aead_reqsize aead_request_set_tfm aead_request_alloc aead_request_free aead_request_set_callback aead_request_set_crypt aead_request_set_ad diff --git a/Documentation/crypto/api-akcipher.rst b/Documentation/crypto/api-akcipher.rst new file mode 100644 index 000000000000..40aa8746e2a1 --- /dev/null +++ b/Documentation/crypto/api-akcipher.rst @@ -0,0 +1,20 @@ +Asymmetric Cipher Algorithm Definitions +--------------------------------------- + +.. kernel-doc:: include/crypto/akcipher.h + :functions: akcipher_alg akcipher_request + +Asymmetric Cipher API +--------------------- + +.. kernel-doc:: include/crypto/akcipher.h + :doc: Generic Public Key API + +.. kernel-doc:: include/crypto/akcipher.h + :functions: crypto_alloc_akcipher crypto_free_akcipher crypto_akcipher_set_pub_key crypto_akcipher_set_priv_key crypto_akcipher_maxsize crypto_akcipher_encrypt crypto_akcipher_decrypt crypto_akcipher_sign crypto_akcipher_verify + +Asymmetric Cipher Request Handle +-------------------------------- + +.. kernel-doc:: include/crypto/akcipher.h + :functions: akcipher_request_alloc akcipher_request_free akcipher_request_set_callback akcipher_request_set_crypt diff --git a/Documentation/crypto/api-digest.rst b/Documentation/crypto/api-digest.rst new file mode 100644 index 000000000000..07356fa99200 --- /dev/null +++ b/Documentation/crypto/api-digest.rst @@ -0,0 +1,35 @@ +Message Digest Algorithm Definitions +------------------------------------ + +.. kernel-doc:: include/crypto/hash.h + :doc: Message Digest Algorithm Definitions + +.. kernel-doc:: include/crypto/hash.h + :functions: hash_alg_common ahash_alg shash_alg + +Asynchronous Message Digest API +------------------------------- + +.. kernel-doc:: include/crypto/hash.h + :doc: Asynchronous Message Digest API + +.. kernel-doc:: include/crypto/hash.h + :functions: crypto_alloc_ahash crypto_free_ahash crypto_ahash_init crypto_ahash_digestsize crypto_ahash_reqtfm crypto_ahash_reqsize crypto_ahash_setkey crypto_ahash_finup crypto_ahash_final crypto_ahash_digest crypto_ahash_export crypto_ahash_import + +Asynchronous Hash Request Handle +-------------------------------- + +.. kernel-doc:: include/crypto/hash.h + :doc: Asynchronous Hash Request Handle + +.. kernel-doc:: include/crypto/hash.h + :functions: ahash_request_set_tfm ahash_request_alloc ahash_request_free ahash_request_set_callback ahash_request_set_crypt + +Synchronous Message Digest API +------------------------------ + +.. kernel-doc:: include/crypto/hash.h + :doc: Synchronous Message Digest API + +.. kernel-doc:: include/crypto/hash.h + :functions: crypto_alloc_shash crypto_free_shash crypto_shash_blocksize crypto_shash_digestsize crypto_shash_descsize crypto_shash_setkey crypto_shash_digest crypto_shash_export crypto_shash_import crypto_shash_init crypto_shash_update crypto_shash_final crypto_shash_finup diff --git a/Documentation/crypto/api-intro.txt b/Documentation/crypto/api-intro.txt index beda682e8d77..45d943fcae5b 100644 --- a/Documentation/crypto/api-intro.txt +++ b/Documentation/crypto/api-intro.txt @@ -44,12 +44,9 @@ one block while the former can operate on an arbitrary amount of data, subject to block size requirements (i.e., non-stream ciphers can only process multiples of blocks). -Support for hardware crypto devices via an asynchronous interface is -under development. - Here's an example of how to use the API: - #include <crypto/ahash.h> + #include <crypto/hash.h> #include <linux/err.h> #include <linux/scatterlist.h> diff --git a/Documentation/crypto/api-kpp.rst b/Documentation/crypto/api-kpp.rst new file mode 100644 index 000000000000..7d86ab906bdf --- /dev/null +++ b/Documentation/crypto/api-kpp.rst @@ -0,0 +1,38 @@ +Key-agreement Protocol Primitives (KPP) Cipher Algorithm Definitions +-------------------------------------------------------------------- + +.. kernel-doc:: include/crypto/kpp.h + :functions: kpp_request crypto_kpp kpp_alg kpp_secret + +Key-agreement Protocol Primitives (KPP) Cipher API +-------------------------------------------------- + +.. kernel-doc:: include/crypto/kpp.h + :doc: Generic Key-agreement Protocol Primitives API + +.. kernel-doc:: include/crypto/kpp.h + :functions: crypto_alloc_kpp crypto_free_kpp crypto_kpp_set_secret crypto_kpp_generate_public_key crypto_kpp_compute_shared_secret crypto_kpp_maxsize + +Key-agreement Protocol Primitives (KPP) Cipher Request Handle +------------------------------------------------------------- + +.. kernel-doc:: include/crypto/kpp.h + :functions: kpp_request_alloc kpp_request_free kpp_request_set_callback kpp_request_set_input kpp_request_set_output + +ECDH Helper Functions +--------------------- + +.. kernel-doc:: include/crypto/ecdh.h + :doc: ECDH Helper Functions + +.. kernel-doc:: include/crypto/ecdh.h + :functions: ecdh crypto_ecdh_key_len crypto_ecdh_encode_key crypto_ecdh_decode_key + +DH Helper Functions +------------------- + +.. kernel-doc:: include/crypto/dh.h + :doc: DH Helper Functions + +.. kernel-doc:: include/crypto/dh.h + :functions: dh crypto_dh_key_len crypto_dh_encode_key crypto_dh_decode_key diff --git a/Documentation/crypto/api-rng.rst b/Documentation/crypto/api-rng.rst new file mode 100644 index 000000000000..10ba7436cee4 --- /dev/null +++ b/Documentation/crypto/api-rng.rst @@ -0,0 +1,14 @@ +Random Number Algorithm Definitions +----------------------------------- + +.. kernel-doc:: include/crypto/rng.h + :functions: rng_alg + +Crypto API Random Number API +---------------------------- + +.. kernel-doc:: include/crypto/rng.h + :doc: Random number generator API + +.. kernel-doc:: include/crypto/rng.h + :functions: crypto_alloc_rng crypto_rng_alg crypto_free_rng crypto_rng_generate crypto_rng_get_bytes crypto_rng_reset crypto_rng_seedsize diff --git a/Documentation/crypto/api-samples.rst b/Documentation/crypto/api-samples.rst new file mode 100644 index 000000000000..0a10819f6107 --- /dev/null +++ b/Documentation/crypto/api-samples.rst @@ -0,0 +1,224 @@ +Code Examples +============= + +Code Example For Symmetric Key Cipher Operation +----------------------------------------------- + +:: + + + struct tcrypt_result { + struct completion completion; + int err; + }; + + /* tie all data structures together */ + struct skcipher_def { + struct scatterlist sg; + struct crypto_skcipher *tfm; + struct skcipher_request *req; + struct tcrypt_result result; + }; + + /* Callback function */ + static void test_skcipher_cb(struct crypto_async_request *req, int error) + { + struct tcrypt_result *result = req->data; + + if (error == -EINPROGRESS) + return; + result->err = error; + complete(&result->completion); + pr_info("Encryption finished successfully\n"); + } + + /* Perform cipher operation */ + static unsigned int test_skcipher_encdec(struct skcipher_def *sk, + int enc) + { + int rc = 0; + + if (enc) + rc = crypto_skcipher_encrypt(sk->req); + else + rc = crypto_skcipher_decrypt(sk->req); + + switch (rc) { + case 0: + break; + case -EINPROGRESS: + case -EBUSY: + rc = wait_for_completion_interruptible( + &sk->result.completion); + if (!rc && !sk->result.err) { + reinit_completion(&sk->result.completion); + break; + } + default: + pr_info("skcipher encrypt returned with %d result %d\n", + rc, sk->result.err); + break; + } + init_completion(&sk->result.completion); + + return rc; + } + + /* Initialize and trigger cipher operation */ + static int test_skcipher(void) + { + struct skcipher_def sk; + struct crypto_skcipher *skcipher = NULL; + struct skcipher_request *req = NULL; + char *scratchpad = NULL; + char *ivdata = NULL; + unsigned char key[32]; + int ret = -EFAULT; + + skcipher = crypto_alloc_skcipher("cbc-aes-aesni", 0, 0); + if (IS_ERR(skcipher)) { + pr_info("could not allocate skcipher handle\n"); + return PTR_ERR(skcipher); + } + + req = skcipher_request_alloc(skcipher, GFP_KERNEL); + if (!req) { + pr_info("could not allocate skcipher request\n"); + ret = -ENOMEM; + goto out; + } + + skcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG, + test_skcipher_cb, + &sk.result); + + /* AES 256 with random key */ + get_random_bytes(&key, 32); + if (crypto_skcipher_setkey(skcipher, key, 32)) { + pr_info("key could not be set\n"); + ret = -EAGAIN; + goto out; + } + + /* IV will be random */ + ivdata = kmalloc(16, GFP_KERNEL); + if (!ivdata) { + pr_info("could not allocate ivdata\n"); + goto out; + } + get_random_bytes(ivdata, 16); + + /* Input data will be random */ + scratchpad = kmalloc(16, GFP_KERNEL); + if (!scratchpad) { + pr_info("could not allocate scratchpad\n"); + goto out; + } + get_random_bytes(scratchpad, 16); + + sk.tfm = skcipher; + sk.req = req; + + /* We encrypt one block */ + sg_init_one(&sk.sg, scratchpad, 16); + skcipher_request_set_crypt(req, &sk.sg, &sk.sg, 16, ivdata); + init_completion(&sk.result.completion); + + /* encrypt data */ + ret = test_skcipher_encdec(&sk, 1); + if (ret) + goto out; + + pr_info("Encryption triggered successfully\n"); + + out: + if (skcipher) + crypto_free_skcipher(skcipher); + if (req) + skcipher_request_free(req); + if (ivdata) + kfree(ivdata); + if (scratchpad) + kfree(scratchpad); + return ret; + } + + +Code Example For Use of Operational State Memory With SHASH +----------------------------------------------------------- + +:: + + + struct sdesc { + struct shash_desc shash; + char ctx[]; + }; + + static struct sdescinit_sdesc(struct crypto_shash *alg) + { + struct sdescsdesc; + int size; + + size = sizeof(struct shash_desc) + crypto_shash_descsize(alg); + sdesc = kmalloc(size, GFP_KERNEL); + if (!sdesc) + return ERR_PTR(-ENOMEM); + sdesc->shash.tfm = alg; + sdesc->shash.flags = 0x0; + return sdesc; + } + + static int calc_hash(struct crypto_shashalg, + const unsigned chardata, unsigned int datalen, + unsigned chardigest) { + struct sdescsdesc; + int ret; + + sdesc = init_sdesc(alg); + if (IS_ERR(sdesc)) { + pr_info("trusted_key: can't alloc %s\n", hash_alg); + return PTR_ERR(sdesc); + } + + ret = crypto_shash_digest(&sdesc->shash, data, datalen, digest); + kfree(sdesc); + return ret; + } + + +Code Example For Random Number Generator Usage +---------------------------------------------- + +:: + + + static int get_random_numbers(u8 *buf, unsigned int len) + { + struct crypto_rngrng = NULL; + chardrbg = "drbg_nopr_sha256"; /* Hash DRBG with SHA-256, no PR */ + int ret; + + if (!buf || !len) { + pr_debug("No output buffer provided\n"); + return -EINVAL; + } + + rng = crypto_alloc_rng(drbg, 0, 0); + if (IS_ERR(rng)) { + pr_debug("could not allocate RNG handle for %s\n", drbg); + return -PTR_ERR(rng); + } + + ret = crypto_rng_get_bytes(rng, buf, len); + if (ret < 0) + pr_debug("generation of random numbers failed\n"); + else if (ret == 0) + pr_debug("RNG returned no data"); + else + pr_debug("RNG returned %d bytes of data\n", ret); + + out: + crypto_free_rng(rng); + return ret; + } diff --git a/Documentation/crypto/api-skcipher.rst b/Documentation/crypto/api-skcipher.rst new file mode 100644 index 000000000000..b20028a361a9 --- /dev/null +++ b/Documentation/crypto/api-skcipher.rst @@ -0,0 +1,62 @@ +Block Cipher Algorithm Definitions +---------------------------------- + +.. kernel-doc:: include/linux/crypto.h + :doc: Block Cipher Algorithm Definitions + +.. kernel-doc:: include/linux/crypto.h + :functions: crypto_alg ablkcipher_alg blkcipher_alg cipher_alg + +Symmetric Key Cipher API +------------------------ + +.. kernel-doc:: include/crypto/skcipher.h + :doc: Symmetric Key Cipher API + +.. kernel-doc:: include/crypto/skcipher.h + :functions: crypto_alloc_skcipher crypto_free_skcipher crypto_has_skcipher crypto_skcipher_ivsize crypto_skcipher_blocksize crypto_skcipher_setkey crypto_skcipher_reqtfm crypto_skcipher_encrypt crypto_skcipher_decrypt + +Symmetric Key Cipher Request Handle +----------------------------------- + +.. kernel-doc:: include/crypto/skcipher.h + :doc: Symmetric Key Cipher Request Handle + +.. kernel-doc:: include/crypto/skcipher.h + :functions: crypto_skcipher_reqsize skcipher_request_set_tfm skcipher_request_alloc skcipher_request_free skcipher_request_set_callback skcipher_request_set_crypt + +Single Block Cipher API +----------------------- + +.. kernel-doc:: include/linux/crypto.h + :doc: Single Block Cipher API + +.. kernel-doc:: include/linux/crypto.h + :functions: crypto_alloc_cipher crypto_free_cipher crypto_has_cipher crypto_cipher_blocksize crypto_cipher_setkey crypto_cipher_encrypt_one crypto_cipher_decrypt_one + +Asynchronous Block Cipher API - Deprecated +------------------------------------------ + +.. kernel-doc:: include/linux/crypto.h + :doc: Asynchronous Block Cipher API + +.. kernel-doc:: include/linux/crypto.h + :functions: crypto_free_ablkcipher crypto_has_ablkcipher crypto_ablkcipher_ivsize crypto_ablkcipher_blocksize crypto_ablkcipher_setkey crypto_ablkcipher_reqtfm crypto_ablkcipher_encrypt crypto_ablkcipher_decrypt + +Asynchronous Cipher Request Handle - Deprecated +----------------------------------------------- + +.. kernel-doc:: include/linux/crypto.h + :doc: Asynchronous Cipher Request Handle + +.. kernel-doc:: include/linux/crypto.h + :functions: crypto_ablkcipher_reqsize ablkcipher_request_set_tfm ablkcipher_request_alloc ablkcipher_request_free ablkcipher_request_set_callback ablkcipher_request_set_crypt + +Synchronous Block Cipher API - Deprecated +----------------------------------------- + +.. kernel-doc:: include/linux/crypto.h + :doc: Synchronous Block Cipher API + +.. kernel-doc:: include/linux/crypto.h + :functions: crypto_alloc_blkcipher rypto_free_blkcipher crypto_has_blkcipher crypto_blkcipher_name crypto_blkcipher_ivsize crypto_blkcipher_blocksize crypto_blkcipher_setkey crypto_blkcipher_encrypt crypto_blkcipher_encrypt_iv crypto_blkcipher_decrypt crypto_blkcipher_decrypt_iv crypto_blkcipher_set_iv crypto_blkcipher_get_iv diff --git a/Documentation/crypto/api.rst b/Documentation/crypto/api.rst new file mode 100644 index 000000000000..2e519193ab4a --- /dev/null +++ b/Documentation/crypto/api.rst @@ -0,0 +1,25 @@ +Programming Interface +===================== + +Please note that the kernel crypto API contains the AEAD givcrypt API +(crypto_aead_giv\* and aead_givcrypt\* function calls in +include/crypto/aead.h). This API is obsolete and will be removed in the +future. To obtain the functionality of an AEAD cipher with internal IV +generation, use the IV generator as a regular cipher. For example, +rfc4106(gcm(aes)) is the AEAD cipher with external IV generation and +seqniv(rfc4106(gcm(aes))) implies that the kernel crypto API generates +the IV. Different IV generators are available. + +.. class:: toc-title + + Table of contents + +.. toctree:: + :maxdepth: 2 + + api-skcipher + api-aead + api-digest + api-rng + api-akcipher + api-kpp diff --git a/Documentation/crypto/architecture.rst b/Documentation/crypto/architecture.rst new file mode 100644 index 000000000000..ca2d09b991f5 --- /dev/null +++ b/Documentation/crypto/architecture.rst @@ -0,0 +1,441 @@ +Kernel Crypto API Architecture +============================== + +Cipher algorithm types +---------------------- + +The kernel crypto API provides different API calls for the following +cipher types: + +- Symmetric ciphers + +- AEAD ciphers + +- Message digest, including keyed message digest + +- Random number generation + +- User space interface + +Ciphers And Templates +--------------------- + +The kernel crypto API provides implementations of single block ciphers +and message digests. In addition, the kernel crypto API provides +numerous "templates" that can be used in conjunction with the single +block ciphers and message digests. Templates include all types of block +chaining mode, the HMAC mechanism, etc. + +Single block ciphers and message digests can either be directly used by +a caller or invoked together with a template to form multi-block ciphers +or keyed message digests. + +A single block cipher may even be called with multiple templates. +However, templates cannot be used without a single cipher. + +See /proc/crypto and search for "name". For example: + +- aes + +- ecb(aes) + +- cmac(aes) + +- ccm(aes) + +- rfc4106(gcm(aes)) + +- sha1 + +- hmac(sha1) + +- authenc(hmac(sha1),cbc(aes)) + +In these examples, "aes" and "sha1" are the ciphers and all others are +the templates. + +Synchronous And Asynchronous Operation +-------------------------------------- + +The kernel crypto API provides synchronous and asynchronous API +operations. + +When using the synchronous API operation, the caller invokes a cipher +operation which is performed synchronously by the kernel crypto API. +That means, the caller waits until the cipher operation completes. +Therefore, the kernel crypto API calls work like regular function calls. +For synchronous operation, the set of API calls is small and +conceptually similar to any other crypto library. + +Asynchronous operation is provided by the kernel crypto API which +implies that the invocation of a cipher operation will complete almost +instantly. That invocation triggers the cipher operation but it does not +signal its completion. Before invoking a cipher operation, the caller +must provide a callback function the kernel crypto API can invoke to +signal the completion of the cipher operation. Furthermore, the caller +must ensure it can handle such asynchronous events by applying +appropriate locking around its data. The kernel crypto API does not +perform any special serialization operation to protect the caller's data +integrity. + +Crypto API Cipher References And Priority +----------------------------------------- + +A cipher is referenced by the caller with a string. That string has the +following semantics: + +:: + + template(single block cipher) + + +where "template" and "single block cipher" is the aforementioned +template and single block cipher, respectively. If applicable, +additional templates may enclose other templates, such as + +:: + + template1(template2(single block cipher))) + + +The kernel crypto API may provide multiple implementations of a template +or a single block cipher. For example, AES on newer Intel hardware has +the following implementations: AES-NI, assembler implementation, or +straight C. Now, when using the string "aes" with the kernel crypto API, +which cipher implementation is used? The answer to that question is the +priority number assigned to each cipher implementation by the kernel +crypto API. When a caller uses the string to refer to a cipher during +initialization of a cipher handle, the kernel crypto API looks up all +implementations providing an implementation with that name and selects +the implementation with the highest priority. + +Now, a caller may have the need to refer to a specific cipher +implementation and thus does not want to rely on the priority-based +selection. To accommodate this scenario, the kernel crypto API allows +the cipher implementation to register a unique name in addition to +common names. When using that unique name, a caller is therefore always +sure to refer to the intended cipher implementation. + +The list of available ciphers is given in /proc/crypto. However, that +list does not specify all possible permutations of templates and +ciphers. Each block listed in /proc/crypto may contain the following +information -- if one of the components listed as follows are not +applicable to a cipher, it is not displayed: + +- name: the generic name of the cipher that is subject to the + priority-based selection -- this name can be used by the cipher + allocation API calls (all names listed above are examples for such + generic names) + +- driver: the unique name of the cipher -- this name can be used by the + cipher allocation API calls + +- module: the kernel module providing the cipher implementation (or + "kernel" for statically linked ciphers) + +- priority: the priority value of the cipher implementation + +- refcnt: the reference count of the respective cipher (i.e. the number + of current consumers of this cipher) + +- selftest: specification whether the self test for the cipher passed + +- type: + + - skcipher for symmetric key ciphers + + - cipher for single block ciphers that may be used with an + additional template + + - shash for synchronous message digest + + - ahash for asynchronous message digest + + - aead for AEAD cipher type + + - compression for compression type transformations + + - rng for random number generator + + - givcipher for cipher with associated IV generator (see the geniv + entry below for the specification of the IV generator type used by + the cipher implementation) + + - kpp for a Key-agreement Protocol Primitive (KPP) cipher such as + an ECDH or DH implementation + +- blocksize: blocksize of cipher in bytes + +- keysize: key size in bytes + +- ivsize: IV size in bytes + +- seedsize: required size of seed data for random number generator + +- digestsize: output size of the message digest + +- geniv: IV generation type: + + - eseqiv for encrypted sequence number based IV generation + + - seqiv for sequence number based IV generation + + - chainiv for chain iv generation + + - <builtin> is a marker that the cipher implements IV generation and + handling as it is specific to the given cipher + +Key Sizes +--------- + +When allocating a cipher handle, the caller only specifies the cipher +type. Symmetric ciphers, however, typically support multiple key sizes +(e.g. AES-128 vs. AES-192 vs. AES-256). These key sizes are determined +with the length of the provided key. Thus, the kernel crypto API does +not provide a separate way to select the particular symmetric cipher key +size. + +Cipher Allocation Type And Masks +-------------------------------- + +The different cipher handle allocation functions allow the specification +of a type and mask flag. Both parameters have the following meaning (and +are therefore not covered in the subsequent sections). + +The type flag specifies the type of the cipher algorithm. The caller +usually provides a 0 when the caller wants the default handling. +Otherwise, the caller may provide the following selections which match +the aforementioned cipher types: + +- CRYPTO_ALG_TYPE_CIPHER Single block cipher + +- CRYPTO_ALG_TYPE_COMPRESS Compression + +- CRYPTO_ALG_TYPE_AEAD Authenticated Encryption with Associated Data + (MAC) + +- CRYPTO_ALG_TYPE_BLKCIPHER Synchronous multi-block cipher + +- CRYPTO_ALG_TYPE_ABLKCIPHER Asynchronous multi-block cipher + +- CRYPTO_ALG_TYPE_GIVCIPHER Asynchronous multi-block cipher packed + together with an IV generator (see geniv field in the /proc/crypto + listing for the known IV generators) + +- CRYPTO_ALG_TYPE_KPP Key-agreement Protocol Primitive (KPP) such as + an ECDH or DH implementation + +- CRYPTO_ALG_TYPE_DIGEST Raw message digest + +- CRYPTO_ALG_TYPE_HASH Alias for CRYPTO_ALG_TYPE_DIGEST + +- CRYPTO_ALG_TYPE_SHASH Synchronous multi-block hash + +- CRYPTO_ALG_TYPE_AHASH Asynchronous multi-block hash + +- CRYPTO_ALG_TYPE_RNG Random Number Generation + +- CRYPTO_ALG_TYPE_AKCIPHER Asymmetric cipher + +- CRYPTO_ALG_TYPE_PCOMPRESS Enhanced version of + CRYPTO_ALG_TYPE_COMPRESS allowing for segmented compression / + decompression instead of performing the operation on one segment + only. CRYPTO_ALG_TYPE_PCOMPRESS is intended to replace + CRYPTO_ALG_TYPE_COMPRESS once existing consumers are converted. + +The mask flag restricts the type of cipher. The only allowed flag is +CRYPTO_ALG_ASYNC to restrict the cipher lookup function to +asynchronous ciphers. Usually, a caller provides a 0 for the mask flag. + +When the caller provides a mask and type specification, the caller +limits the search the kernel crypto API can perform for a suitable +cipher implementation for the given cipher name. That means, even when a +caller uses a cipher name that exists during its initialization call, +the kernel crypto API may not select it due to the used type and mask +field. + +Internal Structure of Kernel Crypto API +--------------------------------------- + +The kernel crypto API has an internal structure where a cipher +implementation may use many layers and indirections. This section shall +help to clarify how the kernel crypto API uses various components to +implement the complete cipher. + +The following subsections explain the internal structure based on +existing cipher implementations. The first section addresses the most +complex scenario where all other scenarios form a logical subset. + +Generic AEAD Cipher Structure +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The following ASCII art decomposes the kernel crypto API layers when +using the AEAD cipher with the automated IV generation. The shown +example is used by the IPSEC layer. + +For other use cases of AEAD ciphers, the ASCII art applies as well, but +the caller may not use the AEAD cipher with a separate IV generator. In +this case, the caller must generate the IV. + +The depicted example decomposes the AEAD cipher of GCM(AES) based on the +generic C implementations (gcm.c, aes-generic.c, ctr.c, ghash-generic.c, +seqiv.c). The generic implementation serves as an example showing the +complete logic of the kernel crypto API. + +It is possible that some streamlined cipher implementations (like +AES-NI) provide implementations merging aspects which in the view of the +kernel crypto API cannot be decomposed into layers any more. In case of +the AES-NI implementation, the CTR mode, the GHASH implementation and +the AES cipher are all merged into one cipher implementation registered +with the kernel crypto API. In this case, the concept described by the +following ASCII art applies too. However, the decomposition of GCM into +the individual sub-components by the kernel crypto API is not done any +more. + +Each block in the following ASCII art is an independent cipher instance +obtained from the kernel crypto API. Each block is accessed by the +caller or by other blocks using the API functions defined by the kernel +crypto API for the cipher implementation type. + +The blocks below indicate the cipher type as well as the specific logic +implemented in the cipher. + +The ASCII art picture also indicates the call structure, i.e. who calls +which component. The arrows point to the invoked block where the caller +uses the API applicable to the cipher type specified for the block. + +:: + + + kernel crypto API | IPSEC Layer + | + +-----------+ | + | | (1) + | aead | <----------------------------------- esp_output + | (seqiv) | ---+ + +-----------+ | + | (2) + +-----------+ | + | | <--+ (2) + | aead | <----------------------------------- esp_input + | (gcm) | ------------+ + +-----------+ | + | (3) | (5) + v v + +-----------+ +-----------+ + | | | | + | skcipher | | ahash | + | (ctr) | ---+ | (ghash) | + +-----------+ | +-----------+ + | + +-----------+ | (4) + | | <--+ + | cipher | + | (aes) | + +-----------+ + + + +The following call sequence is applicable when the IPSEC layer triggers +an encryption operation with the esp_output function. During +configuration, the administrator set up the use of rfc4106(gcm(aes)) as +the cipher for ESP. The following call sequence is now depicted in the +ASCII art above: + +1. esp_output() invokes crypto_aead_encrypt() to trigger an + encryption operation of the AEAD cipher with IV generator. + + In case of GCM, the SEQIV implementation is registered as GIVCIPHER + in crypto_rfc4106_alloc(). + + The SEQIV performs its operation to generate an IV where the core + function is seqiv_geniv(). + +2. Now, SEQIV uses the AEAD API function calls to invoke the associated + AEAD cipher. In our case, during the instantiation of SEQIV, the + cipher handle for GCM is provided to SEQIV. This means that SEQIV + invokes AEAD cipher operations with the GCM cipher handle. + + During instantiation of the GCM handle, the CTR(AES) and GHASH + ciphers are instantiated. The cipher handles for CTR(AES) and GHASH + are retained for later use. + + The GCM implementation is responsible to invoke the CTR mode AES and + the GHASH cipher in the right manner to implement the GCM + specification. + +3. The GCM AEAD cipher type implementation now invokes the SKCIPHER API + with the instantiated CTR(AES) cipher handle. + + During instantiation of the CTR(AES) cipher, the CIPHER type + implementation of AES is instantiated. The cipher handle for AES is + retained. + + That means that the SKCIPHER implementation of CTR(AES) only + implements the CTR block chaining mode. After performing the block + chaining operation, the CIPHER implementation of AES is invoked. + +4. The SKCIPHER of CTR(AES) now invokes the CIPHER API with the AES + cipher handle to encrypt one block. + +5. The GCM AEAD implementation also invokes the GHASH cipher + implementation via the AHASH API. + +When the IPSEC layer triggers the esp_input() function, the same call +sequence is followed with the only difference that the operation starts +with step (2). + +Generic Block Cipher Structure +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Generic block ciphers follow the same concept as depicted with the ASCII +art picture above. + +For example, CBC(AES) is implemented with cbc.c, and aes-generic.c. The +ASCII art picture above applies as well with the difference that only +step (4) is used and the SKCIPHER block chaining mode is CBC. + +Generic Keyed Message Digest Structure +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Keyed message digest implementations again follow the same concept as +depicted in the ASCII art picture above. + +For example, HMAC(SHA256) is implemented with hmac.c and +sha256_generic.c. The following ASCII art illustrates the +implementation: + +:: + + + kernel crypto API | Caller + | + +-----------+ (1) | + | | <------------------ some_function + | ahash | + | (hmac) | ---+ + +-----------+ | + | (2) + +-----------+ | + | | <--+ + | shash | + | (sha256) | + +-----------+ + + + +The following call sequence is applicable when a caller triggers an HMAC +operation: + +1. The AHASH API functions are invoked by the caller. The HMAC + implementation performs its operation as needed. + + During initialization of the HMAC cipher, the SHASH cipher type of + SHA256 is instantiated. The cipher handle for the SHA256 instance is + retained. + + At one time, the HMAC implementation requires a SHA256 operation + where the SHA256 cipher handle is used. + +2. The HMAC instance now invokes the SHASH API with the SHA256 cipher + handle to calculate the message digest. diff --git a/Documentation/crypto/devel-algos.rst b/Documentation/crypto/devel-algos.rst new file mode 100644 index 000000000000..66f50d32dcec --- /dev/null +++ b/Documentation/crypto/devel-algos.rst @@ -0,0 +1,247 @@ +Developing Cipher Algorithms +============================ + +Registering And Unregistering Transformation +-------------------------------------------- + +There are three distinct types of registration functions in the Crypto +API. One is used to register a generic cryptographic transformation, +while the other two are specific to HASH transformations and +COMPRESSion. We will discuss the latter two in a separate chapter, here +we will only look at the generic ones. + +Before discussing the register functions, the data structure to be +filled with each, struct crypto_alg, must be considered -- see below +for a description of this data structure. + +The generic registration functions can be found in +include/linux/crypto.h and their definition can be seen below. The +former function registers a single transformation, while the latter +works on an array of transformation descriptions. The latter is useful +when registering transformations in bulk, for example when a driver +implements multiple transformations. + +:: + + int crypto_register_alg(struct crypto_alg *alg); + int crypto_register_algs(struct crypto_alg *algs, int count); + + +The counterparts to those functions are listed below. + +:: + + int crypto_unregister_alg(struct crypto_alg *alg); + int crypto_unregister_algs(struct crypto_alg *algs, int count); + + +Notice that both registration and unregistration functions do return a +value, so make sure to handle errors. A return code of zero implies +success. Any return code < 0 implies an error. + +The bulk registration/unregistration functions register/unregister each +transformation in the given array of length count. They handle errors as +follows: + +- crypto_register_algs() succeeds if and only if it successfully + registers all the given transformations. If an error occurs partway + through, then it rolls back successful registrations before returning + the error code. Note that if a driver needs to handle registration + errors for individual transformations, then it will need to use the + non-bulk function crypto_register_alg() instead. + +- crypto_unregister_algs() tries to unregister all the given + transformations, continuing on error. It logs errors and always + returns zero. + +Single-Block Symmetric Ciphers [CIPHER] +--------------------------------------- + +Example of transformations: aes, arc4, ... + +This section describes the simplest of all transformation +implementations, that being the CIPHER type used for symmetric ciphers. +The CIPHER type is used for transformations which operate on exactly one +block at a time and there are no dependencies between blocks at all. + +Registration specifics +~~~~~~~~~~~~~~~~~~~~~~ + +The registration of [CIPHER] algorithm is specific in that struct +crypto_alg field .cra_type is empty. The .cra_u.cipher has to be +filled in with proper callbacks to implement this transformation. + +See struct cipher_alg below. + +Cipher Definition With struct cipher_alg +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Struct cipher_alg defines a single block cipher. + +Here are schematics of how these functions are called when operated from +other part of the kernel. Note that the .cia_setkey() call might happen +before or after any of these schematics happen, but must not happen +during any of these are in-flight. + +:: + + KEY ---. PLAINTEXT ---. + v v + .cia_setkey() -> .cia_encrypt() + | + '-----> CIPHERTEXT + + +Please note that a pattern where .cia_setkey() is called multiple times +is also valid: + +:: + + + KEY1 --. PLAINTEXT1 --. KEY2 --. PLAINTEXT2 --. + v v v v + .cia_setkey() -> .cia_encrypt() -> .cia_setkey() -> .cia_encrypt() + | | + '---> CIPHERTEXT1 '---> CIPHERTEXT2 + + +Multi-Block Ciphers +------------------- + +Example of transformations: cbc(aes), ecb(arc4), ... + +This section describes the multi-block cipher transformation +implementations. The multi-block ciphers are used for transformations +which operate on scatterlists of data supplied to the transformation +functions. They output the result into a scatterlist of data as well. + +Registration Specifics +~~~~~~~~~~~~~~~~~~~~~~ + +The registration of multi-block cipher algorithms is one of the most +standard procedures throughout the crypto API. + +Note, if a cipher implementation requires a proper alignment of data, +the caller should use the functions of crypto_skcipher_alignmask() to +identify a memory alignment mask. The kernel crypto API is able to +process requests that are unaligned. This implies, however, additional +overhead as the kernel crypto API needs to perform the realignment of +the data which may imply moving of data. + +Cipher Definition With struct blkcipher_alg and ablkcipher_alg +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Struct blkcipher_alg defines a synchronous block cipher whereas struct +ablkcipher_alg defines an asynchronous block cipher. + +Please refer to the single block cipher description for schematics of +the block cipher usage. + +Specifics Of Asynchronous Multi-Block Cipher +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +There are a couple of specifics to the asynchronous interface. + +First of all, some of the drivers will want to use the Generic +ScatterWalk in case the hardware needs to be fed separate chunks of the +scatterlist which contains the plaintext and will contain the +ciphertext. Please refer to the ScatterWalk interface offered by the +Linux kernel scatter / gather list implementation. + +Hashing [HASH] +-------------- + +Example of transformations: crc32, md5, sha1, sha256,... + +Registering And Unregistering The Transformation +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +There are multiple ways to register a HASH transformation, depending on +whether the transformation is synchronous [SHASH] or asynchronous +[AHASH] and the amount of HASH transformations we are registering. You +can find the prototypes defined in include/crypto/internal/hash.h: + +:: + + int crypto_register_ahash(struct ahash_alg *alg); + + int crypto_register_shash(struct shash_alg *alg); + int crypto_register_shashes(struct shash_alg *algs, int count); + + +The respective counterparts for unregistering the HASH transformation +are as follows: + +:: + + int crypto_unregister_ahash(struct ahash_alg *alg); + + int crypto_unregister_shash(struct shash_alg *alg); + int crypto_unregister_shashes(struct shash_alg *algs, int count); + + +Cipher Definition With struct shash_alg and ahash_alg +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Here are schematics of how these functions are called when operated from +other part of the kernel. Note that the .setkey() call might happen +before or after any of these schematics happen, but must not happen +during any of these are in-flight. Please note that calling .init() +followed immediately by .finish() is also a perfectly valid +transformation. + +:: + + I) DATA -----------. + v + .init() -> .update() -> .final() ! .update() might not be called + ^ | | at all in this scenario. + '----' '---> HASH + + II) DATA -----------.-----------. + v v + .init() -> .update() -> .finup() ! .update() may not be called + ^ | | at all in this scenario. + '----' '---> HASH + + III) DATA -----------. + v + .digest() ! The entire process is handled + | by the .digest() call. + '---------------> HASH + + +Here is a schematic of how the .export()/.import() functions are called +when used from another part of the kernel. + +:: + + KEY--. DATA--. + v v ! .update() may not be called + .setkey() -> .init() -> .update() -> .export() at all in this scenario. + ^ | | + '-----' '--> PARTIAL_HASH + + ----------- other transformations happen here ----------- + + PARTIAL_HASH--. DATA1--. + v v + .import -> .update() -> .final() ! .update() may not be called + ^ | | at all in this scenario. + '----' '--> HASH1 + + PARTIAL_HASH--. DATA2-. + v v + .import -> .finup() + | + '---------------> HASH2 + + +Specifics Of Asynchronous HASH Transformation +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Some of the drivers will want to use the Generic ScatterWalk in case the +implementation needs to be fed separate chunks of the scatterlist which +contains the input data. The buffer containing the resulting hash will +always be properly aligned to .cra_alignmask so there is no need to +worry about this. diff --git a/Documentation/crypto/index.rst b/Documentation/crypto/index.rst new file mode 100644 index 000000000000..94c4786f2573 --- /dev/null +++ b/Documentation/crypto/index.rst @@ -0,0 +1,24 @@ +======================= +Linux Kernel Crypto API +======================= + +:Author: Stephan Mueller +:Author: Marek Vasut + +This documentation outlines the Linux kernel crypto API with its +concepts, details about developing cipher implementations, employment of the API +for cryptographic use cases, as well as programming examples. + +.. class:: toc-title + + Table of contents + +.. toctree:: + :maxdepth: 2 + + intro + architecture + devel-algos + userspace-if + api + api-samples diff --git a/Documentation/crypto/intro.rst b/Documentation/crypto/intro.rst new file mode 100644 index 000000000000..9aa89ebbfba9 --- /dev/null +++ b/Documentation/crypto/intro.rst @@ -0,0 +1,74 @@ +Kernel Crypto API Interface Specification +========================================= + +Introduction +------------ + +The kernel crypto API offers a rich set of cryptographic ciphers as well +as other data transformation mechanisms and methods to invoke these. +This document contains a description of the API and provides example +code. + +To understand and properly use the kernel crypto API a brief explanation +of its structure is given. Based on the architecture, the API can be +separated into different components. Following the architecture +specification, hints to developers of ciphers are provided. Pointers to +the API function call documentation are given at the end. + +The kernel crypto API refers to all algorithms as "transformations". +Therefore, a cipher handle variable usually has the name "tfm". Besides +cryptographic operations, the kernel crypto API also knows compression +transformations and handles them the same way as ciphers. + +The kernel crypto API serves the following entity types: + +- consumers requesting cryptographic services + +- data transformation implementations (typically ciphers) that can be + called by consumers using the kernel crypto API + +This specification is intended for consumers of the kernel crypto API as +well as for developers implementing ciphers. This API specification, +however, does not discuss all API calls available to data transformation +implementations (i.e. implementations of ciphers and other +transformations (such as CRC or even compression algorithms) that can +register with the kernel crypto API). + +Note: The terms "transformation" and cipher algorithm are used +interchangeably. + +Terminology +----------- + +The transformation implementation is an actual code or interface to +hardware which implements a certain transformation with precisely +defined behavior. + +The transformation object (TFM) is an instance of a transformation +implementation. There can be multiple transformation objects associated +with a single transformation implementation. Each of those +transformation objects is held by a crypto API consumer or another +transformation. Transformation object is allocated when a crypto API +consumer requests a transformation implementation. The consumer is then +provided with a structure, which contains a transformation object (TFM). + +The structure that contains transformation objects may also be referred +to as a "cipher handle". Such a cipher handle is always subject to the +following phases that are reflected in the API calls applicable to such +a cipher handle: + +1. Initialization of a cipher handle. + +2. Execution of all intended cipher operations applicable for the handle + where the cipher handle must be furnished to every API call. + +3. Destruction of a cipher handle. + +When using the initialization API calls, a cipher handle is created and +returned to the consumer. Therefore, please refer to all initialization +API calls that refer to the data structure type a consumer is expected +to receive and subsequently to use. The initialization API calls have +all the same naming conventions of crypto_alloc\*. + +The transformation context is private data associated with the +transformation object. diff --git a/Documentation/crypto/userspace-if.rst b/Documentation/crypto/userspace-if.rst new file mode 100644 index 000000000000..de5a72e32bc9 --- /dev/null +++ b/Documentation/crypto/userspace-if.rst @@ -0,0 +1,387 @@ +User Space Interface +==================== + +Introduction +------------ + +The concepts of the kernel crypto API visible to kernel space is fully +applicable to the user space interface as well. Therefore, the kernel +crypto API high level discussion for the in-kernel use cases applies +here as well. + +The major difference, however, is that user space can only act as a +consumer and never as a provider of a transformation or cipher +algorithm. + +The following covers the user space interface exported by the kernel +crypto API. A working example of this description is libkcapi that can +be obtained from [1]. That library can be used by user space +applications that require cryptographic services from the kernel. + +Some details of the in-kernel kernel crypto API aspects do not apply to +user space, however. This includes the difference between synchronous +and asynchronous invocations. The user space API call is fully +synchronous. + +[1] http://www.chronox.de/libkcapi.html + +User Space API General Remarks +------------------------------ + +The kernel crypto API is accessible from user space. Currently, the +following ciphers are accessible: + +- Message digest including keyed message digest (HMAC, CMAC) + +- Symmetric ciphers + +- AEAD ciphers + +- Random Number Generators + +The interface is provided via socket type using the type AF_ALG. In +addition, the setsockopt option type is SOL_ALG. In case the user space +header files do not export these flags yet, use the following macros: + +:: + + #ifndef AF_ALG + #define AF_ALG 38 + #endif + #ifndef SOL_ALG + #define SOL_ALG 279 + #endif + + +A cipher is accessed with the same name as done for the in-kernel API +calls. This includes the generic vs. unique naming schema for ciphers as +well as the enforcement of priorities for generic names. + +To interact with the kernel crypto API, a socket must be created by the +user space application. User space invokes the cipher operation with the +send()/write() system call family. The result of the cipher operation is +obtained with the read()/recv() system call family. + +The following API calls assume that the socket descriptor is already +opened by the user space application and discusses only the kernel +crypto API specific invocations. + +To initialize the socket interface, the following sequence has to be +performed by the consumer: + +1. Create a socket of type AF_ALG with the struct sockaddr_alg + parameter specified below for the different cipher types. + +2. Invoke bind with the socket descriptor + +3. Invoke accept with the socket descriptor. The accept system call + returns a new file descriptor that is to be used to interact with the + particular cipher instance. When invoking send/write or recv/read + system calls to send data to the kernel or obtain data from the + kernel, the file descriptor returned by accept must be used. + +In-place Cipher operation +------------------------- + +Just like the in-kernel operation of the kernel crypto API, the user +space interface allows the cipher operation in-place. That means that +the input buffer used for the send/write system call and the output +buffer used by the read/recv system call may be one and the same. This +is of particular interest for symmetric cipher operations where a +copying of the output data to its final destination can be avoided. + +If a consumer on the other hand wants to maintain the plaintext and the +ciphertext in different memory locations, all a consumer needs to do is +to provide different memory pointers for the encryption and decryption +operation. + +Message Digest API +------------------ + +The message digest type to be used for the cipher operation is selected +when invoking the bind syscall. bind requires the caller to provide a +filled struct sockaddr data structure. This data structure must be +filled as follows: + +:: + + struct sockaddr_alg sa = { + .salg_family = AF_ALG, + .salg_type = "hash", /* this selects the hash logic in the kernel */ + .salg_name = "sha1" /* this is the cipher name */ + }; + + +The salg_type value "hash" applies to message digests and keyed message +digests. Though, a keyed message digest is referenced by the appropriate +salg_name. Please see below for the setsockopt interface that explains +how the key can be set for a keyed message digest. + +Using the send() system call, the application provides the data that +should be processed with the message digest. The send system call allows +the following flags to be specified: + +- MSG_MORE: If this flag is set, the send system call acts like a + message digest update function where the final hash is not yet + calculated. If the flag is not set, the send system call calculates + the final message digest immediately. + +With the recv() system call, the application can read the message digest +from the kernel crypto API. If the buffer is too small for the message +digest, the flag MSG_TRUNC is set by the kernel. + +In order to set a message digest key, the calling application must use +the setsockopt() option of ALG_SET_KEY. If the key is not set the HMAC +operation is performed without the initial HMAC state change caused by +the key. + +Symmetric Cipher API +-------------------- + +The operation is very similar to the message digest discussion. During +initialization, the struct sockaddr data structure must be filled as +follows: + +:: + + struct sockaddr_alg sa = { + .salg_family = AF_ALG, + .salg_type = "skcipher", /* this selects the symmetric cipher */ + .salg_name = "cbc(aes)" /* this is the cipher name */ + }; + + +Before data can be sent to the kernel using the write/send system call +family, the consumer must set the key. The key setting is described with +the setsockopt invocation below. + +Using the sendmsg() system call, the application provides the data that +should be processed for encryption or decryption. In addition, the IV is +specified with the data structure provided by the sendmsg() system call. + +The sendmsg system call parameter of struct msghdr is embedded into the +struct cmsghdr data structure. See recv(2) and cmsg(3) for more +information on how the cmsghdr data structure is used together with the +send/recv system call family. That cmsghdr data structure holds the +following information specified with a separate header instances: + +- specification of the cipher operation type with one of these flags: + + - ALG_OP_ENCRYPT - encryption of data + + - ALG_OP_DECRYPT - decryption of data + +- specification of the IV information marked with the flag ALG_SET_IV + +The send system call family allows the following flag to be specified: + +- MSG_MORE: If this flag is set, the send system call acts like a + cipher update function where more input data is expected with a + subsequent invocation of the send system call. + +Note: The kernel reports -EINVAL for any unexpected data. The caller +must make sure that all data matches the constraints given in +/proc/crypto for the selected cipher. + +With the recv() system call, the application can read the result of the +cipher operation from the kernel crypto API. The output buffer must be +at least as large as to hold all blocks of the encrypted or decrypted +data. If the output data size is smaller, only as many blocks are +returned that fit into that output buffer size. + +AEAD Cipher API +--------------- + +The operation is very similar to the symmetric cipher discussion. During +initialization, the struct sockaddr data structure must be filled as +follows: + +:: + + struct sockaddr_alg sa = { + .salg_family = AF_ALG, + .salg_type = "aead", /* this selects the symmetric cipher */ + .salg_name = "gcm(aes)" /* this is the cipher name */ + }; + + +Before data can be sent to the kernel using the write/send system call +family, the consumer must set the key. The key setting is described with +the setsockopt invocation below. + +In addition, before data can be sent to the kernel using the write/send +system call family, the consumer must set the authentication tag size. +To set the authentication tag size, the caller must use the setsockopt +invocation described below. + +Using the sendmsg() system call, the application provides the data that +should be processed for encryption or decryption. In addition, the IV is +specified with the data structure provided by the sendmsg() system call. + +The sendmsg system call parameter of struct msghdr is embedded into the +struct cmsghdr data structure. See recv(2) and cmsg(3) for more +information on how the cmsghdr data structure is used together with the +send/recv system call family. That cmsghdr data structure holds the +following information specified with a separate header instances: + +- specification of the cipher operation type with one of these flags: + + - ALG_OP_ENCRYPT - encryption of data + + - ALG_OP_DECRYPT - decryption of data + +- specification of the IV information marked with the flag ALG_SET_IV + +- specification of the associated authentication data (AAD) with the + flag ALG_SET_AEAD_ASSOCLEN. The AAD is sent to the kernel together + with the plaintext / ciphertext. See below for the memory structure. + +The send system call family allows the following flag to be specified: + +- MSG_MORE: If this flag is set, the send system call acts like a + cipher update function where more input data is expected with a + subsequent invocation of the send system call. + +Note: The kernel reports -EINVAL for any unexpected data. The caller +must make sure that all data matches the constraints given in +/proc/crypto for the selected cipher. + +With the recv() system call, the application can read the result of the +cipher operation from the kernel crypto API. The output buffer must be +at least as large as defined with the memory structure below. If the +output data size is smaller, the cipher operation is not performed. + +The authenticated decryption operation may indicate an integrity error. +Such breach in integrity is marked with the -EBADMSG error code. + +AEAD Memory Structure +~~~~~~~~~~~~~~~~~~~~~ + +The AEAD cipher operates with the following information that is +communicated between user and kernel space as one data stream: + +- plaintext or ciphertext + +- associated authentication data (AAD) + +- authentication tag + +The sizes of the AAD and the authentication tag are provided with the +sendmsg and setsockopt calls (see there). As the kernel knows the size +of the entire data stream, the kernel is now able to calculate the right +offsets of the data components in the data stream. + +The user space caller must arrange the aforementioned information in the +following order: + +- AEAD encryption input: AAD \|\| plaintext + +- AEAD decryption input: AAD \|\| ciphertext \|\| authentication tag + +The output buffer the user space caller provides must be at least as +large to hold the following data: + +- AEAD encryption output: ciphertext \|\| authentication tag + +- AEAD decryption output: plaintext + +Random Number Generator API +--------------------------- + +Again, the operation is very similar to the other APIs. During +initialization, the struct sockaddr data structure must be filled as +follows: + +:: + + struct sockaddr_alg sa = { + .salg_family = AF_ALG, + .salg_type = "rng", /* this selects the symmetric cipher */ + .salg_name = "drbg_nopr_sha256" /* this is the cipher name */ + }; + + +Depending on the RNG type, the RNG must be seeded. The seed is provided +using the setsockopt interface to set the key. For example, the +ansi_cprng requires a seed. The DRBGs do not require a seed, but may be +seeded. + +Using the read()/recvmsg() system calls, random numbers can be obtained. +The kernel generates at most 128 bytes in one call. If user space +requires more data, multiple calls to read()/recvmsg() must be made. + +WARNING: The user space caller may invoke the initially mentioned accept +system call multiple times. In this case, the returned file descriptors +have the same state. + +Zero-Copy Interface +------------------- + +In addition to the send/write/read/recv system call family, the AF_ALG +interface can be accessed with the zero-copy interface of +splice/vmsplice. As the name indicates, the kernel tries to avoid a copy +operation into kernel space. + +The zero-copy operation requires data to be aligned at the page +boundary. Non-aligned data can be used as well, but may require more +operations of the kernel which would defeat the speed gains obtained +from the zero-copy interface. + +The system-interent limit for the size of one zero-copy operation is 16 +pages. If more data is to be sent to AF_ALG, user space must slice the +input into segments with a maximum size of 16 pages. + +Zero-copy can be used with the following code example (a complete +working example is provided with libkcapi): + +:: + + int pipes[2]; + + pipe(pipes); + /* input data in iov */ + vmsplice(pipes[1], iov, iovlen, SPLICE_F_GIFT); + /* opfd is the file descriptor returned from accept() system call */ + splice(pipes[0], NULL, opfd, NULL, ret, 0); + read(opfd, out, outlen); + + +Setsockopt Interface +-------------------- + +In addition to the read/recv and send/write system call handling to send +and retrieve data subject to the cipher operation, a consumer also needs +to set the additional information for the cipher operation. This +additional information is set using the setsockopt system call that must +be invoked with the file descriptor of the open cipher (i.e. the file +descriptor returned by the accept system call). + +Each setsockopt invocation must use the level SOL_ALG. + +The setsockopt interface allows setting the following data using the +mentioned optname: + +- ALG_SET_KEY -- Setting the key. Key setting is applicable to: + + - the skcipher cipher type (symmetric ciphers) + + - the hash cipher type (keyed message digests) + + - the AEAD cipher type + + - the RNG cipher type to provide the seed + +- ALG_SET_AEAD_AUTHSIZE -- Setting the authentication tag size for + AEAD ciphers. For a encryption operation, the authentication tag of + the given size will be generated. For a decryption operation, the + provided ciphertext is assumed to contain an authentication tag of + the given size (see section about AEAD memory layout below). + +User space API example +---------------------- + +Please see [1] for libkcapi which provides an easy-to-use wrapper around +the aforementioned Netlink kernel interface. [1] also contains a test +application that invokes all libkcapi API calls. + +[1] http://www.chronox.de/libkcapi.html diff --git a/Documentation/dev-tools/sparse.rst b/Documentation/dev-tools/sparse.rst index 8c250e8a2105..78aa00a604a0 100644 --- a/Documentation/dev-tools/sparse.rst +++ b/Documentation/dev-tools/sparse.rst @@ -51,13 +51,6 @@ sure that bitwise types don't get mixed up (little-endian vs big-endian vs cpu-endian vs whatever), and there the constant "0" really _is_ special. -__bitwise__ - to be used for relatively compact stuff (gfp_t, etc.) that -is mostly warning-free and is supposed to stay that way. Warnings will -be generated without __CHECK_ENDIAN__. - -__bitwise - noisy stuff; in particular, __le*/__be* are that. We really -don't want to drown in noise unless we'd explicitly asked for it. - Using sparse for lock checking ------------------------------ @@ -109,9 +102,4 @@ be recompiled or not. The latter is a fast way to check the whole tree if you have already built it. The optional make variable CF can be used to pass arguments to sparse. The -build system passes -Wbitwise to sparse automatically. To perform endianness -checks, you may define __CHECK_ENDIAN__:: - - make C=2 CF="-D__CHECK_ENDIAN__" - -These checks are disabled by default as they generate a host of warnings. +build system passes -Wbitwise to sparse automatically. diff --git a/Documentation/device-mapper/delay.txt b/Documentation/device-mapper/delay.txt index a07b5927f4a8..4b1d22a44ce4 100644 --- a/Documentation/device-mapper/delay.txt +++ b/Documentation/device-mapper/delay.txt @@ -16,12 +16,12 @@ Example scripts [[ #!/bin/sh # Create device delaying rw operation for 500ms -echo "0 `blockdev --getsize $1` delay $1 0 500" | dmsetup create delayed +echo "0 `blockdev --getsz $1` delay $1 0 500" | dmsetup create delayed ]] [[ #!/bin/sh # Create device delaying only write operation for 500ms and # splitting reads and writes to different devices $1 $2 -echo "0 `blockdev --getsize $1` delay $1 0 0 $2 0 500" | dmsetup create delayed +echo "0 `blockdev --getsz $1` delay $1 0 0 $2 0 500" | dmsetup create delayed ]] diff --git a/Documentation/device-mapper/dm-crypt.txt b/Documentation/device-mapper/dm-crypt.txt index 692171fe9da0..ff1f87bf26e8 100644 --- a/Documentation/device-mapper/dm-crypt.txt +++ b/Documentation/device-mapper/dm-crypt.txt @@ -21,13 +21,30 @@ Parameters: <cipher> <key> <iv_offset> <device path> \ /proc/crypto contains supported crypto modes <key> - Key used for encryption. It is encoded as a hexadecimal number. + Key used for encryption. It is encoded either as a hexadecimal number + or it can be passed as <key_string> prefixed with single colon + character (':') for keys residing in kernel keyring service. You can only use key sizes that are valid for the selected cipher in combination with the selected iv mode. Note that for some iv modes the key string can contain additional keys (for example IV seed) so the key contains more parts concatenated into a single string. +<key_string> + The kernel keyring key is identified by string in following format: + <key_size>:<key_type>:<key_description>. + +<key_size> + The encryption key size in bytes. The kernel key payload size must match + the value passed in <key_size>. + +<key_type> + Either 'logon' or 'user' kernel key type. + +<key_description> + The kernel keyring key description crypt target should look for + when loading key of <key_type>. + <keycount> Multi-key compatibility mode. You can define <keycount> keys and then sectors are encrypted according to their offsets (sector 0 uses key0; @@ -85,7 +102,13 @@ https://gitlab.com/cryptsetup/cryptsetup [[ #!/bin/sh # Create a crypt device using dmsetup -dmsetup create crypt1 --table "0 `blockdev --getsize $1` crypt aes-cbc-essiv:sha256 babebabebabebabebabebabebabebabe 0 $1 0" +dmsetup create crypt1 --table "0 `blockdev --getsz $1` crypt aes-cbc-essiv:sha256 babebabebabebabebabebabebabebabe 0 $1 0" +]] + +[[ +#!/bin/sh +# Create a crypt device using dmsetup when encryption key is stored in keyring service +dmsetup create crypt2 --table "0 `blockdev --getsize $1` crypt aes-cbc-essiv:sha256 :32:logon:my_prefix:my_key 0 $1 0" ]] [[ diff --git a/Documentation/device-mapper/dm-raid.txt b/Documentation/device-mapper/dm-raid.txt index 9bd531aa2279..5e3786fd9ea7 100644 --- a/Documentation/device-mapper/dm-raid.txt +++ b/Documentation/device-mapper/dm-raid.txt @@ -242,6 +242,10 @@ recovery. Here is a fuller description of the individual fields: in RAID1/10 or wrong parity values found in RAID4/5/6. This value is valid only after a "check" of the array is performed. A healthy array has a 'mismatch_cnt' of 0. + <data_offset> The current data offset to the start of the user data on + each component device of a raid set (see the respective + raid parameter to support out-of-place reshaping). + Message Interface ----------------- diff --git a/Documentation/device-mapper/linear.txt b/Documentation/device-mapper/linear.txt index d5307d380a45..7cb98d89d3f8 100644 --- a/Documentation/device-mapper/linear.txt +++ b/Documentation/device-mapper/linear.txt @@ -16,15 +16,15 @@ Example scripts [[ #!/bin/sh # Create an identity mapping for a device -echo "0 `blockdev --getsize $1` linear $1 0" | dmsetup create identity +echo "0 `blockdev --getsz $1` linear $1 0" | dmsetup create identity ]] [[ #!/bin/sh # Join 2 devices together -size1=`blockdev --getsize $1` -size2=`blockdev --getsize $2` +size1=`blockdev --getsz $1` +size2=`blockdev --getsz $2` echo "0 $size1 linear $1 0 $size1 $size2 linear $2 0" | dmsetup create joined ]] @@ -44,7 +44,7 @@ if (!defined($dev)) { die("Please specify a device.\n"); } -my $dev_size = `blockdev --getsize $dev`; +my $dev_size = `blockdev --getsz $dev`; my $extents = int($dev_size / $extent_size) - (($dev_size % $extent_size) ? 1 : 0); diff --git a/Documentation/device-mapper/striped.txt b/Documentation/device-mapper/striped.txt index 45f3b91ea4c3..07ec492cceee 100644 --- a/Documentation/device-mapper/striped.txt +++ b/Documentation/device-mapper/striped.txt @@ -37,9 +37,9 @@ if (!$num_devs) { die("Specify at least one device\n"); } -$min_dev_size = `blockdev --getsize $devs[0]`; +$min_dev_size = `blockdev --getsz $devs[0]`; for ($i = 1; $i < $num_devs; $i++) { - my $this_size = `blockdev --getsize $devs[$i]`; + my $this_size = `blockdev --getsz $devs[$i]`; $min_dev_size = ($min_dev_size < $this_size) ? $min_dev_size : $this_size; } diff --git a/Documentation/device-mapper/switch.txt b/Documentation/device-mapper/switch.txt index 424835e57f27..5bd4831db4a8 100644 --- a/Documentation/device-mapper/switch.txt +++ b/Documentation/device-mapper/switch.txt @@ -123,7 +123,7 @@ Assume that you have volumes vg1/switch0 vg1/switch1 vg1/switch2 with the same size. Create a switch device with 64kB region size: - dmsetup create switch --table "0 `blockdev --getsize /dev/vg1/switch0` + dmsetup create switch --table "0 `blockdev --getsz /dev/vg1/switch0` switch 3 128 0 /dev/vg1/switch0 0 /dev/vg1/switch1 0 /dev/vg1/switch2 0" Set mappings for the first 7 entries to point to devices switch0, switch1, diff --git a/Documentation/devicetree/bindings/arm/amlogic,scpi.txt b/Documentation/devicetree/bindings/arm/amlogic,scpi.txt new file mode 100644 index 000000000000..7b9a861e9306 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/amlogic,scpi.txt @@ -0,0 +1,20 @@ +System Control and Power Interface (SCPI) Message Protocol +(in addition to the standard binding in [0]) +---------------------------------------------------------- +Required properties + +- compatible : should be "amlogic,meson-gxbb-scpi" + +AMLOGIC SRAM and Shared Memory for SCPI +------------------------------------ + +Required properties: +- compatible : should be "amlogic,meson-gxbb-sram" + +Each sub-node represents the reserved area for SCPI. + +Required sub-node properties: +- compatible : should be "amlogic,meson-gxbb-scp-shmem" for SRAM based shared + memory on Amlogic GXBB SoC. + +[0] Documentation/devicetree/bindings/arm/arm,scpi.txt diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt index fcc6f6c10803..9b2b41ab6817 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.txt +++ b/Documentation/devicetree/bindings/arm/amlogic.txt @@ -17,6 +17,18 @@ Boards with the Amlogic Meson GXBaby SoC shall have the following properties: Required root node property: compatible: "amlogic,meson-gxbb"; +Boards with the Amlogic Meson GXL S905X SoC shall have the following properties: + Required root node property: + compatible: "amlogic,s905x", "amlogic,meson-gxl"; + +Boards with the Amlogic Meson GXL S905D SoC shall have the following properties: + Required root node property: + compatible: "amlogic,s905d", "amlogic,meson-gxl"; + +Boards with the Amlogic Meson GXM S912 SoC shall have the following properties: + Required root node property: + compatible: "amlogic,s912", "amlogic,meson-gxm"; + Board compatible values: - "geniatech,atv1200" (Meson6) - "minix,neo-x8" (Meson8) @@ -28,3 +40,10 @@ Board compatible values: - "hardkernel,odroid-c2" (Meson gxbb) - "amlogic,p200" (Meson gxbb) - "amlogic,p201" (Meson gxbb) + - "amlogic,p212" (Meson gxl s905x) + - "amlogic,p230" (Meson gxl s905d) + - "amlogic,p231" (Meson gxl s905d) + - "amlogic,q200" (Meson gxm s912) + - "amlogic,q201" (Meson gxm s912) + - "nexbox,a95x" (Meson gxbb or Meson gxl s905x) + - "nexbox,a1" (Meson gxm s912) diff --git a/Documentation/devicetree/bindings/arm/arm,scpi.txt b/Documentation/devicetree/bindings/arm/arm,scpi.txt index faa4b44572e3..401831973638 100644 --- a/Documentation/devicetree/bindings/arm/arm,scpi.txt +++ b/Documentation/devicetree/bindings/arm/arm,scpi.txt @@ -7,7 +7,10 @@ by Linux to initiate various system control and power operations. Required properties: -- compatible : should be "arm,scpi" +- compatible : should be + * "arm,scpi" : For implementations complying to SCPI v1.0 or above + * "arm,scpi-pre-1.0" : For implementations complying to all + unversioned releases prior to SCPI v1.0 - mboxes: List of phandle and mailbox channel specifiers All the channels reserved by remote SCP firmware for use by SCPI message protocol should be specified in any order @@ -59,18 +62,14 @@ SRAM and Shared Memory for SCPI A small area of SRAM is reserved for SCPI communication between application processors and SCP. -Required properties: -- compatible : should be "arm,juno-sram-ns" for Non-secure SRAM on Juno - -The rest of the properties should follow the generic mmio-sram description -found in ../../sram/sram.txt +The properties should follow the generic mmio-sram description found in [3] Each sub-node represents the reserved area for SCPI. Required sub-node properties: - reg : The base offset and size of the reserved area with the SRAM -- compatible : should be "arm,juno-scp-shmem" for Non-secure SRAM based - shared memory on Juno platforms +- compatible : should be "arm,scp-shmem" for Non-secure SRAM based + shared memory Sensor bindings for the sensors based on SCPI Message Protocol -------------------------------------------------------------- @@ -81,11 +80,9 @@ Required properties: - #thermal-sensor-cells: should be set to 1. This property follows the thermal device tree bindings[2]. - Valid cell values are raw identifiers (Sensor - ID) as used by the firmware. Refer to - platform documentation for your - implementation for the IDs to use. For Juno - R0 and Juno R1 refer to [3]. + Valid cell values are raw identifiers (Sensor ID) + as used by the firmware. Refer to platform details + for your implementation for the IDs to use. Power domain bindings for the power domains based on SCPI Message Protocol ------------------------------------------------------------ @@ -112,7 +109,7 @@ Required properties: [0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html [1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/thermal/thermal.txt -[3] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0922b/apas03s22.html +[3] Documentation/devicetree/bindings/sram/sram.txt [4] Documentation/devicetree/bindings/power/power_domain.txt Example: diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards index ab318a56fca2..b6e810c2781a 100644 --- a/Documentation/devicetree/bindings/arm/arm-boards +++ b/Documentation/devicetree/bindings/arm/arm-boards @@ -148,11 +148,12 @@ Example: /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> -#include "skeleton.dtsi" / { model = "ARM RealView PB1176 with device tree"; compatible = "arm,realview-pb1176"; + #address-cells = <1>; + #size-cells = <1>; soc { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt index e1f5ad855f14..29737b9b616e 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.txt +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt @@ -225,3 +225,19 @@ required properties: compatible = "atmel,sama5d3-sfr", "syscon"; reg = <0xf0038000 0x60>; }; + +Security Module (SECUMOD) + +The Security Module macrocell provides all necessary secure functions to avoid +voltage, temperature, frequency and mechanical attacks on the chip. It also +embeds secure memories that can be scrambled + +required properties: +- compatible: Should be "atmel,<chip>-secumod", "syscon". + <chip> can be "sama5d2". +- reg: Should contain registers location and length + + secumod@fc040000 { + compatible = "atmel,sama5d2-secumod", "syscon"; + reg = <0xfc040000 0x100>; + }; diff --git a/Documentation/devicetree/bindings/arm/bcm/ns2.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.txt index 35f056f4a1c3..35f056f4a1c3 100644 --- a/Documentation/devicetree/bindings/arm/bcm/ns2.txt +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.txt diff --git a/Documentation/devicetree/bindings/arm/cpu-capacity.txt b/Documentation/devicetree/bindings/arm/cpu-capacity.txt new file mode 100644 index 000000000000..7809fbe0cdb7 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/cpu-capacity.txt @@ -0,0 +1,236 @@ +========================================== +ARM CPUs capacity bindings +========================================== + +========================================== +1 - Introduction +========================================== + +ARM systems may be configured to have cpus with different power/performance +characteristics within the same chip. In this case, additional information has +to be made available to the kernel for it to be aware of such differences and +take decisions accordingly. + +========================================== +2 - CPU capacity definition +========================================== + +CPU capacity is a number that provides the scheduler information about CPUs +heterogeneity. Such heterogeneity can come from micro-architectural differences +(e.g., ARM big.LITTLE systems) or maximum frequency at which CPUs can run +(e.g., SMP systems with multiple frequency domains). Heterogeneity in this +context is about differing performance characteristics; this binding tries to +capture a first-order approximation of the relative performance of CPUs. + +CPU capacities are obtained by running a suitable benchmark. This binding makes +no guarantees on the validity or suitability of any particular benchmark, the +final capacity should, however, be: + +* A "single-threaded" or CPU affine benchmark +* Divided by the running frequency of the CPU executing the benchmark +* Not subject to dynamic frequency scaling of the CPU + +For the time being we however advise usage of the Dhrystone benchmark. What +above thus becomes: + +CPU capacities are obtained by running the Dhrystone benchmark on each CPU at +max frequency (with caches enabled). The obtained DMIPS score is then divided +by the frequency (in MHz) at which the benchmark has been run, so that +DMIPS/MHz are obtained. Such values are then normalized w.r.t. the highest +score obtained in the system. + +========================================== +3 - capacity-dmips-mhz +========================================== + +capacity-dmips-mhz is an optional cpu node [1] property: u32 value +representing CPU capacity expressed in normalized DMIPS/MHz. At boot time, the +maximum frequency available to the cpu is then used to calculate the capacity +value internally used by the kernel. + +capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu +node, it has to be specified for every other cpu nodes, or the system will +fall back to the default capacity value for every CPU. If cpufreq is not +available, final capacities are calculated by directly using capacity-dmips- +mhz values (normalized w.r.t. the highest value found while parsing the DT). + +=========================================== +4 - Examples +=========================================== + +Example 1 (ARM 64-bit, 6-cpu system, two clusters): +capacities-dmips-mhz are scaled w.r.t. 1024 (cpu@0 and cpu@1) +supposing cluster0@max-freq=1100 and custer1@max-freq=850, +final capacities are 1024 for cluster0 and 446 for cluster1 + +cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&A57_0>; + }; + core1 { + cpu = <&A57_1>; + }; + }; + + cluster1 { + core0 { + cpu = <&A53_0>; + }; + core1 { + cpu = <&A53_1>; + }; + core2 { + cpu = <&A53_2>; + }; + core3 { + cpu = <&A53_3>; + }; + }; + }; + + idle-states { + entry-method = "arm,psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <100>; + exit-latency-us = <250>; + min-residency-us = <150>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x1010000>; + local-timer-stop; + entry-latency-us = <800>; + exit-latency-us = <700>; + min-residency-us = <2500>; + }; + }; + + A57_0: cpu@0 { + compatible = "arm,cortex-a57","arm,armv8"; + reg = <0x0 0x0>; + device_type = "cpu"; + enable-method = "psci"; + next-level-cache = <&A57_L2>; + clocks = <&scpi_dvfs 0>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <1024>; + }; + + A57_1: cpu@1 { + compatible = "arm,cortex-a57","arm,armv8"; + reg = <0x0 0x1>; + device_type = "cpu"; + enable-method = "psci"; + next-level-cache = <&A57_L2>; + clocks = <&scpi_dvfs 0>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <1024>; + }; + + A53_0: cpu@100 { + compatible = "arm,cortex-a53","arm,armv8"; + reg = <0x0 0x100>; + device_type = "cpu"; + enable-method = "psci"; + next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <578>; + }; + + A53_1: cpu@101 { + compatible = "arm,cortex-a53","arm,armv8"; + reg = <0x0 0x101>; + device_type = "cpu"; + enable-method = "psci"; + next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <578>; + }; + + A53_2: cpu@102 { + compatible = "arm,cortex-a53","arm,armv8"; + reg = <0x0 0x102>; + device_type = "cpu"; + enable-method = "psci"; + next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <578>; + }; + + A53_3: cpu@103 { + compatible = "arm,cortex-a53","arm,armv8"; + reg = <0x0 0x103>; + device_type = "cpu"; + enable-method = "psci"; + next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <578>; + }; + + A57_L2: l2-cache0 { + compatible = "cache"; + }; + + A53_L2: l2-cache1 { + compatible = "cache"; + }; +}; + +Example 2 (ARM 32-bit, 4-cpu system, two clusters, + cpus 0,1@1GHz, cpus 2,3@500MHz): +capacities-dmips-mhz are scaled w.r.t. 2 (cpu@0 and cpu@1), this means that first +cpu@0 and cpu@1 are twice fast than cpu@2 and cpu@3 (at the same frequency) + +cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + capacity-dmips-mhz = <2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + capacity-dmips-mhz = <2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x100>; + capacity-dmips-mhz = <1>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x101>; + capacity-dmips-mhz = <1>; + }; +}; + +=========================================== +5 - References +=========================================== + +[1] ARM Linux Kernel documentation - CPUs bindings + Documentation/devicetree/bindings/arm/cpus.txt diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index e6782d50cbcd..a1bcfeed5f24 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -178,6 +178,7 @@ nodes to be present and contain the properties described below. "marvell,pj4b" "marvell,sheeva-v5" "nvidia,tegra132-denver" + "nvidia,tegra186-denver" "qcom,krait" "qcom,kryo" "qcom,scorpion" @@ -241,6 +242,14 @@ nodes to be present and contain the properties described below. # List of phandles to idle state nodes supported by this cpu [3]. + - capacity-dmips-mhz + Usage: Optional + Value type: <u32> + Definition: + # u32 value representing CPU capacity [3] in + DMIPS/MHz, relative to highest capacity-dmips-mhz + in the system. + - rockchip,pmu Usage: optional for systems that have an "enable-method" property value of "rockchip,rk3066-smp" @@ -464,3 +473,5 @@ cpus { [2] arm/msm/qcom,kpss-acc.txt [3] ARM Linux kernel documentation - idle states bindings Documentation/devicetree/bindings/arm/idle-states.txt +[3] ARM Linux kernel documentation - cpu capacity bindings + Documentation/devicetree/bindings/arm/cpu-capacity.txt diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index dbbc0952021c..d6ee9c6e1dbb 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -97,7 +97,7 @@ Freescale LS1021A Platform Device Tree Bindings Required root node compatible properties: - compatible = "fsl,ls1021a"; -Freescale LS1021A SoC-specific Device Tree Bindings +Freescale SoC-specific Device Tree Bindings ------------------------------------------- Freescale SCFG @@ -105,7 +105,11 @@ Freescale SCFG configuration and status registers for the chip. Such as getting PEX port status. Required properties: - - compatible: should be "fsl,ls1021a-scfg" + - compatible: Should contain a chip-specific compatible string, + Chip-specific strings are of the form "fsl,<chip>-scfg", + The following <chip>s are known to be supported: + ls1021a, ls1043a, ls1046a, ls2080a. + - reg: should contain base address and length of SCFG memory-mapped registers Example: @@ -119,7 +123,11 @@ Freescale DCFG configuration and status for the device. Such as setting the secondary core start address and release the secondary core from holdoff and startup. Required properties: - - compatible: should be "fsl,ls1021a-dcfg" + - compatible: Should contain a chip-specific compatible string, + Chip-specific strings are of the form "fsl,<chip>-dcfg", + The following <chip>s are known to be supported: + ls1021a, ls1043a, ls1046a, ls2080a. + - reg : should contain base address and length of DCFG memory-mapped registers Example: @@ -131,6 +139,10 @@ Example: Freescale ARMv8 based Layerscape SoC family Device Tree Bindings ---------------------------------------------------------------- +LS1043A SoC +Required root node properties: + - compatible = "fsl,ls1043a"; + LS1043A ARMv8 based RDB Board Required root node properties: - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a"; @@ -139,6 +151,22 @@ LS1043A ARMv8 based QDS Board Required root node properties: - compatible = "fsl,ls1043a-qds", "fsl,ls1043a"; +LS1046A SoC +Required root node properties: + - compatible = "fsl,ls1046a"; + +LS1046A ARMv8 based QDS Board +Required root node properties: + - compatible = "fsl,ls1046a-qds", "fsl,ls1046a"; + +LS1046A ARMv8 based RDB Board +Required root node properties: + - compatible = "fsl,ls1046a-rdb", "fsl,ls1046a"; + +LS2080A SoC +Required root node properties: + - compatible = "fsl,ls2080a"; + LS2080A ARMv8 based Simulator model Required root node properties: - compatible = "fsl,ls2080a-simu", "fsl,ls2080a"; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index 3f81575aa6be..7df79a715611 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -28,6 +28,10 @@ HiP06 D03 Board Required root node properties: - compatible = "hisilicon,hip06-d03"; +HiP07 D05 Board +Required root node properties: + - compatible = "hisilicon,hip07-d05"; + Hisilicon system controller Required properties: diff --git a/Documentation/devicetree/bindings/arm/juno,scpi.txt b/Documentation/devicetree/bindings/arm/juno,scpi.txt new file mode 100644 index 000000000000..2ace8696bbee --- /dev/null +++ b/Documentation/devicetree/bindings/arm/juno,scpi.txt @@ -0,0 +1,26 @@ +System Control and Power Interface (SCPI) Message Protocol +(in addition to the standard binding in [0]) + +Juno SRAM and Shared Memory for SCPI +------------------------------------ + +Required properties: +- compatible : should be "arm,juno-sram-ns" for Non-secure SRAM + +Each sub-node represents the reserved area for SCPI. + +Required sub-node properties: +- reg : The base offset and size of the reserved area with the SRAM +- compatible : should be "arm,juno-scp-shmem" for Non-secure SRAM based + shared memory on Juno platforms + +Sensor bindings for the sensors based on SCPI Message Protocol +-------------------------------------------------------------- +Required properties: +- compatible : should be "arm,scpi-sensors". +- #thermal-sensor-cells: should be set to 1. + For Juno R0 and Juno R1 refer to [1] for the + sensor identifiers + +[0] Documentation/devicetree/bindings/arm/arm,scpi.txt +[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0922b/apas03s22.html diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,sci.txt b/Documentation/devicetree/bindings/arm/keystone/ti,sci.txt new file mode 100644 index 000000000000..31f5f9a104cc --- /dev/null +++ b/Documentation/devicetree/bindings/arm/keystone/ti,sci.txt @@ -0,0 +1,81 @@ +Texas Instruments System Control Interface (TI-SCI) Message Protocol +-------------------------------------------------------------------- + +Texas Instrument's processors including those belonging to Keystone generation +of processors have separate hardware entity which is now responsible for the +management of the System on Chip (SoC) system. These include various system +level functions as well. + +An example of such an SoC is K2G, which contains the system control hardware +block called Power Management Micro Controller (PMMC). This hardware block is +initialized early into boot process and provides services to Operating Systems +on multiple processors including ones running Linux. + +See http://processors.wiki.ti.com/index.php/TISCI for protocol definition. + +TI-SCI controller Device Node: +============================= + +The TI-SCI node describes the Texas Instrument's System Controller entity node. +This parent node may optionally have additional children nodes which describe +specific functionality such as clocks, power domain, reset or additional +functionality as may be required for the SoC. This hierarchy also describes the +relationship between the TI-SCI parent node to the child node. + +Required properties: +------------------- +- compatible: should be "ti,k2g-sci" +- mbox-names: + "rx" - Mailbox corresponding to receive path + "tx" - Mailbox corresponding to transmit path + +- mboxes: Mailboxes corresponding to the mbox-names. Each value of the mboxes + property should contain a phandle to the mailbox controller device + node and an args specifier that will be the phandle to the intended + sub-mailbox child node to be used for communication. + +See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details +about the generic mailbox controller and client driver bindings. Also see +Documentation/devicetree/bindings/mailbox/ti,message-manager.txt for typical +controller that is used to communicate with this System controllers. + +Optional Properties: +------------------- +- reg-names: + debug_messages - Map the Debug message region +- reg: register space corresponding to the debug_messages +- ti,system-reboot-controller: If system reboot can be triggered by SoC reboot + +Example (K2G): +------------- + pmmc: pmmc { + compatible = "ti,k2g-sci"; + mbox-names = "rx", "tx"; + mboxes= <&msgmgr &msgmgr_proxy_pmmc_rx>, + <&msgmgr &msgmgr_proxy_pmmc_tx>; + reg-names = "debug_messages"; + reg = <0x02921800 0x800>; + }; + + +TI-SCI Client Device Node: +========================= + +Client nodes are maintained as children of the relevant TI-SCI device node. + +Example (K2G): +------------- + pmmc: pmmc { + compatible = "ti,k2g-sci"; + ... + + my_clk_node: clk_node { + ... + ... + }; + + my_pd_node: pd_node { + ... + ... + }; + }; diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index f53e2ee65e35..05f95c3ed7d4 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -86,6 +86,9 @@ SoCs: - DRA722 compatible = "ti,dra722", "ti,dra72", "ti,dra7" +- DRA718 + compatible = "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7" + - AM5728 compatible = "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7" @@ -175,12 +178,18 @@ Boards: - AM5728 IDK compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7" +- AM5718 IDK + compatible = "ti,am5718-idk", "ti,am5718", "ti,dra7" + - DRA742 EVM: Software Development Board for DRA742 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7" - DRA722 EVM: Software Development Board for DRA722 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7" +- DRA718 EVM: Software Development Board for DRA718 + compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7" + - DM3730 Logic PD Torpedo + Wireless: Commercial System on Module with WiFi and Bluetooth compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3" diff --git a/Documentation/devicetree/bindings/arm/oxnas.txt b/Documentation/devicetree/bindings/arm/oxnas.txt index b9e49711ba05..ac64e60f99f1 100644 --- a/Documentation/devicetree/bindings/arm/oxnas.txt +++ b/Documentation/devicetree/bindings/arm/oxnas.txt @@ -5,5 +5,10 @@ Boards with the OX810SE SoC shall have the following properties: Required root node property: compatible: "oxsemi,ox810se" +Boards with the OX820 SoC shall have the following properties: + Required root node property: + compatible: "oxsemi,ox820" + Board compatible values: - "wd,mbwe" (OX810SE) + - "cloudengines,pogoplugv3" (OX820) diff --git a/Documentation/devicetree/bindings/arm/qcom.txt b/Documentation/devicetree/bindings/arm/qcom.txt index 3e24518c6678..028d16e72186 100644 --- a/Documentation/devicetree/bindings/arm/qcom.txt +++ b/Documentation/devicetree/bindings/arm/qcom.txt @@ -21,7 +21,10 @@ The 'SoC' element must be one of the following strings: apq8096 msm8916 msm8974 + msm8992 + msm8994 msm8996 + mdm9615 The 'board' element must be one of the following strings: diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index 55f388f954de..cc4ace6397ab 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -25,6 +25,10 @@ Rockchip platforms device tree bindings Required root node properties: - compatible = "radxa,rock2-square", "rockchip,rk3288"; +- Rikomagic MK808 v1 board: + Required root node properties: + - compatible = "rikomagic,mk808", "rockchip,rk3066a"; + - Firefly Firefly-RK3288 board: Required root node properties: - compatible = "firefly,firefly-rk3288", "rockchip,rk3288"; @@ -99,6 +103,18 @@ Rockchip platforms device tree bindings Required root node properties: - compatible = "mqmaker,miqi", "rockchip,rk3288"; +- Rockchip PX3 Evaluation board: + Required root node properties: + - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; + +- Rockchip PX5 Evaluation board: + Required root node properties: + - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368"; + +- Rockchip RK1108 Evaluation board + Required root node properties: + - compatible = "rockchip,rk1108-evb", "rockchip,rk1108"; + - Rockchip RK3368 evb: Required root node properties: - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368"; diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt index 0ea7f14ef294..3c551894f621 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt @@ -15,6 +15,8 @@ Required root node properties: - "samsung,xyref5260" - for Exynos5260-based Samsung board. - "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board. - "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board. + - "samsung,tm2" - for Exynos5433-based Samsung TM2 board. + - "samsung,tm2e" - for Exynos5433-based Samsung TM2E board. - "samsung,sd5v1" - for Exynos5440-based Samsung board. - "samsung,ssdk5440" - for Exynos5440-based Samsung board. @@ -22,6 +24,9 @@ Required root node properties: * FriendlyARM - "friendlyarm,tiny4412" - for Exynos4412-based FriendlyARM TINY4412 board. + * TOPEET + - "topeet,itop4412-elite" - for Exynos4412-based TOPEET + Elite base board. * Google - "google,pi" - for Exynos5800-based Google Peach Pi diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 2f0b7169f132..253bf9b86690 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -13,6 +13,10 @@ SoCs: compatible = "renesas,r8a73a4" - R-Mobile A1 (R8A77400) compatible = "renesas,r8a7740" + - RZ/G1M (R8A77430) + compatible = "renesas,r8a7743" + - RZ/G1E (R8A77450) + compatible = "renesas,r8a7745" - R-Car M1A (R8A77781) compatible = "renesas,r8a7778" - R-Car H1 (R8A77790) @@ -35,7 +39,7 @@ SoCs: Boards: - - Alt + - Alt (RTP0RC7794SEB00010S) compatible = "renesas,alt", "renesas,r8a7794" - APE6-EVM compatible = "renesas,ape6evm", "renesas,r8a73a4" @@ -47,9 +51,9 @@ Boards: compatible = "renesas,bockw", "renesas,r8a7778" - Genmai (RTK772100BC00000BR) compatible = "renesas,genmai", "renesas,r7s72100" - - Gose + - Gose (RTP0RC7793SEB00010S) compatible = "renesas,gose", "renesas,r8a7793" - - H3ULCB (RTP0RC7795SKB00010S) + - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKB00010S) compatible = "renesas,h3ulcb", "renesas,r8a7795"; - Henninger compatible = "renesas,henninger", "renesas,r8a7791" @@ -61,7 +65,9 @@ Boards: compatible = "renesas,kzm9g", "renesas,sh73a0" - Lager (RTP0RC7790SEB00010S) compatible = "renesas,lager", "renesas,r8a7790" - - Marzen + - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S) + compatible = "renesas,m3ulcb", "renesas,r8a7796"; + - Marzen (R0P7779A00010S) compatible = "renesas,marzen", "renesas,r8a7779" - Porter (M2-LCDP) compatible = "renesas,porter", "renesas,r8a7791" @@ -73,5 +79,27 @@ Boards: compatible = "renesas,salvator-x", "renesas,r8a7796"; - SILK (RTP0RC7794LCB00011S) compatible = "renesas,silk", "renesas,r8a7794" + - SK-RZG1E (YR8A77450S000BE) + compatible = "renesas,sk-rzg1e", "renesas,r8a7745" + - SK-RZG1M (YR8A77430S000BE) + compatible = "renesas,sk-rzg1m", "renesas,r8a7743" - Wheat compatible = "renesas,wheat", "renesas,r8a7792" + + +Most Renesas ARM SoCs have a Product Register that allows to retrieve SoC +product and revision information. If present, a device node for this register +should be added. + +Required properties: + - compatible: Must be "renesas,prr". + - reg: Base address and length of the register block. + + +Examples +-------- + + prr: chipid@ff000044 { + compatible = "renesas,prr"; + reg = <0 0xff000044 0 4>; + }; diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt index 3975d0a0e4c2..4d6467cc2aa2 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.txt +++ b/Documentation/devicetree/bindings/arm/sunxi.txt @@ -14,4 +14,5 @@ using one of the following compatible strings: allwinner,sun8i-a83t allwinner,sun8i-h3 allwinner,sun9i-a80 + allwinner,sun50i-a64 nextthing,gr8 diff --git a/Documentation/devicetree/bindings/arm/swir.txt b/Documentation/devicetree/bindings/arm/swir.txt new file mode 100644 index 000000000000..042be73a95d3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/swir.txt @@ -0,0 +1,12 @@ +Sierra Wireless Modules device tree bindings +-------------------------------------------- + +Supported Modules : + - WP8548 : Includes MDM9615 and PM8018 in a module + +Sierra Wireless modules shall have the following properties : + Required root node property + - compatible: "swir,wp8548" for the WP8548 CF3 Module + +Board compatible values: + - "swir,mangoh-green-wp8548" for the mangOH green board with the WP8548 module diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt index 032a7606b862..fc33ca01e9ba 100644 --- a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt +++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt @@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller Required properties: - reg: Physical base address and size of the controller's register area. - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where - chip could be ls1021a, ls2080a, ls1043a etc. + chip could be ls1021a, ls1043a, ls1046a, ls2080a etc. - clocks: Input clock specifier. Refer to common clock bindings. - interrupts: Interrupt specifier. Refer to interrupt binding. diff --git a/Documentation/devicetree/bindings/ata/ahci-st.txt b/Documentation/devicetree/bindings/ata/ahci-st.txt index e1d01df8e3c1..909c9935360d 100644 --- a/Documentation/devicetree/bindings/ata/ahci-st.txt +++ b/Documentation/devicetree/bindings/ata/ahci-st.txt @@ -18,21 +18,6 @@ Optional properties: Example: - /* Example for stih416 */ - sata0: sata@fe380000 { - compatible = "st,ahci"; - reg = <0xfe380000 0x1000>; - interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>; - interrupt-names = "hostc"; - phys = <&phy_port0 PHY_TYPE_SATA>; - phy-names = "ahci_phy"; - resets = <&powerdown STIH416_SATA0_POWERDOWN>, - <&softreset STIH416_SATA0_SOFTRESET>; - reset-names = "pwr-dwn", "sw-rst"; - clocks = <&clk_s_a0_ls CLK_ICN_REG>; - clock-names = "ahci_clk"; - }; - /* Example for stih407 family silicon */ sata0: sata@9b20000 { compatible = "st,ahci"; diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra20-gmi.txt b/Documentation/devicetree/bindings/bus/nvidia,tegra20-gmi.txt new file mode 100644 index 000000000000..83b0e54f727c --- /dev/null +++ b/Documentation/devicetree/bindings/bus/nvidia,tegra20-gmi.txt @@ -0,0 +1,132 @@ +Device tree bindings for NVIDIA Tegra Generic Memory Interface bus + +The Generic Memory Interface bus enables memory transfers between internal and +external memory. Can be used to attach various high speed devices such as +synchronous/asynchronous NOR, FPGA, UARTS and more. + +The actual devices are instantiated from the child nodes of a GMI node. + +Required properties: + - compatible : Should contain one of the following: + For Tegra20 must contain "nvidia,tegra20-gmi". + For Tegra30 must contain "nvidia,tegra30-gmi". + - reg: Should contain GMI controller registers location and length. + - clocks: Must contain an entry for each entry in clock-names. + - clock-names: Must include the following entries: "gmi" + - resets : Must contain an entry for each entry in reset-names. + - reset-names : Must include the following entries: "gmi" + - #address-cells: The number of cells used to represent physical base + addresses in the GMI address space. Should be 2. + - #size-cells: The number of cells used to represent the size of an address + range in the GMI address space. Should be 1. + - ranges: Must be set up to reflect the memory layout with three integer values + for each chip-select line in use (only one entry is supported, see below + comments): + <cs-number> <offset> <physical address of mapping> <size> + +Note that the GMI controller does not have any internal chip-select address +decoding, because of that chip-selects either need to be managed via software +or by employing external chip-select decoding logic. + +If external chip-select logic is used to support multiple devices it is assumed +that the devices use the same timing and so are probably the same type. It also +assumes that they can fit in the 256MB address range. In this case only one +child device is supported which represents the active chip-select line, see +examples for more insight. + +The chip-select number is decoded from the child nodes second address cell of +'ranges' property, if 'ranges' property is not present or empty chip-select will +then be decoded from the first cell of the 'reg' property. + +Optional child cs node properties: + + - nvidia,snor-data-width-32bit: Use 32bit data-bus, default is 16bit. + - nvidia,snor-mux-mode: Enable address/data MUX mode. + - nvidia,snor-rdy-active-before-data: Assert RDY signal one cycle before data. + If omitted it will be asserted with data. + - nvidia,snor-rdy-active-high: RDY signal is active high + - nvidia,snor-adv-active-high: ADV signal is active high + - nvidia,snor-oe-active-high: WE/OE signal is active high + - nvidia,snor-cs-active-high: CS signal is active high + + Note that there is some special handling for the timing values. + From Tegra TRM: + Programming 0 means 1 clock cycle: actual cycle = programmed cycle + 1 + + - nvidia,snor-muxed-width: Number of cycles MUX address/data asserted on the + bus. Valid values are 0-15, default is 1 + - nvidia,snor-hold-width: Number of cycles CE stays asserted after the + de-assertion of WR_N (in case of SLAVE/MASTER Request) or OE_N + (in case of MASTER Request). Valid values are 0-15, default is 1 + - nvidia,snor-adv-width: Number of cycles during which ADV stays asserted. + Valid values are 0-15, default is 1. + - nvidia,snor-ce-width: Number of cycles before CE is asserted. + Valid values are 0-15, default is 4 + - nvidia,snor-we-width: Number of cycles during which WE stays asserted. + Valid values are 0-15, default is 1 + - nvidia,snor-oe-width: Number of cycles during which OE stays asserted. + Valid values are 0-255, default is 1 + - nvidia,snor-wait-width: Number of cycles before READY is asserted. + Valid values are 0-255, default is 3 + +Example with two SJA1000 CAN controllers connected to the GMI bus. We wrap the +controllers with a simple-bus node since they are all connected to the same +chip-select (CS4), in this example external address decoding is provided: + +gmi@70090000 { + compatible = "nvidia,tegra20-gmi"; + reg = <0x70009000 0x1000>; + #address-cells = <2>; + #size-cells = <1>; + clocks = <&tegra_car TEGRA20_CLK_NOR>; + clock-names = "gmi"; + resets = <&tegra_car 42>; + reset-names = "gmi"; + ranges = <4 0 0xd0000000 0xfffffff>; + + status = "okay"; + + bus@4,0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 4 0 0x40100>; + + nvidia,snor-mux-mode; + nvidia,snor-adv-active-high; + + can@0 { + reg = <0 0x100>; + ... + }; + + can@40000 { + reg = <0x40000 0x100>; + ... + }; + }; +}; + +Example with one SJA1000 CAN controller connected to the GMI bus +on CS4: + +gmi@70090000 { + compatible = "nvidia,tegra20-gmi"; + reg = <0x70009000 0x1000>; + #address-cells = <2>; + #size-cells = <1>; + clocks = <&tegra_car TEGRA20_CLK_NOR>; + clock-names = "gmi"; + resets = <&tegra_car 42>; + reset-names = "gmi"; + ranges = <4 0 0xd0000000 0xfffffff>; + + status = "okay"; + + can@4,0 { + reg = <4 0 0x100>; + nvidia,snor-mux-mode; + nvidia,snor-adv-active-high; + ... + }; +}; diff --git a/Documentation/devicetree/bindings/bus/ti,da850-mstpri.txt b/Documentation/devicetree/bindings/bus/ti,da850-mstpri.txt new file mode 100644 index 000000000000..72daefc6b4a1 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/ti,da850-mstpri.txt @@ -0,0 +1,20 @@ +* Device tree bindings for Texas Instruments da8xx master peripheral + priority driver + +DA8XX SoCs feature a set of registers allowing to change the priority of all +peripherals classified as masters. + +Documentation: +OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf + +Required properties: + +- compatible: "ti,da850-mstpri" - for da850 based boards +- reg: offset and length of the mstpri registers + +Example for da850-lcdk is shown below. + +mstpri { + compatible = "ti,da850-mstpri"; + reg = <0x14110 0x0c>; +}; diff --git a/Documentation/devicetree/bindings/clock/imx31-clock.txt b/Documentation/devicetree/bindings/clock/imx31-clock.txt index 19df842c694f..8163d565f697 100644 --- a/Documentation/devicetree/bindings/clock/imx31-clock.txt +++ b/Documentation/devicetree/bindings/clock/imx31-clock.txt @@ -77,7 +77,7 @@ Examples: clks: ccm@53f80000{ compatible = "fsl,imx31-ccm"; reg = <0x53f80000 0x4000>; - interrupts = <0 31 0x04 0 53 0x04>; + interrupts = <31>, <53>; #clock-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt index 16a3ec433119..df9cb5ac5f72 100644 --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt @@ -32,6 +32,9 @@ Required properties: * "fsl,b4420-clockgen" * "fsl,b4860-clockgen" * "fsl,ls1021a-clockgen" + * "fsl,ls1043a-clockgen" + * "fsl,ls1046a-clockgen" + * "fsl,ls2080a-clockgen" Chassis-version clock strings include: * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt index adeca34c5a33..10a425f451fc 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt @@ -123,6 +123,9 @@ PROPERTIES EXAMPLE + +iMX6QDL/SX requires four clocks + crypto@300000 { compatible = "fsl,sec-v4.0"; fsl,sec-era = <2>; @@ -139,6 +142,23 @@ EXAMPLE clock-names = "mem", "aclk", "ipg", "emi_slow"; }; + +iMX6UL does only require three clocks + + crypto: caam@2140000 { + compatible = "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2140000 0x3c000>; + ranges = <0 0x2140000 0x3c000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&clks IMX6UL_CLK_CAAM_MEM>, + <&clks IMX6UL_CLK_CAAM_ACLK>, + <&clks IMX6UL_CLK_CAAM_IPG>; + clock-names = "mem", "aclk", "ipg"; + }; + ===================================================================== Job Ring (JR) Node diff --git a/Documentation/devicetree/bindings/dma/nbpfaxi.txt b/Documentation/devicetree/bindings/dma/nbpfaxi.txt index d5e2522b9ec1..d2e1e62e346a 100644 --- a/Documentation/devicetree/bindings/dma/nbpfaxi.txt +++ b/Documentation/devicetree/bindings/dma/nbpfaxi.txt @@ -23,6 +23,14 @@ Required properties #define NBPF_SLAVE_RQ_LEVEL 4 Optional properties: +- max-burst-mem-read: limit burst size for memory reads + (DMA_MEM_TO_MEM/DMA_MEM_TO_DEV) to this value, specified in bytes, rather + than using the maximum burst size allowed by the hardware's buffer size. +- max-burst-mem-write: limit burst size for memory writes + (DMA_DEV_TO_MEM/DMA_MEM_TO_MEM) to this value, specified in bytes, rather + than using the maximum burst size allowed by the hardware's buffer size. + If both max-burst-mem-read and max-burst-mem-write are set, DMA_MEM_TO_MEM + will use the lower value. You can use dma-channels and dma-requests as described in dma.txt, although they won't be used, this information is derived from the compatibility string. diff --git a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt index fd5618bd8fbc..55492c264d17 100644 --- a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt +++ b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt @@ -5,13 +5,13 @@ memcpy and memset capabilities. It has been designed for virtualized environments. Each HIDMA HW instance consists of multiple DMA channels. These channels -share the same bandwidth. The bandwidth utilization can be parititioned +share the same bandwidth. The bandwidth utilization can be partitioned among channels based on the priority and weight assignments. There are only two priority levels and 15 weigh assignments possible. Other parameters here determine how much of the system bus this HIDMA -instance can use like maximum read/write request and and number of bytes to +instance can use like maximum read/write request and number of bytes to read/write in a single burst. Main node required properties: @@ -47,12 +47,18 @@ When the OS is not in control of the management interface (i.e. it's a guest), the channel nodes appear on their own, not under a management node. Required properties: -- compatible: must contain "qcom,hidma-1.0" +- compatible: must contain "qcom,hidma-1.0" for initial HW or "qcom,hidma-1.1" +for MSI capable HW. - reg: Addresses for the transfer and event channel - interrupts: Should contain the event interrupt - desc-count: Number of asynchronous requests this channel can handle - iommus: required a iommu node +Optional properties for MSI: +- msi-parent : See the generic MSI binding described in + devicetree/bindings/interrupt-controller/msi.txt for a description of the + msi-parent property. + Example: Hypervisor OS configuration: diff --git a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt index 5f2ce669789a..3316a9c2e638 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt +++ b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt @@ -24,6 +24,7 @@ Required Properties: - "renesas,dmac-r8a7793" (R-Car M2-N) - "renesas,dmac-r8a7794" (R-Car E2) - "renesas,dmac-r8a7795" (R-Car H3) + - "renesas,dmac-r8a7796" (R-Car M3-W) - reg: base address and length of the registers block for the DMAC diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt b/Documentation/devicetree/bindings/dma/snps-dma.txt index 0f5583293c9c..4775c66f4508 100644 --- a/Documentation/devicetree/bindings/dma/snps-dma.txt +++ b/Documentation/devicetree/bindings/dma/snps-dma.txt @@ -27,6 +27,8 @@ Optional properties: that services interrupts for this device - is_private: The device channels should be marked as private and not for by the general purpose DMA channel allocator. False if not passed. +- multi-block: Multi block transfers supported by hardware. Array property with + one cell per channel. 0: not supported, 1 (default): supported. Example: diff --git a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt new file mode 100644 index 000000000000..e821e16ad65b --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt @@ -0,0 +1,108 @@ +NVIDIA Tegra Boot and Power Management Processor (BPMP) + +The BPMP is a specific processor in Tegra chip, which is designed for +booting process handling and offloading the power management, clock +management, and reset control tasks from the CPU. The binding document +defines the resources that would be used by the BPMP firmware driver, +which can create the interprocessor communication (IPC) between the CPU +and BPMP. + +Required properties: +- name : Should be bpmp +- compatible + Array of strings + One of: + - "nvidia,tegra186-bpmp" +- mboxes : The phandle of mailbox controller and the mailbox specifier. +- shmem : List of the phandle of the TX and RX shared memory area that + the IPC between CPU and BPMP is based on. +- #clock-cells : Should be 1. +- #power-domain-cells : Should be 1. +- #reset-cells : Should be 1. + +This node is a mailbox consumer. See the following files for details of +the mailbox subsystem, and the specifiers implemented by the relevant +provider(s): + +- .../mailbox/mailbox.txt +- .../mailbox/nvidia,tegra186-hsp.txt + +This node is a clock, power domain, and reset provider. See the following +files for general documentation of those features, and the specifiers +implemented by this node: + +- .../clock/clock-bindings.txt +- <dt-bindings/clock/tegra186-clock.h> +- ../power/power_domain.txt +- <dt-bindings/power/tegra186-powergate.h> +- .../reset/reset.txt +- <dt-bindings/reset/tegra186-reset.h> + +The BPMP implements some services which must be represented by separate nodes. +For example, it can provide access to certain I2C controllers, and the I2C +bindings represent each I2C controller as a device tree node. Such nodes should +be nested directly inside the main BPMP node. + +Software can determine whether a child node of the BPMP node represents a device +by checking for a compatible property. Any node with a compatible property +represents a device that can be instantiated. Nodes without a compatible +property may be used to provide configuration information regarding the BPMP +itself, although no such configuration nodes are currently defined by this +binding. + +The BPMP firmware defines no single global name-/numbering-space for such +services. Put another way, the numbering scheme for I2C buses is distinct from +the numbering scheme for any other service the BPMP may provide (e.g. a future +hypothetical SPI bus service). As such, child device nodes will have no reg +property, and the BPMP node will have no #address-cells or #size-cells property. + +The shared memory bindings for BPMP +----------------------------------- + +The shared memory area for the IPC TX and RX between CPU and BPMP are +predefined and work on top of sysram, which is an SRAM inside the chip. + +See ".../sram/sram.txt" for the bindings. + +Example: + +hsp_top0: hsp@03c00000 { + ... + #mbox-cells = <2>; +}; + +sysram@30000000 { + compatible = "nvidia,tegra186-sysram", "mmio-sram"; + reg = <0x0 0x30000000 0x0 0x50000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0x0 0x0 0x30000000 0x0 0x50000>; + + cpu_bpmp_tx: shmem@4e000 { + compatible = "nvidia,tegra186-bpmp-shmem"; + reg = <0x0 0x4e000 0x0 0x1000>; + label = "cpu-bpmp-tx"; + pool; + }; + + cpu_bpmp_rx: shmem@4f000 { + compatible = "nvidia,tegra186-bpmp-shmem"; + reg = <0x0 0x4f000 0x0 0x1000>; + label = "cpu-bpmp-rx"; + pool; + }; +}; + +bpmp { + compatible = "nvidia,tegra186-bpmp"; + mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_BPMP>; + shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>; + #clock-cells = <1>; + #power-domain-cells = <1>; + #reset-cells = <1>; + + i2c { + compatible = "..."; + ... + }; +}; diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt index 3b4436e56865..20f26fbce875 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -10,8 +10,10 @@ Required properties: * "qcom,scm-apq8064" for APQ8064 platforms * "qcom,scm-msm8660" for MSM8660 platforms * "qcom,scm-msm8690" for MSM8690 platforms + * "qcom,scm-msm8996" for MSM8996 platforms * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc) - clocks: One to three clocks may be required based on compatible. + * No clock required for "qcom,scm-msm8996" * Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960" * Core, iface, and bus clocks required for "qcom,scm" - clock-names: Must contain "core" for the core clock, "iface" for the interface diff --git a/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt new file mode 100644 index 000000000000..817a8d4bf903 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt @@ -0,0 +1,16 @@ +Altera FPGA To SDRAM Bridge Driver + +Required properties: +- compatible : Should contain "altr,socfpga-fpga2sdram-bridge" + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup + 1 if driver should enable bridge at startup + Default is to leave bridge in current state. + +Example: + fpga_bridge3: fpga-bridge@ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + bridge-enable = <0>; + }; diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt new file mode 100644 index 000000000000..f8e288c71b2d --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt @@ -0,0 +1,23 @@ +Altera Freeze Bridge Controller Driver + +The Altera Freeze Bridge Controller manages one or more freeze bridges. +The controller can freeze/disable the bridges which prevents signal +changes from passing through the bridge. The controller can also +unfreeze/enable the bridges which allows traffic to pass through the +bridge normally. + +Required properties: +- compatible : Should contain "altr,freeze-bridge-controller" +- regs : base address and size for freeze bridge module + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup + 1 if driver should enable bridge at startup + Default is to leave bridge in current state. + +Example: + freeze-controller@100000450 { + compatible = "altr,freeze-bridge-controller"; + regs = <0x1000 0x10>; + bridge-enable = <0>; + }; diff --git a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt new file mode 100644 index 000000000000..6406f9337eeb --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt @@ -0,0 +1,39 @@ +Altera FPGA/HPS Bridge Driver + +Required properties: +- regs : base address and size for AXI bridge module +- compatible : Should contain one of: + "altr,socfpga-lwhps2fpga-bridge", + "altr,socfpga-hps2fpga-bridge", or + "altr,socfpga-fpga2hps-bridge" +- resets : Phandle and reset specifier for this bridge's reset +- clocks : Clocks used by this module. + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup. + 1 if driver should enable bridge at startup. + Default is to leave bridge in its current state. + +Example: + fpga_bridge0: fpga-bridge@ff400000 { + compatible = "altr,socfpga-lwhps2fpga-bridge"; + reg = <0xff400000 0x100000>; + resets = <&rst LWHPS2FPGA_RESET>; + clocks = <&l4_main_clk>; + bridge-enable = <0>; + }; + + fpga_bridge1: fpga-bridge@ff500000 { + compatible = "altr,socfpga-hps2fpga-bridge"; + reg = <0xff500000 0x10000>; + resets = <&rst HPS2FPGA_RESET>; + clocks = <&l4_main_clk>; + bridge-enable = <1>; + }; + + fpga_bridge2: fpga-bridge@ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + }; diff --git a/Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt new file mode 100644 index 000000000000..2fd8e7a84734 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt @@ -0,0 +1,19 @@ +Altera SOCFPGA Arria10 FPGA Manager + +Required properties: +- compatible : should contain "altr,socfpga-a10-fpga-mgr" +- reg : base address and size for memory mapped io. + - The first index is for FPGA manager register access. + - The second index is for writing FPGA configuration data. +- resets : Phandle and reset specifier for the device's reset. +- clocks : Clocks used by the device. + +Example: + + fpga_mgr: fpga-mgr@ffd03000 { + compatible = "altr,socfpga-a10-fpga-mgr"; + reg = <0xffd03000 0x100 + 0xffcfe400 0x20>; + clocks = <&l4_mp_clk>; + resets = <&rst FPGAMGR_RESET>; + }; diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt index c3d016532d8e..30fd2201b3d4 100644 --- a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt +++ b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt @@ -17,7 +17,9 @@ Required properties: - #interrupt-cells: Specifies the number of cells needed to encode an interrupt source. - gpio-controller : Marks the device node as a gpio controller. -- #gpio-cells : Should be one. It is the pin number. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify flags. See gpio.txt for possible + values. Example for a MMP platform: @@ -27,7 +29,7 @@ Example for a MMP platform: interrupts = <49>; interrupt-names = "gpio_mux"; gpio-controller; - #gpio-cells = <1>; + #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt new file mode 100644 index 000000000000..70c054a9a997 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt @@ -0,0 +1,20 @@ +* Freescale Low Power Inter IC (LPI2C) for i.MX + +Required properties: +- compatible : + - "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc + - "fsl,imx8dv-lpi2c" for LPI2C compatible with the one integrated on i.MX8DV soc +- reg : address and length of the lpi2c master registers +- interrupt-parent : core interrupt controller +- interrupts : lpi2c interrupt +- clocks : lpi2c clock specifier + +Examples: + +lpi2c7: lpi2c7@40A50000 { + compatible = "fsl,imx8dv-lpi2c"; + reg = <0x40A50000 0x10000>; + interrupt-parent = <&intc>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX7ULP_CLK_LPI2C7>; +}; diff --git a/Documentation/devicetree/bindings/i2c/i2c-pxa.txt b/Documentation/devicetree/bindings/i2c/i2c-pxa.txt index 12b78ac507e9..d30f0b11d853 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-pxa.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-pxa.txt @@ -7,6 +7,7 @@ Required properties : compatible processor, e.g. pxa168, pxa910, mmp2, mmp3. For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required as shown in the example below. + For the Armada 3700, the compatible should be "marvell,armada-3700-i2c". Recommended properties : diff --git a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt index 239632a0d709..2b8bd33dbf8d 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt @@ -1,17 +1,25 @@ I2C for R-Car platforms Required properties: -- compatible: Must be one of - "renesas,i2c-rcar" - "renesas,i2c-r8a7778" - "renesas,i2c-r8a7779" - "renesas,i2c-r8a7790" - "renesas,i2c-r8a7791" - "renesas,i2c-r8a7792" - "renesas,i2c-r8a7793" - "renesas,i2c-r8a7794" - "renesas,i2c-r8a7795" - "renesas,i2c-r8a7796" +- compatible: + "renesas,i2c-r8a7778" if the device is a part of a R8A7778 SoC. + "renesas,i2c-r8a7779" if the device is a part of a R8A7779 SoC. + "renesas,i2c-r8a7790" if the device is a part of a R8A7790 SoC. + "renesas,i2c-r8a7791" if the device is a part of a R8A7791 SoC. + "renesas,i2c-r8a7792" if the device is a part of a R8A7792 SoC. + "renesas,i2c-r8a7793" if the device is a part of a R8A7793 SoC. + "renesas,i2c-r8a7794" if the device is a part of a R8A7794 SoC. + "renesas,i2c-r8a7795" if the device is a part of a R8A7795 SoC. + "renesas,i2c-r8a7796" if the device is a part of a R8A7796 SoC. + "renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device. + "renesas,rcar-gen2-i2c" for a generic R-Car Gen2 compatible device. + "renesas,rcar-gen3-i2c" for a generic R-Car Gen3 compatible device. + "renesas,i2c-rcar" (deprecated) + + When compatible with the generic version, nodes must list the + SoC-specific version corresponding to the platform first followed + by the generic version. + - reg: physical base address of the controller and length of memory mapped region. - interrupts: interrupt specifier. @@ -33,7 +41,7 @@ Examples : i2c0: i2c@e6508000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,i2c-r8a7791"; + compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; reg = <0 0xe6508000 0 0x40>; interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R8A7791_CLK_I2C0>; diff --git a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt index 214f94c25d37..7716acc55dec 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt @@ -1,8 +1,7 @@ Device tree configuration for Renesas IIC (sh_mobile) driver Required properties: -- compatible : "renesas,iic-<soctype>". "renesas,rmobile-iic" as fallback - Examples with soctypes are: +- compatible : - "renesas,iic-r8a73a4" (R-Mobile APE6) - "renesas,iic-r8a7740" (R-Mobile A1) - "renesas,iic-r8a7790" (R-Car H2) @@ -12,6 +11,17 @@ Required properties: - "renesas,iic-r8a7794" (R-Car E2) - "renesas,iic-r8a7795" (R-Car H3) - "renesas,iic-sh73a0" (SH-Mobile AG5) + - "renesas,rcar-gen2-iic" (generic R-Car Gen2 compatible device) + - "renesas,rcar-gen3-iic" (generic R-Car Gen3 compatible device) + - "renesas,rmobile-iic" (generic device) + + When compatible with a generic R-Car version, nodes + must list the SoC-specific version corresponding to + the platform first followed by the generic R-Car + version. + + renesas,rmobile-iic must always follow. + - reg : address start and address range size of device - interrupts : interrupt of device - clocks : clock for device @@ -31,7 +41,8 @@ Pinctrl properties might be needed, too. See there. Example: iic0: i2c@e6500000 { - compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", + "renesas,rmobile-iic"; reg = <0 0xe6500000 0 0x425>; interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7790_CLK_IIC0>; diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt b/Documentation/devicetree/bindings/i2c/trivial-devices.txt index df720ca00fcf..cdd7b48826c3 100644 --- a/Documentation/devicetree/bindings/i2c/trivial-devices.txt +++ b/Documentation/devicetree/bindings/i2c/trivial-devices.txt @@ -138,6 +138,8 @@ nuvoton,npct501 i2c trusted platform module (TPM) nuvoton,npct601 i2c trusted platform module (TPM2) nxp,pca9556 Octal SMBus and I2C registered interface nxp,pca9557 8-bit I2C-bus and SMBus I/O port with reset +nxp,pcf2127 Real-time clock +nxp,pcf2129 Real-time clock nxp,pcf8563 Real-time clock/calendar nxp,pcf85063 Tiny Real-Time Clock oki,ml86v7667 OKI ML86V7667 video decoder @@ -167,4 +169,5 @@ ti,tsc2003 I2C Touch-Screen Controller ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface ti,tmp103 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface ti,tmp275 Digital Temperature Sensor +winbond,w83793 Winbond/Nuvoton H/W Monitor winbond,wpct301 i2c trusted platform module (TPM) diff --git a/Documentation/devicetree/bindings/input/da9062-onkey.txt b/Documentation/devicetree/bindings/input/da9062-onkey.txt index ab0e0488fe92..5f9fbc68e58a 100644 --- a/Documentation/devicetree/bindings/input/da9062-onkey.txt +++ b/Documentation/devicetree/bindings/input/da9062-onkey.txt @@ -1,32 +1,47 @@ -* Dialog DA9062/63 OnKey Module +* Dialog DA9061/62/63 OnKey Module -This module is part of the DA9062/DA9063. For more details about entire -chips see Documentation/devicetree/bindings/mfd/da9062.txt and -Documentation/devicetree/bindings/mfd/da9063.txt +This module is part of the DA9061/DA9062/DA9063. For more details about entire +DA9062 and DA9061 chips see Documentation/devicetree/bindings/mfd/da9062.txt +For DA9063 see Documentation/devicetree/bindings/mfd/da9063.txt -This module provides KEY_POWER, KEY_SLEEP and events. +This module provides the KEY_POWER event. Required properties: -- compatible: should be one of: - dlg,da9062-onkey - dlg,da9063-onkey +- compatible: should be one of the following valid compatible string lines: + "dlg,da9061-onkey", "dlg,da9062-onkey" + "dlg,da9062-onkey" + "dlg,da9063-onkey" Optional properties: - - dlg,disable-key-power : Disable power-down using a long key-press. If this +- dlg,disable-key-power : Disable power-down using a long key-press. If this entry exists the OnKey driver will remove support for the KEY_POWER key - press. If this entry does not exist then by default the key-press - triggered power down is enabled and the OnKey will support both KEY_POWER - and KEY_SLEEP. + press when triggered using a long press of the OnKey. -Example: - - pmic0: da9062@58 { +Example: DA9063 + pmic0: da9063@58 { onkey { compatible = "dlg,da9063-onkey"; dlg,disable-key-power; }; + }; + +Example: DA9062 + + pmic0: da9062@58 { + onkey { + compatible = "dlg,da9062-onkey"; + dlg,disable-key-power; + }; + }; + +Example: DA9061 using a fall-back compatible for the DA9062 onkey driver + pmic0: da9061@58 { + onkey { + compatible = "dlg,da9061-onkey", "dlg,da9062-onkey"; + dlg,disable-key-power; + }; }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt b/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt index 853dff96dd9f..d4927c202aef 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt @@ -17,6 +17,8 @@ Optional properties: This value depends on the touch screen. - pre-charge-time: the touch screen need some time to precharge. This value depends on the touch screen. +- touchscreen-average-samples: Number of data samples which are averaged for + each read. Valid values are 1, 4, 8, 16 and 32. Example: tsc: tsc@02040000 { @@ -32,5 +34,6 @@ Example: xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time = <0xfff>; pre-charge-time = <0xffff>; + touchscreen-average-samples = <32>; status = "okay"; }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt b/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt index 820fee4b77b6..ce85ee508238 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt @@ -18,6 +18,8 @@ Optional properties: - touchscreen-inverted-y : See touchscreen.txt - touchscreen-swapped-x-y : See touchscreen.txt - silead,max-fingers : maximum number of fingers the touchscreen can detect +- vddio-supply : regulator phandle for controller VDDIO +- avdd-supply : regulator phandle for controller AVDD Example: diff --git a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt index bccaa4e73045..537643e86f61 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt @@ -14,6 +14,9 @@ Optional properties for Touchscreens: - touchscreen-fuzz-pressure : pressure noise value of the absolute input device (arbitrary range dependent on the controller) + - touchscreen-average-samples : Number of data samples which are averaged + for each read (valid values dependent on the + controller) - touchscreen-inverted-x : X axis is inverted (boolean) - touchscreen-inverted-y : Y axis is inverted (boolean) - touchscreen-swapped-x-y : X and Y axis are swapped (boolean) diff --git a/Documentation/devicetree/bindings/input/tps65218-pwrbutton.txt b/Documentation/devicetree/bindings/input/tps65218-pwrbutton.txt index 3e5b9793341f..8682ab6d4a50 100644 --- a/Documentation/devicetree/bindings/input/tps65218-pwrbutton.txt +++ b/Documentation/devicetree/bindings/input/tps65218-pwrbutton.txt @@ -8,8 +8,9 @@ This driver provides a simple power button event via an Interrupt. Required properties: - compatible: should be "ti,tps65217-pwrbutton" or "ti,tps65218-pwrbutton" -Required properties for TPS65218: +Required properties: - interrupts: should be one of the following + - <2>: For controllers compatible with tps65217 - <3 IRQ_TYPE_EDGE_BOTH>: For controllers compatible with tps65218 Examples: @@ -17,6 +18,7 @@ Examples: &tps { tps65217-pwrbutton { compatible = "ti,tps65217-pwrbutton"; + interrupts = <2>; }; }; diff --git a/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt index e893615ef635..b48d7d30012c 100644 --- a/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt +++ b/Documentation/devicetree/bindings/mailbox/brcm,bcm2835-mbox.txt @@ -12,7 +12,7 @@ Required properties: Example: -mailbox: mailbox@7e00b800 { +mailbox: mailbox@7e00b880 { compatible = "brcm,bcm2835-mbox"; reg = <0x7e00b880 0x40>; interrupts = <0 1>; diff --git a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt new file mode 100644 index 000000000000..b99d25fc2f26 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt @@ -0,0 +1,52 @@ +NVIDIA Tegra Hardware Synchronization Primitives (HSP) + +The HSP modules are used for the processors to share resources and communicate +together. It provides a set of hardware synchronization primitives for +interprocessor communication. So the interprocessor communication (IPC) +protocols can use hardware synchronization primitives, when operating between +two processors not in an SMP relationship. + +The features that HSP supported are shared mailboxes, shared semaphores, +arbitrated semaphores and doorbells. + +Required properties: +- name : Should be hsp +- compatible + Array of strings. + one of: + - "nvidia,tegra186-hsp" +- reg : Offset and length of the register set for the device. +- interrupt-names + Array of strings. + Contains a list of names for the interrupts described by the interrupt + property. May contain the following entries, in any order: + - "doorbell" + Users of this binding MUST look up entries in the interrupt property + by name, using this interrupt-names property to do so. +- interrupts + Array of interrupt specifiers. + Must contain one entry per entry in the interrupt-names property, + in a matching order. +- #mbox-cells : Should be 2. + +The mbox specifier of the "mboxes" property in the client node should +contain two data. The first one should be the HSP type and the second +one should be the ID that the client is going to use. Those information +can be found in the following file. + +- <dt-bindings/mailbox/tegra186-hsp.h>. + +Example: + +hsp_top0: hsp@3c00000 { + compatible = "nvidia,tegra186-hsp"; + reg = <0x0 0x03c00000 0x0 0xa0000>; + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "doorbell"; + #mbox-cells = <2>; +}; + +client { + ... + mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_XXX>; +}; diff --git a/Documentation/devicetree/bindings/media/exynos5-gsc.txt b/Documentation/devicetree/bindings/media/exynos5-gsc.txt index 5fe9372abb37..26ca25b6d264 100644 --- a/Documentation/devicetree/bindings/media/exynos5-gsc.txt +++ b/Documentation/devicetree/bindings/media/exynos5-gsc.txt @@ -3,7 +3,8 @@ G-Scaler is used for scaling and color space conversion on EXYNOS5 SoCs. Required properties: -- compatible: should be "samsung,exynos5-gsc" +- compatible: should be "samsung,exynos5-gsc" (for Exynos 5250, 5420 and + 5422 SoCs) or "samsung,exynos5433-gsc" (Exynos 5433) - reg: should contain G-Scaler physical address location and length. - interrupts: should contain G-Scaler interrupt number diff --git a/Documentation/devicetree/bindings/media/hix5hd2-ir.txt b/Documentation/devicetree/bindings/media/hix5hd2-ir.txt index fb5e7606643a..54e1bede6244 100644 --- a/Documentation/devicetree/bindings/media/hix5hd2-ir.txt +++ b/Documentation/devicetree/bindings/media/hix5hd2-ir.txt @@ -8,10 +8,11 @@ Required properties: the device. The interrupt specifier format depends on the interrupt controller parent. - clocks: clock phandle and specifier pair. - - hisilicon,power-syscon: phandle of syscon used to control power. Optional properties: - linux,rc-map-name : Remote control map name. + - hisilicon,power-syscon: DEPRECATED. Don't use this in new dts files. + Provide correct clocks instead. Example node: @@ -19,7 +20,6 @@ Example node: compatible = "hisilicon,hix5hd2-ir"; reg = <0xf8001000 0x1000>; interrupts = <0 47 4>; - clocks = <&clock HIX5HD2_FIXED_24M>; - hisilicon,power-syscon = <&sysctrl>; + clocks = <&clock HIX5HD2_IR_CLOCK>; linux,rc-map-name = "rc-tivo"; }; diff --git a/Documentation/devicetree/bindings/media/i2c/adv7604.txt b/Documentation/devicetree/bindings/media/i2c/adv7604.txt index 8337f75c75da..9cbd92eb5d05 100644 --- a/Documentation/devicetree/bindings/media/i2c/adv7604.txt +++ b/Documentation/devicetree/bindings/media/i2c/adv7604.txt @@ -34,6 +34,7 @@ The digital output port node must contain at least one endpoint. Optional Properties: - reset-gpios: Reference to the GPIO connected to the device's reset pin. + - default-input: Select which input is selected after reset. Optional Endpoint Properties: @@ -47,8 +48,6 @@ Optional Endpoint Properties: If none of hsync-active, vsync-active and pclk-sample is specified the endpoint will use embedded BT.656 synchronization. - - default-input: Select which input is selected after reset. - Example: hdmi_receiver@4c { diff --git a/Documentation/devicetree/bindings/media/mediatek-mdp.txt b/Documentation/devicetree/bindings/media/mediatek-mdp.txt new file mode 100644 index 000000000000..4182063a54db --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-mdp.txt @@ -0,0 +1,109 @@ +* Mediatek Media Data Path + +Media Data Path is used for scaling and color space conversion. + +Required properties (controller (parent) node): +- compatible: "mediatek,mt8173-mdp" +- mediatek,vpu: the node of video processor unit, see + Documentation/devicetree/bindings/media/mediatek-vpu.txt for details. + +Required properties (all function blocks, child node): +- compatible: Should be one of + "mediatek,mt8173-mdp-rdma" - read DMA + "mediatek,mt8173-mdp-rsz" - resizer + "mediatek,mt8173-mdp-wdma" - write DMA + "mediatek,mt8173-mdp-wrot" - write DMA with rotation +- reg: Physical base address and length of the function block register space +- clocks: device clocks, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. +- power-domains: a phandle to the power domain, see + Documentation/devicetree/bindings/power/power_domain.txt for details. + +Required properties (DMA function blocks, child node): +- compatible: Should be one of + "mediatek,mt8173-mdp-rdma" + "mediatek,mt8173-mdp-wdma" + "mediatek,mt8173-mdp-wrot" +- iommus: should point to the respective IOMMU block with master port as + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt + for details. +- mediatek,larb: must contain the local arbiters in the current Socs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details. + +Example: +mdp { + compatible = "mediatek,mt8173-mdp"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + mediatek,vpu = <&vpu>; + + mdp_rdma0: rdma@14001000 { + compatible = "mediatek,mt8173-mdp-rdma"; + reg = <0 0x14001000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MUTEX_32K>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_RDMA0>; + mediatek,larb = <&larb0>; + }; + + mdp_rdma1: rdma@14002000 { + compatible = "mediatek,mt8173-mdp-rdma"; + reg = <0 0x14002000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RDMA1>, + <&mmsys CLK_MM_MUTEX_32K>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_RDMA1>; + mediatek,larb = <&larb4>; + }; + + mdp_rsz0: rsz@14003000 { + compatible = "mediatek,mt8173-mdp-rsz"; + reg = <0 0x14003000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ0>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + }; + + mdp_rsz1: rsz@14004000 { + compatible = "mediatek,mt8173-mdp-rsz"; + reg = <0 0x14004000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ1>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + }; + + mdp_rsz2: rsz@14005000 { + compatible = "mediatek,mt8173-mdp-rsz"; + reg = <0 0x14005000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ2>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + }; + + mdp_wdma0: wdma@14006000 { + compatible = "mediatek,mt8173-mdp-wdma"; + reg = <0 0x14006000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WDMA>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_WDMA>; + mediatek,larb = <&larb0>; + }; + + mdp_wrot0: wrot@14007000 { + compatible = "mediatek,mt8173-mdp-wrot"; + reg = <0 0x14007000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_WROT0>; + mediatek,larb = <&larb0>; + }; + + mdp_wrot1: wrot@14008000 { + compatible = "mediatek,mt8173-mdp-wrot"; + reg = <0 0x14008000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WROT1>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_WROT1>; + mediatek,larb = <&larb4>; + }; +}; diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt index 59a47a5b924b..46c15c54175d 100644 --- a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt @@ -1,25 +1,74 @@ Mediatek Video Codec Mediatek Video Codec is the video codec hw present in Mediatek SoCs which -supports high resolution encoding functionalities. +supports high resolution encoding and decoding functionalities. Required properties: - compatible : "mediatek,mt8173-vcodec-enc" for encoder + "mediatek,mt8173-vcodec-dec" for decoder. - reg : Physical base address of the video codec registers and length of memory mapped region. - interrupts : interrupt number to the cpu. - mediatek,larb : must contain the local arbiters in the current Socs. - clocks : list of clock specifiers, corresponding to entries in the clock-names property. -- clock-names: encoder must contain "venc_sel_src", "venc_sel", -- "venc_lt_sel_src", "venc_lt_sel". +- clock-names: encoder must contain "venc_sel_src", "venc_sel",, + "venc_lt_sel_src", "venc_lt_sel", decoder must contain "vcodecpll", + "univpll_d2", "clk_cci400_sel", "vdec_sel", "vdecpll", "vencpll", + "venc_lt_sel", "vdec_bus_clk_src". - iommus : should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details. - mediatek,vpu : the node of video processor unit + Example: -vcodec_enc: vcodec@0x18002000 { + +vcodec_dec: vcodec@16000000 { + compatible = "mediatek,mt8173-vcodec-dec"; + reg = <0 0x16000000 0 0x100>, /*VDEC_SYS*/ + <0 0x16020000 0 0x1000>, /*VDEC_MISC*/ + <0 0x16021000 0 0x800>, /*VDEC_LD*/ + <0 0x16021800 0 0x800>, /*VDEC_TOP*/ + <0 0x16022000 0 0x1000>, /*VDEC_CM*/ + <0 0x16023000 0 0x1000>, /*VDEC_AD*/ + <0 0x16024000 0 0x1000>, /*VDEC_AV*/ + <0 0x16025000 0 0x1000>, /*VDEC_PP*/ + <0 0x16026800 0 0x800>, /*VP8_VD*/ + <0 0x16027000 0 0x800>, /*VP6_VD*/ + <0 0x16027800 0 0x800>, /*VP8_VL*/ + <0 0x16028400 0 0x400>; /*VP9_VD*/ + interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_LOW>; + mediatek,larb = <&larb1>; + iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>, + <&iommu M4U_PORT_HW_VDEC_PP_EXT>, + <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>, + <&iommu M4U_PORT_HW_VDEC_PRED_RD_EXT>, + <&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>, + <&iommu M4U_PORT_HW_VDEC_UFO_EXT>, + <&iommu M4U_PORT_HW_VDEC_VLD_EXT>, + <&iommu M4U_PORT_HW_VDEC_VLD2_EXT>; + mediatek,vpu = <&vpu>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>; + clocks = <&apmixedsys CLK_APMIXED_VCODECPLL>, + <&topckgen CLK_TOP_UNIVPLL_D2>, + <&topckgen CLK_TOP_CCI400_SEL>, + <&topckgen CLK_TOP_VDEC_SEL>, + <&topckgen CLK_TOP_VCODECPLL>, + <&apmixedsys CLK_APMIXED_VENCPLL>, + <&topckgen CLK_TOP_VENC_LT_SEL>, + <&topckgen CLK_TOP_VCODECPLL_370P5>; + clock-names = "vcodecpll", + "univpll_d2", + "clk_cci400_sel", + "vdec_sel", + "vdecpll", + "vencpll", + "venc_lt_sel", + "vdec_bus_clk_src"; + }; + + vcodec_enc: vcodec@0x18002000 { compatible = "mediatek,mt8173-vcodec-enc"; reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/ <0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/ diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.txt b/Documentation/devicetree/bindings/media/renesas,fcp.txt index 27f9b8e459ac..3ec91803ba58 100644 --- a/Documentation/devicetree/bindings/media/renesas,fcp.txt +++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt @@ -11,15 +11,9 @@ are paired with. These DT bindings currently support the FCPV and FCPF. - compatible: Must be one or more of the following - - "renesas,r8a7795-fcpv" for R8A7795 (R-Car H3) compatible 'FCP for VSP' - - "renesas,r8a7795-fcpf" for R8A7795 (R-Car H3) compatible 'FCP for FDP' - "renesas,fcpv" for generic compatible 'FCP for VSP' - "renesas,fcpf" for generic compatible 'FCP for FDP' - When compatible with the generic version, nodes must list the - SoC-specific version corresponding to the platform first, followed by the - family-specific and/or generic versions. - - reg: the register base and size for the device registers - clocks: Reference to the functional clock @@ -32,7 +26,7 @@ Device node example ------------------- fcpvd1: fcp@fea2f000 { - compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; + compatible = "renesas,fcpv"; reg = <0 0xfea2f000 0 0x200>; clocks = <&cpg CPG_MOD 602>; power-domains = <&sysc R8A7795_PD_A3VP>; diff --git a/Documentation/devicetree/bindings/media/renesas,fdp1.txt b/Documentation/devicetree/bindings/media/renesas,fdp1.txt new file mode 100644 index 000000000000..8dd1007bb573 --- /dev/null +++ b/Documentation/devicetree/bindings/media/renesas,fdp1.txt @@ -0,0 +1,37 @@ +Renesas R-Car Fine Display Processor (FDP1) +------------------------------------------- + +The FDP1 is a de-interlacing module which converts interlaced video to +progressive video. It is capable of performing pixel format conversion between +YCbCr/YUV formats and RGB formats. Only YCbCr/YUV formats are supported as +an input to the module. + +Required properties: + + - compatible: must be "renesas,fdp1" + - reg: the register base and size for the device registers + - interrupts : interrupt specifier for the FDP1 instance + - clocks: reference to the functional clock + +Optional properties: + + - power-domains: reference to the power domain that the FDP1 belongs to, if + any. + - renesas,fcp: a phandle referencing the FCP that handles memory accesses + for the FDP1. Not needed on Gen2, mandatory on Gen3. + +Please refer to the binding documentation for the clock and/or power domain +providers for more details. + + +Device node example +------------------- + + fdp1@fe940000 { + compatible = "renesas,fdp1"; + reg = <0 0xfe940000 0 0x2400>; + interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 119>; + power-domains = <&sysc R8A7795_PD_A3VP>; + renesas,fcp = <&fcpf0>; + }; diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt index 92c94f5ecbf1..2c901286d818 100644 --- a/Documentation/devicetree/bindings/media/s5p-mfc.txt +++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt @@ -12,6 +12,7 @@ Required properties: (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC + (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC - reg : Physical base address of the IP registers and length of memory mapped region. diff --git a/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt b/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt new file mode 100644 index 000000000000..ec1dd408d573 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt @@ -0,0 +1,20 @@ +* Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory controller + +The DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs features +a set of registers which allow to tweak the controller's behavior. + +Documentation: +OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf + +Required properties: + +- compatible: "ti,da850-ddr-controller" - for da850 SoC based boards +- reg: a tuple containing the base address of the memory + controller and the size of the memory area to map + +Example for da850 shown below. + +ddrctl { + compatible = "ti,da850-ddr-controller"; + reg = <0xb0000000 0xe8>; +}; diff --git a/Documentation/devicetree/bindings/mfd/altera-a10sr.txt b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt new file mode 100644 index 000000000000..ea151f295ad7 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/altera-a10sr.txt @@ -0,0 +1,46 @@ +* Altera Arria10 Development Kit System Resource Chip + +Required parent device properties: +- compatible : "altr,a10sr" +- spi-max-frequency : Maximum SPI frequency. +- reg : The SPI Chip Select address for the Arria10 + System Resource chip +- interrupt-parent : The parent interrupt controller. +- interrupts : The interrupt line the device is connected to. +- interrupt-controller : Marks the device node as an interrupt controller. +- #interrupt-cells : The number of cells to describe an IRQ, should be 2. + The first cell is the IRQ number. + The second cell is the flags, encoded as trigger + masks from ../interrupt-controller/interrupts.txt. + +The A10SR consists of these sub-devices: + +Device Description +------ ---------- +a10sr_gpio GPIO Controller + +Arria10 GPIO +Required Properties: +- compatible : Should be "altr,a10sr-gpio" +- gpio-controller : Marks the device node as a GPIO Controller. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify flags. + See ../gpio/gpio.txt for more information. + +Example: + + resource-manager@0 { + compatible = "altr,a10sr"; + reg = <0>; + spi-max-frequency = <100000>; + interrupt-parent = <&portb>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + a10sr_gpio: gpio-controller { + compatible = "altr,a10sr-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt b/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt index 37a088f9a648..9e5eba4a4f0d 100644 --- a/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt +++ b/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt @@ -10,6 +10,7 @@ voltages and other various functionality to Qualcomm SoCs. Value type: <string> Definition: must be one of: "qcom,pm8058" + "qcom,pm8821" "qcom,pm8921" - #address-cells: diff --git a/Documentation/devicetree/bindings/mfd/rn5t618.txt b/Documentation/devicetree/bindings/mfd/rn5t618.txt index 9e6770b105c9..65c23263cc54 100644 --- a/Documentation/devicetree/bindings/mfd/rn5t618.txt +++ b/Documentation/devicetree/bindings/mfd/rn5t618.txt @@ -1,21 +1,25 @@ * Ricoh RN5T567/RN5T618 PMIC -Ricoh RN5T567/RN5T618 is a power management IC family which integrates -3 to 4 step-down DCDC converters, 7 low-dropout regulators, GPIOs and -a watchdog timer. The RN5T618 provides additionally a Li-ion battery -charger, fuel gauge and an ADC. It can be controlled through an I2C -interface. +Ricoh RN5T567/RN5T618/RC5T619 is a power management IC family which +integrates 3 to 5 step-down DCDC converters, 7 to 10 low-dropout regulators, +GPIOs, and a watchdog timer. It can be controlled through an I2C interface. +The RN5T618/RC5T619 provides additionally a Li-ion battery charger, +fuel gauge, and an ADC. +The RC5T619 additionnally includes USB charger detection and an RTC. Required properties: - compatible: must be one of "ricoh,rn5t567" "ricoh,rn5t618" + "ricoh,rc5t619" - reg: the I2C slave address of the device Sub-nodes: - regulators: the node is required if the regulator functionality is needed. The valid regulator names are: DCDC1, DCDC2, DCDC3, DCDC4 - (RN5T567), LDO1, LDO2, LDO3, LDO4, LDO5, LDORTC1 and LDORTC2. + (RN5T567/RC5T619), LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7, LDO8, + LDO9, LDO10, LDORTC1 and LDORTC2. + LDO7-10 are specific to RC5T619. The common bindings for each individual regulator can be found in: Documentation/devicetree/bindings/regulator/regulator.txt diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt index 07184e8f894e..ea9c1c9607f6 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt @@ -13,6 +13,7 @@ Required Properties: - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following, before RK3288 - "rockchip,rk3288-dw-mshc": for Rockchip RK3288 + - "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK1108 - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036 - "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368 - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399 diff --git a/Documentation/devicetree/bindings/mmc/sdhci-cadence.txt b/Documentation/devicetree/bindings/mmc/sdhci-cadence.txt index 750374fc9d94..c0f37cb41a9b 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-cadence.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-cadence.txt @@ -1,7 +1,9 @@ * Cadence SD/SDIO/eMMC Host Controller Required properties: -- compatible: should be "cdns,sd4hc". +- compatible: should be one of the following: + "cdns,sd4hc" - default of the IP + "socionext,uniphier-sd4hc" - for Socionext UniPhier SoCs - reg: offset and length of the register set for the device. - interrupts: a single interrupt specifier. - clocks: phandle to the input clock. @@ -19,7 +21,7 @@ if supported. See mmc.txt for details. Example: emmc: sdhci@5a000000 { - compatible = "cdns,sd4hc"; + compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; reg = <0x5a000000 0x400>; interrupts = <0 78 4>; clocks = <&clk 4>; diff --git a/Documentation/devicetree/bindings/mtd/oxnas-nand.txt b/Documentation/devicetree/bindings/mtd/oxnas-nand.txt new file mode 100644 index 000000000000..56d5c19da41d --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/oxnas-nand.txt @@ -0,0 +1,41 @@ +* Oxford Semiconductor OXNAS NAND Controller + +Please refer to nand.txt for generic information regarding MTD NAND bindings. + +Required properties: + - compatible: "oxsemi,ox820-nand" + - reg: Base address and length for NAND mapped memory. + +Optional Properties: + - clocks: phandle to the NAND gate clock if needed. + - resets: phandle to the NAND reset control if needed. + +Example: + +nandc: nand-controller@41000000 { + compatible = "oxsemi,ox820-nand"; + reg = <0x41000000 0x100000>; + clocks = <&stdclk CLK_820_NAND>; + resets = <&reset RESET_NAND>; + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + nand-ecc-mode = "soft"; + nand-ecc-algo = "hamming"; + + partition@0 { + label = "boot"; + reg = <0x00000000 0x00e00000>; + read-only; + }; + + partition@e00000 { + label = "ubi"; + reg = <0x00e00000 0x07200000>; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt b/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt new file mode 100644 index 000000000000..0040eb8895e0 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt @@ -0,0 +1,56 @@ +* Samsung S3C2410 and compatible NAND flash controller + +Required properties: +- compatible : The possible values are: + "samsung,s3c2410-nand" + "samsung,s3c2412-nand" + "samsung,s3c2440-nand" +- reg : register's location and length. +- #address-cells, #size-cells : see nand.txt +- clocks : phandle to the nand controller clock +- clock-names : must contain "nand" + +Optional child nodes: +Child nodes representing the available nand chips. + +Optional child properties: +- nand-ecc-mode : see nand.txt +- nand-on-flash-bbt : see nand.txt + +Each child device node may optionally contain a 'partitions' sub-node, +which further contains sub-nodes describing the flash partition mapping. +See partition.txt for more detail. + +Example: + +nand-controller@4e000000 { + compatible = "samsung,s3c2440-nand"; + reg = <0x4e000000 0x40>; + + #address-cells = <1>; + #size-cells = <0>; + + clocks = <&clocks HCLK_NAND>; + clock-names = "nand"; + + nand { + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0 0x040000>; + }; + + partition@40000 { + label = "kernel"; + reg = <0x040000 0x500000>; + }; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/mtd/tango-nand.txt b/Documentation/devicetree/bindings/mtd/tango-nand.txt new file mode 100644 index 000000000000..ad5a02f2ac8c --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/tango-nand.txt @@ -0,0 +1,38 @@ +Sigma Designs Tango4 NAND Flash Controller (NFC) + +Required properties: + +- compatible: "sigma,smp8758-nand" +- reg: address/size of nfc_reg, nfc_mem, and pbus_reg +- dmas: reference to the DMA channel used by the controller +- dma-names: "nfc_sbox" +- clocks: reference to the system clock +- #address-cells: <1> +- #size-cells: <0> + +Children nodes represent the available NAND chips. +See Documentation/devicetree/bindings/mtd/nand.txt for generic bindings. + +Example: + + nandc: nand-controller@2c000 { + compatible = "sigma,smp8758-nand"; + reg = <0x2c000 0x30 0x2d000 0x800 0x20000 0x1000>; + dmas = <&dma0 3>; + dma-names = "nfc_sbox"; + clocks = <&clkgen SYS_CLK>; + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; /* CS0 */ + nand-ecc-strength = <14>; + nand-ecc-step-size = <1024>; + }; + + nand@1 { + reg = <1>; /* CS1 */ + nand-ecc-strength = <14>; + nand-ecc-step-size = <1024>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/hisilicon-hix5hd2-gmac.txt b/Documentation/devicetree/bindings/net/hisilicon-hix5hd2-gmac.txt index 063c02da018a..eea73adc678f 100644 --- a/Documentation/devicetree/bindings/net/hisilicon-hix5hd2-gmac.txt +++ b/Documentation/devicetree/bindings/net/hisilicon-hix5hd2-gmac.txt @@ -2,11 +2,14 @@ Hisilicon hix5hd2 gmac controller Required properties: - compatible: should contain one of the following SoC strings: - * "hisilicon,hix5hd2-gemac" - * "hisilicon,hi3798cv200-gemac" + * "hisilicon,hix5hd2-gmac" + * "hisilicon,hi3798cv200-gmac" + * "hisilicon,hi3516a-gmac" and one of the following version string: - * "hisilicon,hisi-gemac-v1" - * "hisilicon,hisi-gemac-v2" + * "hisilicon,hisi-gmac-v1" + * "hisilicon,hisi-gmac-v2" + The version v1 includes SoCs hix5hd2. + The version v2 includes SoCs hi3798cv200, hi3516a. - reg: specifies base physical address(s) and size of the device registers. The first region is the MAC register base and size. The second region is external interface control register. @@ -35,7 +38,7 @@ Required properties: Example: gmac0: ethernet@f9840000 { - compatible = "hisilicon,hi3798cv200-gemac", "hisilicon,hisi-gemac-v2"; + compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2"; reg = <0xf9840000 0x1000>,<0xf984300c 0x4>; interrupts = <0 71 4>; #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/net/phy.txt b/Documentation/devicetree/bindings/net/phy.txt index 54749b60a466..ff1bc4b1bb3b 100644 --- a/Documentation/devicetree/bindings/net/phy.txt +++ b/Documentation/devicetree/bindings/net/phy.txt @@ -38,8 +38,14 @@ Optional Properties: - enet-phy-lane-swap: If set, indicates the PHY will swap the TX/RX lanes to compensate for the board being designed with the lanes swapped. -- eee-broken-modes: Bits to clear in the MDIO_AN_EEE_ADV register to - disable EEE broken modes. +- eee-broken-100tx: +- eee-broken-1000t: +- eee-broken-10gt: +- eee-broken-1000kx: +- eee-broken-10gkx4: +- eee-broken-10gkr: + Mark the corresponding energy efficient ethernet mode as broken and + request the ethernet to stop advertising it. Example: diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt index 01b88f4e0d5b..b8e48b4762b2 100644 --- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt +++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt @@ -1,10 +1,17 @@ * Broadcom iProc PCIe controller with the platform bus interface Required properties: -- compatible: Must be "brcm,iproc-pcie" for PAXB, or "brcm,iproc-pcie-paxc" - for PAXC. PAXB-based root complex is used for external endpoint devices. - PAXC-based root complex is connected to emulated endpoint devices - internal to the ASIC +- compatible: + "brcm,iproc-pcie" for the first generation of PAXB based controller, +used in SoCs including NSP, Cygnus, NS2, and Pegasus + "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based +controllers, used in Stingray + "brcm,iproc-pcie-paxc" for the first generation of PAXC based +controller, used in NS2 + "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based +controller, used in Stingray + PAXB-based root complex is used for external endpoint devices. PAXC-based +root complex is connected to emulated endpoint devices internal to the ASIC - reg: base address and length of the PCIe controller I/O register space - #interrupt-cells: set to <1> - interrupt-map-mask and interrupt-map, standard PCI properties to define the @@ -19,6 +26,10 @@ Required properties: Optional properties: - phys: phandle of the PCIe PHY device - phy-names: must be "pcie-phy" +- dma-coherent: present if DMA operations are coherent +- dma-ranges: Some PAXB-based root complexes do not have inbound mapping done + by the ASIC after power on reset. In this case, SW is required to configure +the mapping, based on inbound memory regions specified by this property. - brcm,pcie-ob: Some iProc SoCs do not have the outbound address mapping done by the ASIC after power on reset. In this case, SW needs to configure it @@ -29,11 +40,6 @@ effective: Required: - brcm,pcie-ob-axi-offset: The offset from the AXI address to the internal address used by the iProc PCIe core (not the PCIe address) -- brcm,pcie-ob-window-size: The outbound address mapping window size (in MB) - -Optional: -- brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to -increase the outbound window size MSI support (optional): @@ -41,10 +47,19 @@ For older platforms without MSI integrated in the GIC, iProc PCIe core provides an event queue based MSI support. The iProc MSI uses host memories to store MSI posted writes in the event queues -- msi-parent: Link to the device node of the MSI controller. On newer iProc -platforms, the MSI controller may be gicv2m or gicv3-its. On older iProc -platforms without MSI support in its interrupt controller, one may use the -event queue based MSI support integrated within the iProc PCIe core. +On newer iProc platforms, gicv2m or gicv3-its based MSI support should be used + +- msi-map: Maps a Requester ID to an MSI controller and associated MSI +sideband data + +- msi-parent: Link to the device node of the MSI controller, used when no MSI +sideband data is passed between the iProc PCIe controller and the MSI +controller + +Refer to the following binding documents for more detailed description on +the use of 'msi-map' and 'msi-parent': + Documentation/devicetree/bindings/pci/pci-msi.txt + Documentation/devicetree/bindings/interrupt-controller/msi.txt When the iProc event queue based MSI is used, one needs to define the following properties in the MSI device node: @@ -80,9 +95,7 @@ Example: phy-names = "pcie-phy"; brcm,pcie-ob; - brcm,pcie-ob-oarr-size; brcm,pcie-ob-axi-offset = <0x00000000>; - brcm,pcie-ob-window-size = <256>; msi-parent = <&msi0>; diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index 41e9f55a1467..ee1c72d5162e 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -15,6 +15,7 @@ Required properties: - compatible: should contain the platform identifier such as: "fsl,ls1021a-pcie", "snps,dw-pcie" "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie" + "fsl,ls1046a-pcie" - reg: base addresses and lengths of the PCIe controller - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt index b8cc395fffea..982a74ea6df9 100644 --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt @@ -110,6 +110,20 @@ Power supplies for Tegra124: - avdd-pll-erefe-supply: Power supply for PLLE (shared with USB3). Must supply 1.05 V. +Power supplies for Tegra210: +- Required: + - avdd-pll-uerefe-supply: Power supply for PLLE (shared with USB3). Must + supply 1.05 V. + - hvddio-pex-supply: High-voltage supply for PCIe I/O and PCIe output + clocks. Must supply 1.8 V. + - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V. + - dvdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must + supply 1.05 V. + - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3). + Must supply 3.3 V. + - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must + supply 1.8 V. + Root ports are defined as subnodes of the PCIe controller node. Required properties: @@ -436,3 +450,99 @@ Board DTS: status = "okay"; }; }; + +Tegra210: +--------- + +SoC DTSI: + + pcie-controller@01003000 { + compatible = "nvidia,tegra210-pcie"; + device_type = "pci"; + reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ + 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ + 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ + reg-names = "pads", "afi", "cs"; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ + interrupt-names = "intr", "msi"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + + bus-range = <0x00 0xff>; + #address-cells = <3>; + #size-cells = <2>; + + ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */ + 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */ + 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */ + 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */ + 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ + + clocks = <&tegra_car TEGRA210_CLK_PCIE>, + <&tegra_car TEGRA210_CLK_AFI>, + <&tegra_car TEGRA210_CLK_PLL_E>, + <&tegra_car TEGRA210_CLK_CML0>; + clock-names = "pex", "afi", "pll_e", "cml"; + resets = <&tegra_car 70>, + <&tegra_car 72>, + <&tegra_car 74>; + reset-names = "pex", "afi", "pcie_x"; + status = "disabled"; + + pci@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; + reg = <0x000800 0 0 0 0>; + status = "disabled"; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + nvidia,num-lanes = <4>; + }; + + pci@2,0 { + device_type = "pci"; + assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; + reg = <0x001000 0 0 0 0>; + status = "disabled"; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + nvidia,num-lanes = <1>; + }; + }; + +Board DTS: + + pcie-controller@01003000 { + status = "okay"; + + avdd-pll-uerefe-supply = <&avdd_1v05_pll>; + hvddio-pex-supply = <&vdd_1v8>; + dvddio-pex-supply = <&vdd_pex_1v05>; + dvdd-pex-pll-supply = <&vdd_pex_1v05>; + hvdd-pex-pll-e-supply = <&vdd_1v8>; + vddio-pex-ctl-supply = <&vdd_1v8>; + + pci@1,0 { + phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, + <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, + <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, + <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>; + phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3"; + status = "okay"; + }; + + pci@2,0 { + phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>; + phy-names = "pcie-0"; + status = "okay"; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt index 08dcfad09f8d..50f9e2ca5b13 100644 --- a/Documentation/devicetree/bindings/pci/pci.txt +++ b/Documentation/devicetree/bindings/pci/pci.txt @@ -18,3 +18,9 @@ driver implementation may support the following properties: host bridges in the system, otherwise potentially conflicting domain numbers may be assigned to root buses behind different host bridges. The domain number for each host bridge in the system must be unique. +- max-link-speed: + If present this property specifies PCI gen for link capability. Host + drivers could add this as a strategy to avoid unnecessary operation for + unsupported link speed, for instance, trying to do training for + unsupported link speed, etc. Must be '4' for gen4, '3' for gen3, '2' + for gen2, and '1' for gen1. Any other values are invalid. diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 4059a6f89bc1..e15f9b19901f 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -7,6 +7,7 @@ - "qcom,pcie-ipq8064" for ipq8064 - "qcom,pcie-apq8064" for apq8064 - "qcom,pcie-apq8084" for apq8084 + - "qcom,pcie-msm8996" for msm8996 or apq8096 - reg: Usage: required @@ -92,6 +93,17 @@ - "aux" Auxiliary (AUX) clock - "bus_master" Master AXI clock - "bus_slave" Slave AXI clock + +- clock-names: + Usage: required for msm8996/apq8096 + Value type: <stringlist> + Definition: Should contain the following entries + - "pipe" Pipe Clock driving internal logic + - "aux" Auxiliary (AUX) clock + - "cfg" Configuration clock + - "bus_master" Master AXI clock + - "bus_slave" Slave AXI clock + - resets: Usage: required Value type: <prop-encoded-array> @@ -115,7 +127,7 @@ - "core" Core reset - power-domains: - Usage: required for apq8084 + Usage: required for apq8084 and msm8996/apq8096 Value type: <prop-encoded-array> Definition: A phandle and power domain specifier pair to the power domain which is responsible for collapsing diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt index 6cf99690eef9..eee518db90b9 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt @@ -7,6 +7,7 @@ compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC; "renesas,pcie-r8a7793" for the R8A7793 SoC; "renesas,pcie-r8a7795" for the R8A7795 SoC; "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device. + "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device. When compatible with the generic version, nodes must list the SoC-specific version corresponding to the platform first diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt index 66dcaa9efd74..e705acd3612c 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt @@ -7,6 +7,9 @@ Required properties: - reg : offset and length of the register set for the mux registers +- #pinctrl-cells : number of cells in addition to the index, set to 1 + for pinctrl-single,pins and 2 for pinctrl-single,bits + - pinctrl-single,register-width : pinmux register access width in bits - pinctrl-single,function-mask : mask of allowed pinmux function bits diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt index 0725fb37a973..d91715bc8d52 100644 --- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt +++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt @@ -1,12 +1,14 @@ -DT bindings for the Renesas R-Car System Controller +DT bindings for the Renesas R-Car (RZ/G) System Controller == System Controller Node == -The R-Car System Controller provides power management for the CPU cores and -various coprocessors. +The R-Car (RZ/G) System Controller provides power management for the CPU cores +and various coprocessors. Required properties: - compatible: Must contain exactly one of the following: + - "renesas,r8a7743-sysc" (RZ/G1M) + - "renesas,r8a7745-sysc" (RZ/G1E) - "renesas,r8a7779-sysc" (R-Car H1) - "renesas,r8a7790-sysc" (R-Car H2) - "renesas,r8a7791-sysc" (R-Car M2-W) diff --git a/Documentation/devicetree/bindings/power/supply/tps65217_charger.txt b/Documentation/devicetree/bindings/power/supply/tps65217_charger.txt index 98d131acee95..a11072c5a866 100644 --- a/Documentation/devicetree/bindings/power/supply/tps65217_charger.txt +++ b/Documentation/devicetree/bindings/power/supply/tps65217_charger.txt @@ -2,11 +2,16 @@ TPS65217 Charger Required Properties: -compatible: "ti,tps65217-charger" +-interrupts: TPS65217 interrupt numbers for the AC and USB charger input change. + Should be <0> for the USB charger and <1> for the AC adapter. +-interrupt-names: Should be "USB" and "AC" This node is a subnode of the tps65217 PMIC. Example: tps65217-charger { - compatible = "ti,tps65090-charger"; + compatible = "ti,tps65217-charger"; + interrupts = <0>, <1>; + interrupt-names = "USB", "AC"; }; diff --git a/Documentation/devicetree/bindings/pwm/pwm-bcm2835.txt b/Documentation/devicetree/bindings/pwm/pwm-bcm2835.txt index fb6fb31bc4c4..cf573e85b11d 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-bcm2835.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-bcm2835.txt @@ -3,7 +3,7 @@ BCM2835 PWM controller (Raspberry Pi controller) Required properties: - compatible: should be "brcm,bcm2835-pwm" - reg: physical base address and length of the controller's registers -- clock: This clock defines the base clock frequency of the PWM hardware +- clocks: This clock defines the base clock frequency of the PWM hardware system, the period and the duty_cycle of the PWM signal is a multiple of the base period. - #pwm-cells: Should be 2. See pwm.txt in this directory for a description of diff --git a/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt new file mode 100644 index 000000000000..fa7849d67836 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt @@ -0,0 +1,21 @@ +Hisilicon PWM controller + +Required properties: +-compatible: should contain one SoC specific compatible string + The SoC specific strings supported including: + "hisilicon,hi3516cv300-pwm" + "hisilicon,hi3519v100-pwm" +- reg: physical base address and length of the controller's registers. +- clocks: phandle and clock specifier of the PWM reference clock. +- resets: phandle and reset specifier for the PWM controller reset. +- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of + the cells format. + +Example: + pwm: pwm@12130000 { + compatible = "hisilicon,hi3516cv300-pwm"; + reg = <0x12130000 0x10000>; + clocks = <&crg_ctrl HI3516CV300_PWM_CLK>; + resets = <&crg_ctrl 0x38 0>; + #pwm-cells = <3>; + }; diff --git a/Documentation/devicetree/bindings/regulator/tps65218.txt b/Documentation/devicetree/bindings/regulator/tps65218.txt index fccc1d24af58..02f0e9bbfbf8 100644 --- a/Documentation/devicetree/bindings/regulator/tps65218.txt +++ b/Documentation/devicetree/bindings/regulator/tps65218.txt @@ -1,23 +1,78 @@ TPS65218 family of regulators Required properties: -For tps65218 regulators/LDOs -- compatible: - - "ti,tps65218-dcdc1" for DCDC1 - - "ti,tps65218-dcdc2" for DCDC2 - - "ti,tps65218-dcdc3" for DCDC3 - - "ti,tps65218-dcdc4" for DCDC4 - - "ti,tps65218-dcdc5" for DCDC5 - - "ti,tps65218-dcdc6" for DCDC6 - - "ti,tps65218-ldo1" for LDO1 - -Optional properties: -- Any optional property defined in bindings/regulator/regulator.txt +- compatible: "ti,tps65218" +- reg: I2C slave address + +- List of regulators provided by this controller, must be named + after their hardware counterparts: dcdc[1-6] and ldo1 +- This is the list of child nodes that specify the regulator + initialization data for defined regulators. Not all regulators for the given + device need to be present. The definition for each of these nodes is defined + using the standard binding for regulators found at ./regulator.txt. + + The valid names for regulators are: + tps65217: regulator-dcdc1, regulator-dcdc2, regulator-dcdc3, regulator-dcdc4, + regulator-dcdc5, regulator-dcdc6, regulator-ldo1, regulator-ls3. + Each regulator is defined using the standard binding for regulators. Example: +tps65218: tps65218@24 { + reg = <0x24>; + compatible = "ti,tps65218"; + interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */ + interrupt-controller; + #interrupt-cells = <2>; + + dcdc1: regulator-dcdc1 { + regulator-name = "vdd_core"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <1144000>; + regulator-boot-on; + regulator-always-on; + }; + + dcdc2: regulator-dcdc2 { + regulator-name = "vdd_mpu"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <1378000>; + regulator-boot-on; + regulator-always-on; + }; + + dcdc3: regulator-dcdc3 { + regulator-name = "vdcdc3"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-boot-on; + regulator-always-on; + }; + + dcdc5: regulator-dcdc5 { + regulator-name = "v1_0bat"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-boot-on; + regulator-always-on; + }; + + dcdc6: regulator-dcdc6 { + regulator-name = "v1_8bat"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1: regulator-ldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; - xyz: regulator@0 { - compatible = "ti,tps65218-dcdc1"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; + ls3: regulator-ls3 { + regulator-min-microvolt = <100000>; + regulator-max-microvolt = <1000000>; }; +}; diff --git a/Documentation/devicetree/bindings/reset/oxnas,reset.txt b/Documentation/devicetree/bindings/reset/oxnas,reset.txt index 6f06db930030..d27ccb5d04fc 100644 --- a/Documentation/devicetree/bindings/reset/oxnas,reset.txt +++ b/Documentation/devicetree/bindings/reset/oxnas,reset.txt @@ -5,45 +5,19 @@ Please also refer to reset.txt in this directory for common reset controller binding usage. Required properties: -- compatible: Should be "oxsemi,ox810se-reset" +- compatible: For OX810SE, should be "oxsemi,ox810se-reset" + For OX820, should be "oxsemi,ox820-reset" - #reset-cells: 1, see below Parent node should have the following properties : -- compatible: Should be "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd" +- compatible: For OX810SE, should be : + "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd" + For OX820, should be : + "oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd" -For OX810SE, the indices are : - - 0 : ARM - - 1 : COPRO - - 2 : Reserved - - 3 : Reserved - - 4 : USBHS - - 5 : USBHSPHY - - 6 : MAC - - 7 : PCI - - 8 : DMA - - 9 : DPE - - 10 : DDR - - 11 : SATA - - 12 : SATA_LINK - - 13 : SATA_PHY - - 14 : Reserved - - 15 : NAND - - 16 : GPIO - - 17 : UART1 - - 18 : UART2 - - 19 : MISC - - 20 : I2S - - 21 : AHB_MON - - 22 : UART3 - - 23 : UART4 - - 24 : SGDMA - - 25 : Reserved - - 26 : Reserved - - 27 : Reserved - - 28 : Reserved - - 29 : Reserved - - 30 : Reserved - - 31 : BUS +Reset indices are in dt-bindings include files : +- For OX810SE: include/dt-bindings/reset/oxsemi,ox810se.h +- For OX820: include/dt-bindings/reset/oxsemi,ox820.h example: diff --git a/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt b/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt index 1cfd21d1dfa1..92527138bc93 100644 --- a/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt +++ b/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt @@ -16,15 +16,14 @@ Please refer to reset.txt in this directory for common reset controller binding usage. Required properties: -- compatible: Should be "st,<chip>-powerdown" - ex: "st,stih415-powerdown", "st,stih416-powerdown" +- compatible: Should be "st,stih407-powerdown" - #reset-cells: 1, see below example: powerdown: powerdown-controller { + compatible = "st,stih407-powerdown"; #reset-cells = <1>; - compatible = "st,stih415-powerdown"; }; @@ -37,11 +36,10 @@ index specifying which channel to use, as described in reset.txt example: - usb1: usb@fe200000 { - resets = <&powerdown STIH41X_USB1_POWERDOWN>; + st_dwc3: dwc3@8f94000 { + resets = <&powerdown STIH407_USB3_POWERDOWN>, }; Macro definitions for the supported reset channels can be found in: -include/dt-bindings/reset/stih415-resets.h -include/dt-bindings/reset/stih416-resets.h +include/dt-bindings/reset/stih407-resets.h diff --git a/Documentation/devicetree/bindings/reset/st,sti-softreset.txt b/Documentation/devicetree/bindings/reset/st,sti-softreset.txt index 891a2fd85ed6..a21658f18fe6 100644 --- a/Documentation/devicetree/bindings/reset/st,sti-softreset.txt +++ b/Documentation/devicetree/bindings/reset/st,sti-softreset.txt @@ -15,15 +15,14 @@ Please refer to reset.txt in this directory for common reset controller binding usage. Required properties: -- compatible: Should be "st,<chip>-softreset" example: - "st,stih415-softreset" or "st,stih416-softreset"; +- compatible: Should be st,stih407-softreset"; - #reset-cells: 1, see below example: softreset: softreset-controller { #reset-cells = <1>; - compatible = "st,stih415-softreset"; + compatible = "st,stih407-softreset"; }; @@ -42,5 +41,4 @@ example: Macro definitions for the supported reset channels can be found in: -include/dt-bindings/reset/stih415-resets.h -include/dt-bindings/reset/stih416-resets.h +include/dt-bindings/reset/stih407-resets.h diff --git a/Documentation/devicetree/bindings/rng/omap_rng.txt b/Documentation/devicetree/bindings/rng/omap_rng.txt index 6a62acd86953..471477299ece 100644 --- a/Documentation/devicetree/bindings/rng/omap_rng.txt +++ b/Documentation/devicetree/bindings/rng/omap_rng.txt @@ -1,4 +1,4 @@ -OMAP SoC HWRNG Module +OMAP SoC and Inside-Secure HWRNG Module Required properties: @@ -6,11 +6,13 @@ Required properties: RNG versions: - "ti,omap2-rng" for OMAP2. - "ti,omap4-rng" for OMAP4, OMAP5 and AM33XX. + - "inside-secure,safexcel-eip76" for SoCs with EIP76 IP block Note that these two versions are incompatible. - ti,hwmods: Name of the hwmod associated with the RNG module - reg : Offset and length of the register set for the module - interrupts : the interrupt number for the RNG module. - Only used for "ti,omap4-rng". + Used for "ti,omap4-rng" and "inside-secure,safexcel-eip76" +- clocks: the trng clock source Example: /* AM335x */ @@ -20,3 +22,11 @@ rng: rng@48310000 { reg = <0x48310000 0x2000>; interrupts = <111>; }; + +/* SafeXcel IP-76 */ +trng: rng@f2760000 { + compatible = "inside-secure,safexcel-eip76"; + reg = <0xf2760000 0x7d>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpm_syscon0 1 25>; +}; diff --git a/Documentation/devicetree/bindings/rtc/epson,rtc7301.txt b/Documentation/devicetree/bindings/rtc/epson,rtc7301.txt new file mode 100644 index 000000000000..5f9df3f1467c --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/epson,rtc7301.txt @@ -0,0 +1,16 @@ +EPSON TOYOCOM RTC-7301SF/DG + +Required properties: + +- compatible: Should be "epson,rtc7301sf" or "epson,rtc7301dg" +- reg: Specifies base physical address and size of the registers. +- interrupts: A single interrupt specifier. + +Example: + +rtc: rtc@44a00000 { + compatible = "epson,rtc7301dg"; + reg = <0x44a00000 0x10000>; + interrupt-parent = <&axi_intc_0>; + interrupts = <3 2>; +}; diff --git a/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt b/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt new file mode 100644 index 000000000000..41c7ae18fd7b --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt @@ -0,0 +1,37 @@ +JZ4740 and similar SoCs real-time clock driver + +Required properties: + +- compatible: One of: + - "ingenic,jz4740-rtc" - for use with the JZ4740 SoC + - "ingenic,jz4780-rtc" - for use with the JZ4780 SoC +- reg: Address range of rtc register set +- interrupts: IRQ number for the alarm interrupt +- clocks: phandle to the "rtc" clock +- clock-names: must be "rtc" + +Optional properties: +- system-power-controller: To use this component as the + system power controller +- reset-pin-assert-time-ms: Reset pin low-level assertion + time after wakeup (default 60ms; range 0-125ms if RTC clock + at 32 kHz) +- min-wakeup-pin-assert-time-ms: Minimum wakeup pin assertion + time (default 100ms; range 0-2s if RTC clock at 32 kHz) + +Example: + +rtc@10003000 { + compatible = "ingenic,jz4740-rtc"; + reg = <0x10003000 0x40>; + + interrupt-parent = <&intc>; + interrupts = <32>; + + clocks = <&rtc_clock>; + clock-names = "rtc"; + + system-power-controller; + reset-pin-assert-time-ms = <60>; + min-wakeup-pin-assert-time-ms = <100>; +}; diff --git a/Documentation/devicetree/bindings/rtc/twl-rtc.txt b/Documentation/devicetree/bindings/rtc/twl-rtc.txt index 596e0c97be7a..8f9a94f2f896 100644 --- a/Documentation/devicetree/bindings/rtc/twl-rtc.txt +++ b/Documentation/devicetree/bindings/rtc/twl-rtc.txt @@ -1,12 +1,11 @@ -* TI twl RTC - -The TWL family (twl4030/6030) contains a RTC. +* Texas Instruments TWL4030/6030 RTC Required properties: -- compatible : Should be twl4030-rtc - -Examples: - -rtc@0 { - compatible = "ti,twl4030-rtc"; -}; +- compatible : Should be "ti,twl4030-rtc" +- interrupts : Should be the interrupt number. + +Example: + rtc { + compatible = "ti,twl4030-rtc"; + interrupts = <11>; + }; diff --git a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt index bf2411f366e5..2a42a323fa1a 100644 --- a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt +++ b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt @@ -6,6 +6,7 @@ Main node required properties: - compatible : value should be as follows: (a) "hisilicon,hip05-sas-v1" for v1 hw in hip05 chipset (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset + (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset - sas-addr : array of 8 bytes for host SAS address - reg : Address and length of the SAS register - hisilicon,sas-syscon: phandle of syscon used for sas control diff --git a/Documentation/devicetree/bindings/security/tpm/ibmvtpm.txt b/Documentation/devicetree/bindings/security/tpm/ibmvtpm.txt new file mode 100644 index 000000000000..d89f99971368 --- /dev/null +++ b/Documentation/devicetree/bindings/security/tpm/ibmvtpm.txt @@ -0,0 +1,41 @@ +* Device Tree Bindings for IBM Virtual Trusted Platform Module(vtpm) + +Required properties: + +- compatible : property name that conveys the platform architecture + identifiers, as 'IBM,vtpm' +- device_type : specifies type of virtual device +- interrupts : property specifying the interrupt source number and + sense code associated with this virtual I/O Adapters +- ibm,my-drc-index : integer index for the connector between the device + and its parent - present only if Dynamic + Reconfiguration(DR) Connector is enabled +- ibm,#dma-address-cells: specifies the number of cells that are used to + encode the physical address field of dma-window + properties +- ibm,#dma-size-cells : specifies the number of cells that are used to + encode the size field of dma-window properties +- ibm,my-dma-window : specifies DMA window associated with this virtual + IOA +- ibm,loc-code : specifies the unique and persistent location code + associated with this virtual I/O Adapters +- linux,sml-base : 64-bit base address of the reserved memory allocated + for the firmware event log +- linux,sml-size : size of the memory allocated for the firmware event log + +Example (IBM Virtual Trusted Platform Module) +--------------------------------------------- + + vtpm@30000003 { + ibm,#dma-size-cells = <0x2>; + compatible = "IBM,vtpm"; + device_type = "IBM,vtpm"; + ibm,my-drc-index = <0x30000003>; + ibm,#dma-address-cells = <0x2>; + linux,sml-base = <0xc60e 0x0>; + interrupts = <0xa0003 0x0>; + ibm,my-dma-window = <0x10000003 0x0 0x0 0x0 0x10000000>; + ibm,loc-code = "U8286.41A.10082DV-V3-C3"; + reg = <0x30000003>; + linux,sml-size = <0xbce10200>; + }; diff --git a/Documentation/devicetree/bindings/security/tpm/tpm-i2c.txt b/Documentation/devicetree/bindings/security/tpm/tpm-i2c.txt new file mode 100644 index 000000000000..8cb638b7e89c --- /dev/null +++ b/Documentation/devicetree/bindings/security/tpm/tpm-i2c.txt @@ -0,0 +1,21 @@ +* Device Tree Bindings for I2C based Trusted Platform Module(TPM) + +Required properties: + +- compatible : 'manufacturer,model', eg. nuvoton,npct650 +- label : human readable string describing the device, eg. "tpm" +- linux,sml-base : 64-bit base address of the reserved memory allocated for + the firmware event log +- linux,sml-size : size of the memory allocated for the firmware event log + +Example (for OpenPower Systems with Nuvoton TPM 2.0 on I2C) +---------------------------------------------------------- + +tpm@57 { + reg = <0x57>; + label = "tpm"; + compatible = "nuvoton,npct650", "nuvoton,npct601"; + linux,sml-base = <0x7f 0xfd450000>; + linux,sml-size = <0x10000>; + status = "okay"; +}; diff --git a/Documentation/devicetree/bindings/security/tpm/tpm_tis_mmio.txt b/Documentation/devicetree/bindings/security/tpm/tpm_tis_mmio.txt new file mode 100644 index 000000000000..41d740545189 --- /dev/null +++ b/Documentation/devicetree/bindings/security/tpm/tpm_tis_mmio.txt @@ -0,0 +1,25 @@ +Trusted Computing Group MMIO Trusted Platform Module + +The TCG defines multi vendor standard for accessing a TPM chip, this +is the standard protocol defined to access the TPM via MMIO. Typically +this interface will be implemented over Intel's LPC bus. + +Refer to the 'TCG PC Client Specific TPM Interface Specification (TIS)' TCG +publication for the specification. + +Required properties: + +- compatible: should contain a string below for the chip, followed by + "tcg,tpm-tis-mmio". Valid chip strings are: + * "atmel,at97sc3204" +- reg: The location of the MMIO registers, should be at least 0x5000 bytes +- interrupt-parent/interrupts: An optional interrupt indicating command completion. + +Example: + + tpm_tis@90000 { + compatible = "atmel,at97sc3204", "tcg,tpm-tis-mmio"; + reg = <0x90000 0x5000>; + interrupt-parent = <&EIC0>; + interrupts = <1 2>; + }; diff --git a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt index 845850caf088..c93a2d1c1a65 100644 --- a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt +++ b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt @@ -10,7 +10,7 @@ Required properties: See ../reset/reset.txt for details. - reset-names : Must include the following entries: - serial -- dmas : Must contain an entry for each entry in clock-names. +- dmas : Must contain an entry for each entry in dma-names. See ../dma/dma.txt for details. - dma-names : Must include the following entries: - rx diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt index e8f15e34027f..16fe94d7783c 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt @@ -9,17 +9,20 @@ domain control. The driver implements the Generic PM domain bindings described in power/power_domain.txt. It provides the power domains defined in -include/dt-bindings/power/mt8173-power.h. +include/dt-bindings/power/mt8173-power.h and mt2701-power.h. Required properties: -- compatible: Must be "mediatek,mt8173-scpsys" +- compatible: Should be one of: + - "mediatek,mt2701-scpsys" + - "mediatek,mt8173-scpsys" - #power-domain-cells: Must be 1 - reg: Address range of the SCPSYS unit - infracfg: must contain a phandle to the infracfg controller - clock, clock-names: clocks according to the common clock binding. - The clocks needed "mm", "mfg", "venc" and "venc_lt". - These are the clocks which hardware needs to be enabled - before enabling certain power domains. + These are clocks which hardware needs to be + enabled before enabling certain power domains. + Required clocks for MT2701: "mm", "mfg", "ethif" + Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt" Optional properties: - vdec-supply: Power supply for the vdec power domain diff --git a/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt b/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt new file mode 100644 index 000000000000..5b9b38f578bb --- /dev/null +++ b/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt @@ -0,0 +1,88 @@ +Devicetree bindings for the Axentia TSE-850 audio complex + +Required properties: + - compatible: "axentia,tse850-pcm5142" + - axentia,ssc-controller: The phandle of the atmel SSC controller used as + cpu dai. + - axentia,audio-codec: The phandle of the PCM5142 codec. + - axentia,add-gpios: gpio specifier that controls the mixer. + - axentia,loop1-gpios: gpio specifier that controls loop relays on channel 1. + - axentia,loop2-gpios: gpio specifier that controls loop relays on channel 2. + - axentia,ana-supply: Regulator that supplies the output amplifier. Must + support voltages in the 2V - 20V range, in 1V steps. + +The schematics explaining the gpios are as follows: + + loop1 relays + IN1 +---o +------------+ o---+ OUT1 + \ / + + + + | / | + +--o +--. | + | add | | + | V | + | .---. | + DAC +----------->|Sum|---+ + | '---' | + | | + + + + + IN2 +---o--+------------+--o---+ OUT2 + loop2 relays + +The 'loop1' gpio pin controlls two relays, which are either in loop position, +meaning that input and output are directly connected, or they are in mixer +position, meaning that the signal is passed through the 'Sum' mixer. Similarly +for 'loop2'. + +In the above, the 'loop1' relays are inactive, thus feeding IN1 to the mixer +(if 'add' is active) and feeding the mixer output to OUT1. The 'loop2' relays +are active, short-cutting the TSE-850 from channel 2. IN1, IN2, OUT1 and OUT2 +are TSE-850 connectors and DAC is the PCB name of the (filtered) output from +the PCM5142 codec. + +Example: + + &i2c { + codec: pcm5142@4c { + compatible = "ti,pcm5142"; + + reg = <0x4c>; + + AVDD-supply = <®_3v3>; + DVDD-supply = <®_3v3>; + CPVDD-supply = <®_3v3>; + + clocks = <&sck>; + + pll-in = <3>; + pll-out = <6>; + }; + }; + + ana: ana-reg { + compatible = "pwm-regulator"; + + regulator-name = "ANA"; + + pwms = <&pwm0 2 1000 PWM_POLARITY_INVERTED>; + pwm-dutycycle-unit = <1000>; + pwm-dutycycle-range = <100 1000>; + + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <20000000>; + regulator-ramp-delay = <1000>; + }; + + sound { + compatible = "axentia,tse850-pcm5142"; + + axentia,ssc-controller = <&ssc0>; + axentia,audio-codec = <&codec>; + + axentia,add-gpios = <&pioA 8 GPIO_ACTIVE_LOW>; + axentia,loop1-gpios = <&pioA 10 GPIO_ACTIVE_LOW>; + axentia,loop2-gpios = <&pioA 11 GPIO_ACTIVE_LOW>; + + axentia,ana-supply = <&ana>; + }; diff --git a/Documentation/devicetree/bindings/sound/cs35l34.txt b/Documentation/devicetree/bindings/sound/cs35l34.txt new file mode 100644 index 000000000000..b218ead2e68e --- /dev/null +++ b/Documentation/devicetree/bindings/sound/cs35l34.txt @@ -0,0 +1,64 @@ +CS35L34 Speaker Amplifier + +Required properties: + + - compatible : "cirrus,cs35l34" + + - reg : the I2C address of the device for I2C. + + - VA-supply, VP-supply : power supplies for the device, + as covered in + Documentation/devicetree/bindings/regulator/regulator.txt. + + - cirrus,boost-vtge-millivolt : Boost Voltage Value. Configures the boost + converter's output voltage in mV. The range is from VP to 8V with + increments of 100mV. + + - cirrus,boost-nanohenry: Inductor value for boost converter. The value is + in nH and they can be values of 1000nH, 1100nH, 1200nH, 1500nH, and 2200nH. + +Optional properties: + + - reset-gpios: GPIO used to reset the amplifier. + + - interrupt-parent : Specifies the phandle of the interrupt controller to + which the IRQs from CS35L34 are delivered to. + - interrupts : IRQ line info CS35L34. + (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt + for further information relating to interrupt properties) + + - cirrus,boost-peak-milliamp : Boost converter peak current limit in mA. The + range starts at 1200mA and goes to a maximum of 3840mA with increments of + 80mA. The default value is 2480mA. + + - cirrus,i2s-sdinloc : ADSP SDIN I2S channel location. Indicates whether the + received mono data is in the left or right portion of the I2S frame + according to the AD0 pin or directly via this configuration. + 0x0 (Default) = Selected by AD0 input (if AD0 = LOW, use left channel), + 0x2 = Left, + 0x1 = Selected by the inversion of the AD0 input (if AD0 = LOW, use right + channel), + 0x3 = Right. + + - cirrus,gain-zc-disable: Boolean property. If set, the gain change will take + effect without waiting for a zero cross. + + - cirrus,tdm-rising-edge: Boolean property. If set, data is on the rising edge of + SCLK. Otherwise, data is on the falling edge of SCLK. + + +Example: + +cs35l34: cs35l34@40 { + compatible = "cirrus,cs35l34"; + reg = <0x40>; + + interrupt-parent = <&gpio8>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + + reset-gpios = <&gpio 10 0>; + + cirrus,boost-vtge-milltvolt = <8000>; /* 8V */ + cirrus,boost-ind-nanohenry = <1000>; /* 1uH */ + cirrus,boost-peak-milliamp = <3000>; /* 3A */ +}; diff --git a/Documentation/devicetree/bindings/sound/cs42l42.txt b/Documentation/devicetree/bindings/sound/cs42l42.txt new file mode 100644 index 000000000000..9a2c5e2423d5 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/cs42l42.txt @@ -0,0 +1,110 @@ +CS42L42 audio CODEC + +Required properties: + + - compatible : "cirrus,cs42l42" + + - reg : the I2C address of the device for I2C. + + - VP-supply, VCP-supply, VD_FILT-supply, VL-supply, VA-supply : + power supplies for the device, as covered in + Documentation/devicetree/bindings/regulator/regulator.txt. + +Optional properties: + + - reset-gpios : a GPIO spec for the reset pin. If specified, it will be + deasserted before communication to the codec starts. + + - interrupt-parent : Specifies the phandle of the interrupt controller to + which the IRQs from CS42L42 are delivered to. + + - interrupts : IRQ line info CS42L42. + (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt + for further information relating to interrupt properties) + + - cirrus,ts-inv : Boolean property. For jacks that invert the tip sense + polarity. Normal jacks will short tip sense pin to HS1 when headphones are + plugged in and leave tip sense floating when not plugged in. Inverting jacks + short tip sense when unplugged and float when plugged in. + + 0 = (Default) Non-inverted + 1 = Inverted + + - cirrus,ts-dbnc-rise : Debounce the rising edge of TIP_SENSE_PLUG. With no + debounce, the tip sense pin might be noisy on a plug event. + + 0 - 0ms, + 1 - 125ms, + 2 - 250ms, + 3 - 500ms, + 4 - 750ms, + 5 - (Default) 1s, + 6 - 1.25s, + 7 - 1.5s, + + - cirrus,ts-dbnc-fall : Debounce the falling edge of TIP_SENSE_UNPLUG. + With no debounce, the tip sense pin might be noisy on an unplug event. + + 0 - 0ms, + 1 - 125ms, + 2 - 250ms, + 3 - 500ms, + 4 - 750ms, + 5 - (Default) 1s, + 6 - 1.25s, + 7 - 1.5s, + + - cirrus,btn-det-init-dbnce : This sets how long the driver sleeps after + enabling button detection interrupts. After auto-detection and before + servicing button interrupts, the HS bias needs time to settle. If you + don't wait, there is possibility for erroneous button interrupt. + + 0ms - 200ms, + Default = 100ms + + - cirrus,btn-det-event-dbnce : This sets how long the driver delays after + receiving a button press interrupt. With level detect interrupts, you want + to wait a small amount of time to make sure the button press is making a + clean connection with the bias resistors. + + 0ms - 20ms, + Default = 10ms + + - cirrus,bias-lvls : For a level-detect headset button scheme, each button + will bias the mic pin to a certain voltage. To determine which button was + pressed, the driver will compare this biased voltage to sequential, + decreasing voltages and will stop when a comparator is tripped, + indicating a comparator voltage < bias voltage. This value represents a + percentage of the internally generated HS bias voltage. For different + hardware setups, a designer might want to tweak this. This is an array of + descending values for the comparator voltage. + + Array of 4 values + Each 0-63 + < x1 x2 x3 x4 > + Default = < 15 8 4 1> + + +Example: + +cs42l42: cs42l42@48 { + compatible = "cirrus,cs42l42"; + reg = <0x48>; + VA-supply = <&dummy_vreg>; + VP-supply = <&dummy_vreg>; + VCP-supply = <&dummy_vreg>; + VD_FILT-supply = <&dummy_vreg>; + VL-supply = <&dummy_vreg>; + + reset-gpios = <&axi_gpio_0 1 0>; + interrupt-parent = <&gpio0>; + interrupts = <55 8> + + cirrus,ts-inv = <0x00>; + cirrus,ts-dbnc-rise = <0x05>; + cirrus,ts-dbnc-fall = <0x00>; + cirrus,btn-det-init-dbnce = <100>; + cirrus,btn-det-event-dbnce = <10>; + cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>; + cirrus,hs-bias-ramp-rate = <0x02>; +};
\ No newline at end of file diff --git a/Documentation/devicetree/bindings/sound/davinci-mcbsp.txt b/Documentation/devicetree/bindings/sound/davinci-mcbsp.txt index 55b53e1fd72c..e0b6165c9cfc 100644 --- a/Documentation/devicetree/bindings/sound/davinci-mcbsp.txt +++ b/Documentation/devicetree/bindings/sound/davinci-mcbsp.txt @@ -43,7 +43,7 @@ mcbsp0: mcbsp@1d10000 { <0x00310000 0x1000>; reg-names = "mpu", "dat"; interrupts = <97 98>; - interrupts-names = "rx", "tx"; + interrupt-names = "rx", "tx"; dmas = <&edma0 3 1 &edma0 2 1>; dma-names = "tx", "rx"; diff --git a/Documentation/devicetree/bindings/sound/qcom,apq8016-sbc.txt b/Documentation/devicetree/bindings/sound/qcom,apq8016-sbc.txt index d9d8635ff94c..6a4aadc4ce06 100644 --- a/Documentation/devicetree/bindings/sound/qcom,apq8016-sbc.txt +++ b/Documentation/devicetree/bindings/sound/qcom,apq8016-sbc.txt @@ -44,8 +44,7 @@ Required dai-link subnodes: Required CPU/CODEC subnodes properties: -link-name : Name of the dai link. --sound-dai : phandle and port of CPU/CODEC --capture-dai : phandle and port of CPU/CODEC +-sound-dai : phandle/s and port of CPU/CODEC Example: @@ -73,7 +72,7 @@ sound: sound { sound-dai = <&lpass MI2S_PRIMARY>; }; codec { - sound-dai = <&wcd_codec 0>; + sound-dai = <&lpass_codec 0>, <&wcd_codec 0>; }; }; diff --git a/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-analog.txt b/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-analog.txt new file mode 100644 index 000000000000..ccb401cfef9d --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-analog.txt @@ -0,0 +1,85 @@ +msm8916 analog audio CODEC + +Bindings for codec Analog IP which is integrated in pmic pm8916, + +## Bindings for codec core on pmic: + +Required properties + - compatible = "qcom,pm8916-wcd-analog-codec"; + - reg: represents the slave base address provided to the peripheral. + - interrupt-parent : The parent interrupt controller. + - interrupts: List of interrupts in given SPMI peripheral. + - interrupt-names: Names specified to above list of interrupts in same + order. List of supported interrupt names are: + "cdc_spk_cnp_int" - Speaker click and pop interrupt. + "cdc_spk_clip_int" - Speaker clip interrupt. + "cdc_spk_ocp_int" - Speaker over current protect interrupt. + "mbhc_ins_rem_det1" - jack insert removal detect interrupt 1. + "mbhc_but_rel_det" - button release interrupt. + "mbhc_but_press_det" - button press event + "mbhc_ins_rem_det" - jack insert removal detect interrupt. + "mbhc_switch_int" - multi button headset interrupt. + "cdc_ear_ocp_int" - Earphone over current protect interrupt. + "cdc_hphr_ocp_int" - Headphone R over current protect interrupt. + "cdc_hphl_ocp_det" - Headphone L over current protect interrupt. + "cdc_ear_cnp_int" - earphone cnp interrupt. + "cdc_hphr_cnp_int" - hphr click and pop interrupt. + "cdc_hphl_cnp_int" - hphl click and pop interrupt. + + - clocks: Handle to mclk. + - clock-names: should be "mclk" + - vdd-cdc-io-supply: phandle to VDD_CDC_IO regulator DT node. + - vdd-cdc-tx-rx-cx-supply: phandle to VDD_CDC_TX/RX/CX regulator DT node. + - vdd-micbias-supply: phandle of VDD_MICBIAS supply's regulator DT node. + +Optional Properties: +- qcom,micbias1-ext-cap: boolean, present if micbias1 has external capacitor + connected. +- qcom,micbias2-ext-cap: boolean, present if micbias2 has external capacitor + connected. + +Example: + +spmi_bus { + ... + audio-codec@f000{ + compatible = "qcom,pm8916-wcd-analog-codec"; + reg = <0xf000 0x200>; + reg-names = "pmic-codec-core"; + clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>; + clock-names = "mclk"; + interrupt-parent = <&spmi_bus>; + interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>, + <0x1 0xf0 0x1 IRQ_TYPE_NONE>, + <0x1 0xf0 0x2 IRQ_TYPE_NONE>, + <0x1 0xf0 0x3 IRQ_TYPE_NONE>, + <0x1 0xf0 0x4 IRQ_TYPE_NONE>, + <0x1 0xf0 0x5 IRQ_TYPE_NONE>, + <0x1 0xf0 0x6 IRQ_TYPE_NONE>, + <0x1 0xf0 0x7 IRQ_TYPE_NONE>, + <0x1 0xf1 0x0 IRQ_TYPE_NONE>, + <0x1 0xf1 0x1 IRQ_TYPE_NONE>, + <0x1 0xf1 0x2 IRQ_TYPE_NONE>, + <0x1 0xf1 0x3 IRQ_TYPE_NONE>, + <0x1 0xf1 0x4 IRQ_TYPE_NONE>, + <0x1 0xf1 0x5 IRQ_TYPE_NONE>; + interrupt-names = "cdc_spk_cnp_int", + "cdc_spk_clip_int", + "cdc_spk_ocp_int", + "mbhc_ins_rem_det1", + "mbhc_but_rel_det", + "mbhc_but_press_det", + "mbhc_ins_rem_det", + "mbhc_switch_int", + "cdc_ear_ocp_int", + "cdc_hphr_ocp_int", + "cdc_hphl_ocp_det", + "cdc_ear_cnp_int", + "cdc_hphr_cnp_int", + "cdc_hphl_cnp_int"; + VDD-CDC-IO-supply = <&pm8916_l5>; + VDD-CDC-TX-RX-CX-supply = <&pm8916_l5>; + VDD-MICBIAS-supply = <&pm8916_l13>; + #sound-dai-cells = <1>; + }; +}; diff --git a/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-digital.txt b/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-digital.txt new file mode 100644 index 000000000000..1c8e4cb25176 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-digital.txt @@ -0,0 +1,20 @@ +msm8916 digital audio CODEC + +## Bindings for codec core in lpass: + +Required properties + - compatible = "qcom,msm8916-wcd-digital-codec"; + - reg: address space for lpass codec. + - clocks: Handle to mclk and ahbclk + - clock-names: should be "mclk", "ahbix-clk". + +Example: + +audio-codec@771c000{ + compatible = "qcom,msm8916-wcd-digital-codec"; + reg = <0x0771c000 0x400>; + clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>, + <&gcc GCC_CODEC_DIGCODEC_CLK>; + clock-names = "ahbix-clk", "mclk"; + #sound-dai-cells = <1>; +}; diff --git a/Documentation/devicetree/bindings/sound/rt5514.txt b/Documentation/devicetree/bindings/sound/rt5514.txt index 9cabfc18cb57..929ca6756b02 100644 --- a/Documentation/devicetree/bindings/sound/rt5514.txt +++ b/Documentation/devicetree/bindings/sound/rt5514.txt @@ -13,6 +13,9 @@ Optional properties: - clocks: The phandle of the master clock to the CODEC - clock-names: Should be "mclk" +- realtek,dmic-init-delay-ms + Set the DMIC initial delay (ms) to wait it ready. + Pins on the device (for linking into audio routes) for RT5514: * DMIC1L diff --git a/Documentation/devicetree/bindings/sound/rt5663.txt b/Documentation/devicetree/bindings/sound/rt5663.txt index 7d3c974c6e2e..70eaeaed2b18 100644 --- a/Documentation/devicetree/bindings/sound/rt5663.txt +++ b/Documentation/devicetree/bindings/sound/rt5663.txt @@ -1,10 +1,10 @@ -RT5663/RT5668 audio CODEC +RT5663 audio CODEC This device supports I2C only. Required properties: -- compatible : One of "realtek,rt5663" or "realtek,rt5668". +- compatible : "realtek,rt5663". - reg : The I2C address of the device. @@ -12,7 +12,7 @@ Required properties: Optional properties: -Pins on the device (for linking into audio routes) for RT5663/RT5668: +Pins on the device (for linking into audio routes) for RT5663: * IN1P * IN1N diff --git a/Documentation/devicetree/bindings/sound/rt5665.txt b/Documentation/devicetree/bindings/sound/rt5665.txt new file mode 100755 index 000000000000..419c89219681 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rt5665.txt @@ -0,0 +1,68 @@ +RT5665/RT5666/RT5668 audio CODEC + +This device supports I2C only. + +Required properties: + +- compatible : One of "realtek,rt5665", "realtek,rt5666" or "realtek,rt5668". + +- reg : The I2C address of the device. + +- interrupts : The CODEC's interrupt output. + +Optional properties: + +- realtek,in1-differential +- realtek,in2-differential +- realtek,in3-differential +- realtek,in4-differential + Boolean. Indicate MIC1/2/3/4 input are differential, rather than single-ended. + +- realtek,dmic1-data-pin + 0: dmic1 is not used + 1: using GPIO4 pin as dmic1 data pin + 2: using IN2N pin as dmic2 data pin + +- realtek,dmic2-data-pin + 0: dmic2 is not used + 1: using GPIO5 pin as dmic2 data pin + 2: using IN2P pin as dmic2 data pin + +- realtek,jd-src + 0: No JD is used + 1: using JD1 as JD source + +- realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. + +Pins on the device (for linking into audio routes) for RT5659/RT5658: + + * DMIC L1 + * DMIC R1 + * DMIC L2 + * DMIC R2 + * IN1P + * IN1N + * IN2P + * IN2N + * IN3P + * IN3N + * IN4P + * IN4N + * HPOL + * HPOR + * LOUTL + * LOUTR + * MONOOUT + * PDML + * PDMR + +Example: + +rt5659 { + compatible = "realtek,rt5665"; + reg = <0x1b>; + interrupt-parent = <&gpio>; + interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>; + realtek,ldo1-en-gpios = + <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; +}; diff --git a/Documentation/devicetree/bindings/sound/samsung,tm2-audio.txt b/Documentation/devicetree/bindings/sound/samsung,tm2-audio.txt new file mode 100644 index 000000000000..94442e5673b3 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung,tm2-audio.txt @@ -0,0 +1,38 @@ +Samsung Exynos5433 TM2(E) audio complex with WM5110 codec + +Required properties: + + - compatible : "samsung,tm2-audio" + - model : the user-visible name of this sound complex + - audio-codec : the phandle of the wm5110 audio codec node, + as described in ../mfd/arizona.txt + - i2s-controller : the phandle of the I2S controller + - audio-amplifier : the phandle of the MAX98504 amplifier + - samsung,audio-routing : a list of the connections between audio components; + each entry is a pair of strings, the first being the + connection's sink, the second being the connection's + source; valid names for sources and sinks are the + WM5110's and MAX98504's pins and the jacks on the + board: HP, SPK, Main Mic, Sub Mic, Third Mic, + Headset Mic + - mic-bias-gpios : GPIO pin that enables the Main Mic bias regulator + + +Example: + +sound { + compatible = "samsung,tm2-audio"; + audio-codec = <&wm5110>; + i2s-controller = <&i2s0>; + audio-amplifier = <&max98504>; + mic-bias-gpios = <&gpr3 2 0>; + model = "wm5110"; + samsung,audio-routing = + "HP", "HPOUT1L", + "HP", "HPOUT1R", + "SPK", "SPKOUT", + "SPKOUT", "HPOUT2L", + "SPKOUT", "HPOUT2R", + "Main Mic", "MICBIAS2", + "IN1R", "Main Mic"; +}; diff --git a/Documentation/devicetree/bindings/sound/sun4i-codec.txt b/Documentation/devicetree/bindings/sound/sun4i-codec.txt index 0dce690f78f5..3033bd8aab0f 100644 --- a/Documentation/devicetree/bindings/sound/sun4i-codec.txt +++ b/Documentation/devicetree/bindings/sound/sun4i-codec.txt @@ -1,8 +1,12 @@ * Allwinner A10 Codec Required properties: -- compatible: must be either "allwinner,sun4i-a10-codec" or - "allwinner,sun7i-a20-codec" +- compatible: must be one of the following compatibles: + - "allwinner,sun4i-a10-codec" + - "allwinner,sun6i-a31-codec" + - "allwinner,sun7i-a20-codec" + - "allwinner,sun8i-a23-codec" + - "allwinner,sun8i-h3-codec" - reg: must contain the registers location and length - interrupts: must contain the codec interrupt - dmas: DMA channels for tx and rx dma. See the DMA client binding, @@ -17,6 +21,43 @@ Required properties: Optional properties: - allwinner,pa-gpios: gpio to enable external amplifier +Required properties for the following compatibles: + - "allwinner,sun6i-a31-codec" + - "allwinner,sun8i-a23-codec" + - "allwinner,sun8i-h3-codec" +- resets: phandle to the reset control for this device +- allwinner,audio-routing: A list of the connections between audio components. + Each entry is a pair of strings, the first being the + connection's sink, the second being the connection's + source. Valid names include: + + Audio pins on the SoC: + "HP" + "HPCOM" + "LINEIN" + "LINEOUT" (not on sun8i-a23) + "MIC1" + "MIC2" + "MIC3" (sun6i-a31 only) + + Microphone biases from the SoC: + "HBIAS" + "MBIAS" + + Board connectors: + "Headphone" + "Headset Mic" + "Line In" + "Line Out" + "Mic" + "Speaker" + +Required properties for the following compatibles: + - "allwinner,sun8i-a23-codec" + - "allwinner,sun8i-h3-codec" +- allwinner,codec-analog-controls: A phandle to the codec analog controls + block in the PRCM. + Example: codec: codec@01c22c00 { #sound-dai-cells = <0>; @@ -28,3 +69,23 @@ codec: codec@01c22c00 { dmas = <&dma 0 19>, <&dma 0 19>; dma-names = "rx", "tx"; }; + +codec: codec@01c22c00 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun6i-a31-codec"; + reg = <0x01c22c00 0x98>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_APB1_CODEC>, <&ccu CLK_CODEC>; + clock-names = "apb", "codec"; + resets = <&ccu RST_APB1_CODEC>; + dmas = <&dma 15>, <&dma 15>; + dma-names = "rx", "tx"; + allwinner,audio-routing = + "Headphone", "HP", + "Speaker", "LINEOUT", + "LINEIN", "Line In", + "MIC1", "MBIAS", + "MIC1", "Mic", + "MIC2", "HBIAS", + "MIC2", "Headset Mic"; +}; diff --git a/Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt b/Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt new file mode 100644 index 000000000000..779b735781ba --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt @@ -0,0 +1,16 @@ +* Allwinner Codec Analog Controls + +Required properties: +- compatible: must be one of the following compatibles: + - "allwinner,sun8i-a23-codec-analog" + - "allwinner,sun8i-h3-codec-analog" + +Required properties if not a sub-node of the PRCM node: +- reg: must contain the registers location and length + +Example: +prcm: prcm@01f01400 { + codec_analog: codec-analog { + compatible = "allwinner,sun8i-a23-codec-analog"; + }; +}; diff --git a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt index 9340d2ddcc54..6fbba562eaa7 100644 --- a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt +++ b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt @@ -12,6 +12,7 @@ Required properties: "ti,tlv320aic3120" - TLV320AIC3120 (mono speaker amp, MiniDSP) "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP) "ti,tlv320dac3100" - TLV320DAC3100 (no ADC, mono speaker amp, no MiniDSP) + "ti,tlv320dac3101" - TLV320DAC3101 (no ADC, stereo speaker amp, no MiniDSP) - reg - <int> - I2C slave address - HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply, diff --git a/Documentation/devicetree/bindings/sound/wm8580.txt b/Documentation/devicetree/bindings/sound/wm8580.txt index 7d9821f348da..78fce9b14954 100644 --- a/Documentation/devicetree/bindings/sound/wm8580.txt +++ b/Documentation/devicetree/bindings/sound/wm8580.txt @@ -1,10 +1,10 @@ -WM8580 audio CODEC +WM8580 and WM8581 audio CODEC This device supports I2C only. Required properties: - - compatible : "wlf,wm8580" + - compatible : "wlf,wm8580", "wlf,wm8581" - reg : the I2C address of the device. diff --git a/Documentation/devicetree/bindings/sram/sram.txt b/Documentation/devicetree/bindings/sram/sram.txt index add48f09015e..068c2c03c38f 100644 --- a/Documentation/devicetree/bindings/sram/sram.txt +++ b/Documentation/devicetree/bindings/sram/sram.txt @@ -4,7 +4,7 @@ Simple IO memory regions to be managed by the genalloc API. Required properties: -- compatible : mmio-sram +- compatible : mmio-sram or atmel,sama5d2-securam - reg : SRAM iomem address range diff --git a/Documentation/devicetree/bindings/thermal/brcm,bcm2835-thermal.txt b/Documentation/devicetree/bindings/thermal/brcm,bcm2835-thermal.txt new file mode 100644 index 000000000000..474531d2b2c5 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/brcm,bcm2835-thermal.txt @@ -0,0 +1,17 @@ +Binding for Thermal Sensor driver for BCM2835 SoCs. + +Required parameters: +------------------- + +compatible: should be one of: "brcm,bcm2835-thermal", + "brcm,bcm2836-thermal" or "brcm,bcm2837-thermal" +reg: Address range of the thermal registers. +clocks: Phandle of the clock used by the thermal sensor. + +Example: + +thermal: thermal@7e212000 { + compatible = "brcm,bcm2835-thermal"; + reg = <0x7e212000 0x8>; + clocks = <&clocks BCM2835_CLOCK_TSENS>; +}; diff --git a/Documentation/devicetree/bindings/thermal/st-thermal.txt b/Documentation/devicetree/bindings/thermal/st-thermal.txt index 3b9251b4a145..a2f939137e35 100644 --- a/Documentation/devicetree/bindings/thermal/st-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/st-thermal.txt @@ -3,17 +3,8 @@ Binding for Thermal Sensor driver for STMicroelectronics STi series of SoCs. Required parameters: ------------------- -compatible : st,<SoC>-<module>-thermal; should be one of: - "st,stih415-sas-thermal", - "st,stih415-mpe-thermal", - "st,stih416-sas-thermal" - "st,stih416-mpe-thermal" - "st,stid127-thermal" or - "st,stih407-thermal" - according to the SoC type (stih415, stih416, stid127, stih407) - and module type (sas or mpe). On stid127 & stih407 there is only - one die/module, so there is no module type in the compatible - string. +compatible : Should be "st,stih407-thermal" + clock-names : Should be "thermal". See: Documentation/devicetree/bindings/resource-names.txt clocks : Phandle of the clock used by the thermal sensor. @@ -25,18 +16,17 @@ Optional parameters: reg : For non-sysconf based sensors, this should be the physical base address and length of the sensor's registers. interrupts : Standard way to define interrupt number. - Interrupt is mandatory to be defined when compatible is - "stih416-mpe-thermal". NB: For thermal sensor's for which no interrupt has been defined, a polling delay of 1000ms will be used to read the temperature from device. Example: - temp1@fdfe8000 { - compatible = "st,stih416-mpe-thermal"; - reg = <0xfdfe8000 0x10>; - clock-names = "thermal"; - clocks = <&clk_m_mpethsens>; - interrupts = <GIC_SPI 23 IRQ_TYPE_NONE>; + temp0@91a0000 { + compatible = "st,stih407-thermal"; + reg = <0x91a0000 0x28>; + clock-names = "thermal"; + clocks = <&CLK_SYSIN>; + interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>; + st,passive_cooling_temp = <110>; }; diff --git a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt new file mode 100644 index 000000000000..e3cfce8fecc5 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt @@ -0,0 +1,17 @@ +NPS Network Processor + +Required properties: + +- compatible : should be "ezchip,nps400-timer0" + +Clocks required for compatible = "ezchip,nps400-timer0": +- interrupts : The interrupt of the first timer +- clocks : Must contain a single entry describing the clock input + +Example: + +timer { + compatible = "ezchip,nps400-timer0"; + interrupts = <3>; + clocks = <&sysclk>; +}; diff --git a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer.txt b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt index c8c03d700382..c0ab4190b8fb 100644 --- a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer.txt +++ b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt @@ -2,14 +2,14 @@ NPS Network Processor Required properties: -- compatible : should be "ezchip,nps400-timer" +- compatible : should be "ezchip,nps400-timer1" -Clocks required for compatible = "ezchip,nps400-timer": +Clocks required for compatible = "ezchip,nps400-timer1": - clocks : Must contain a single entry describing the clock input Example: timer { - compatible = "ezchip,nps400-timer"; + compatible = "ezchip,nps400-timer1"; clocks = <&sysclk>; }; diff --git a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt index 070baf4d7d97..b6b5130e5f65 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt +++ b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt @@ -7,8 +7,11 @@ To bind UFS PHY with UFS host controller, the controller node should contain a phandle reference to UFS PHY node. Required properties: -- compatible : compatible list, contains "qcom,ufs-phy-qmp-20nm" - or "qcom,ufs-phy-qmp-14nm" according to the relevant phy in use. +- compatible : compatible list, contains one of the following - + "qcom,ufs-phy-qmp-20nm" for 20nm ufs phy, + "qcom,ufs-phy-qmp-14nm" for legacy 14nm ufs phy, + "qcom,msm8996-ufs-phy-qmp-14nm" for 14nm ufs phy + present on MSM8996 chipset. - reg : should contain PHY register address space (mandatory), - reg-names : indicates various resources passed to driver (via reg proptery) by name. Required "reg-names" is "phy_mem". diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt b/Documentation/devicetree/bindings/usb/atmel-usb.txt index f4262ed60582..ad8ea56a9ed3 100644 --- a/Documentation/devicetree/bindings/usb/atmel-usb.txt +++ b/Documentation/devicetree/bindings/usb/atmel-usb.txt @@ -6,9 +6,9 @@ Required properties: - compatible: Should be "atmel,at91rm9200-ohci" for USB controllers used in host mode. - reg: Address and length of the register set for the device - - interrupts: Should contain ehci interrupt + - interrupts: Should contain ohci interrupt - clocks: Should reference the peripheral, host and system clocks - - clock-names: Should contains two strings + - clock-names: Should contain three strings "ohci_clk" for the peripheral clock "hclk" for the host clock "uhpck" for the system clock @@ -35,7 +35,7 @@ Required properties: - reg: Address and length of the register set for the device - interrupts: Should contain ehci interrupt - clocks: Should reference the peripheral and the UTMI clocks - - clock-names: Should contains two strings + - clock-names: Should contain two strings "ehci_clk" for the peripheral clock "usb_clk" for the UTMI clock @@ -58,7 +58,7 @@ Required properties: - reg: Address and length of the register set for the device - interrupts: Should contain macb interrupt - clocks: Should reference the peripheral and the AHB clocks - - clock-names: Should contains two strings + - clock-names: Should contain two strings "pclk" for the peripheral clock "hclk" for the AHB clock @@ -85,7 +85,7 @@ Required properties: - reg: Address and length of the register set for the device - interrupts: Should contain usba interrupt - clocks: Should reference the peripheral and host clocks - - clock-names: Should contains two strings + - clock-names: Should contain two strings "pclk" for the peripheral clock "hclk" for the host clock - ep childnode: To specify the number of endpoints and their properties. diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 98371753a08f..16d3b5e7f5d1 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -24,9 +24,11 @@ ampire Ampire Co., Ltd. ams AMS AG amstaos AMS-Taos Inc. analogix Analogix Semiconductor, Inc. +andestech Andes Technology Corporation apm Applied Micro Circuits Corporation (APM) aptina Aptina Imaging arasan Arasan Chip Systems +aries Aries Embedded GmbH arm ARM Ltd. armadeus ARMadeus Systems SARL arrow Arrow Electronics @@ -68,6 +70,7 @@ creative Creative Technology Ltd crystalfontz Crystalfontz America, Inc. cubietech Cubietech, Ltd. cypress Cypress Semiconductor Corporation +cznic CZ.NIC, z.s.p.o. dallas Maxim Integrated Products (formerly Dallas Semiconductor) davicom DAVICOM Semiconductor, Inc. delta Delta Electronics, Inc. @@ -137,6 +140,7 @@ infineon Infineon Technologies inforce Inforce Computing ingenic Ingenic Semiconductor innolux Innolux Corporation +inside-secure INSIDE Secure intel Intel Corporation intercontrol Inter Control Group invensense InvenSense Inc. @@ -160,6 +164,7 @@ lg LG Corporation linux Linux-specific binding lltc Linear Technology Corporation lsi LSI Corp. (LSI Logic) +macnica Macnica Americas marvell Marvell Technology Group Ltd. maxim Maxim Integrated Products mcube mCube @@ -185,20 +190,24 @@ mti Imagination Technologies Ltd. (formerly MIPS Technologies Inc.) mundoreader Mundo Reader S.L. murata Murata Manufacturing Co., Ltd. mxicy Macronix International Co., Ltd. +myir MYIR Tech Limited national National Semiconductor nec NEC LCD Technologies, Ltd. neonode Neonode Inc. netgear NETGEAR netlogic Broadcom Corporation (formerly NetLogic Microsystems) netxeon Shenzhen Netxeon Technology CO., LTD +nexbox Nexbox newhaven Newhaven Display International -nvd New Vision Display +ni National Instruments nintendo Nintendo nokia Nokia nuvoton Nuvoton Technology Corporation +nvd New Vision Display nvidia NVIDIA nxp NXP Semiconductors okaya Okaya Electric America, Inc. +oki Oki Electric Industry Co., Ltd. olimex OLIMEX Ltd. onion Onion Corporation onnn ON Semiconductor Corp. @@ -214,6 +223,7 @@ parade Parade Technologies Inc. pericom Pericom Technology Inc. phytec PHYTEC Messtechnik GmbH picochip Picochip Ltd +pine64 Pine64 pixcir PIXCIR MICROELECTRONICS Co., Ltd plathome Plat'Home Co., Ltd. plda PLDA @@ -235,8 +245,10 @@ realtek Realtek Semiconductor Corp. renesas Renesas Electronics Corporation richtek Richtek Technology Corporation ricoh Ricoh Co. Ltd. +rikomagic Rikomagic Tech Corp. Ltd rockchip Fuzhou Rockchip Electronics Co., Ltd samsung Samsung Semiconductor +samtec Samtec/Softing company sandisk Sandisk Corporation sbs Smart Battery System schindler Schindler @@ -281,6 +293,7 @@ tcg Trusted Computing Group tcl Toby Churchill Ltd. technexion TechNexion technologic Technologic Systems +terasic Terasic Inc. thine THine Electronics, Inc. ti Texas Instruments tlm Trusted Logic Mobility @@ -295,6 +308,7 @@ tronfy Tronfy tronsmart Tronsmart truly Truly Semiconductors Limited tyan Tyan Computer Corporation +udoo Udoo uniwest United Western Technologies Corp (UniWest) upisemi uPI Semiconductor Corp. urt United Radiant Technology Corporation diff --git a/Documentation/dmaengine/client.txt b/Documentation/dmaengine/client.txt index 9e33189745f0..c72b4563de10 100644 --- a/Documentation/dmaengine/client.txt +++ b/Documentation/dmaengine/client.txt @@ -37,8 +37,8 @@ The slave DMA usage consists of following steps: 2. Set slave and controller specific parameters Next step is always to pass some specific information to the DMA - driver. Most of the generic information which a slave DMA can use - is in struct dma_slave_config. This allows the clients to specify + driver. Most of the generic information which a slave DMA can use + is in struct dma_slave_config. This allows the clients to specify DMA direction, DMA addresses, bus widths, DMA burst lengths etc for the peripheral. @@ -52,7 +52,7 @@ The slave DMA usage consists of following steps: struct dma_slave_config *config) Please see the dma_slave_config structure definition in dmaengine.h - for a detailed explanation of the struct members. Please note + for a detailed explanation of the struct members. Please note that the 'direction' member will be going away as it duplicates the direction given in the prepare call. @@ -101,7 +101,7 @@ The slave DMA usage consists of following steps: desc = dmaengine_prep_slave_sg(chan, sgl, nr_sg, direction, flags); Once a descriptor has been obtained, the callback information can be - added and the descriptor must then be submitted. Some DMA engine + added and the descriptor must then be submitted. Some DMA engine drivers may hold a spinlock between a successful preparation and submission so it is important that these two operations are closely paired. @@ -138,7 +138,7 @@ The slave DMA usage consists of following steps: activity via other DMA engine calls not covered in this document. dmaengine_submit() will not start the DMA operation, it merely adds - it to the pending queue. For this, see step 5, dma_async_issue_pending. + it to the pending queue. For this, see step 5, dma_async_issue_pending. 5. Issue pending DMA requests and wait for callback notification @@ -184,13 +184,13 @@ Further APIs: 3. int dmaengine_resume(struct dma_chan *chan) - Resume a previously paused DMA channel. It is invalid to resume a + Resume a previously paused DMA channel. It is invalid to resume a channel which is not currently paused. 4. enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) - This can be used to check the status of the channel. Please see + This can be used to check the status of the channel. Please see the documentation in include/linux/dmaengine.h for a more complete description of this API. @@ -200,7 +200,7 @@ Further APIs: Note: Not all DMA engine drivers can return reliable information for - a running DMA channel. It is recommended that DMA engine users + a running DMA channel. It is recommended that DMA engine users pause or stop (via dmaengine_terminate_all()) the channel before using this API. diff --git a/Documentation/dmaengine/dmatest.txt b/Documentation/dmaengine/dmatest.txt index dd77a81bdb80..fb683c72dea8 100644 --- a/Documentation/dmaengine/dmatest.txt +++ b/Documentation/dmaengine/dmatest.txt @@ -34,7 +34,7 @@ command: % ls -1 /sys/class/dma/ Once started a message like "dmatest: Started 1 threads using dma0chan0" is -emitted. After that only test failure messages are reported until the test +emitted. After that only test failure messages are reported until the test stops. Note that running a new test will not stop any in progress test. @@ -43,11 +43,11 @@ The following command returns the state of the test. % cat /sys/module/dmatest/parameters/run To wait for test completion userpace can poll 'run' until it is false, or use -the wait parameter. Specifying 'wait=1' when loading the module causes module +the wait parameter. Specifying 'wait=1' when loading the module causes module initialization to pause until a test run has completed, while reading /sys/module/dmatest/parameters/wait waits for any running test to complete -before returning. For example, the following scripts wait for 42 tests -to complete before exiting. Note that if 'iterations' is set to 'infinite' then +before returning. For example, the following scripts wait for 42 tests +to complete before exiting. Note that if 'iterations' is set to 'infinite' then waiting is disabled. Example: @@ -81,7 +81,7 @@ Example of output: The message format is unified across the different types of errors. A number in the parens represents additional information, e.g. error code, error counter, -or status. A test thread also emits a summary line at completion listing the +or status. A test thread also emits a summary line at completion listing the number of tests executed, number that failed, and a result code. Example: diff --git a/Documentation/dmaengine/provider.txt b/Documentation/dmaengine/provider.txt index c4fd47540b31..e33bc1c8ed2c 100644 --- a/Documentation/dmaengine/provider.txt +++ b/Documentation/dmaengine/provider.txt @@ -384,7 +384,7 @@ where to put them) - The descriptor should be prepared for reuse by invoking dmaengine_desc_set_reuse() which will set DMA_CTRL_REUSE. - dmaengine_desc_set_reuse() will succeed only when channel support - reusable descriptor as exhibited by capablities + reusable descriptor as exhibited by capabilities - As a consequence, if a device driver wants to skip the dma_map_sg() and dma_unmap_sg() in between 2 transfers, because the DMA'd data wasn't used, it can resubmit the transfer right after its completion. diff --git a/Documentation/dmaengine/pxa_dma.txt b/Documentation/dmaengine/pxa_dma.txt index 413ef9cfaa4d..0736d44b5438 100644 --- a/Documentation/dmaengine/pxa_dma.txt +++ b/Documentation/dmaengine/pxa_dma.txt @@ -29,7 +29,7 @@ Constraints d) Bandwidth guarantee The PXA architecture has 4 levels of DMAs priorities : high, normal, low. - The high prorities get twice as much bandwidth as the normal, which get twice + The high priorities get twice as much bandwidth as the normal, which get twice as much as the low priorities. A driver should be able to request a priority, especially the real-time ones such as pxa_camera with (big) throughputs. diff --git a/Documentation/dontdiff b/Documentation/dontdiff index 5385cba941d2..a23edccd2059 100644 --- a/Documentation/dontdiff +++ b/Documentation/dontdiff @@ -139,7 +139,6 @@ hpet_example hugepage-mmap hugepage-shm ihex2fw -ikconfig.h* inat-tables.c initramfs_list int16.c diff --git a/Documentation/driver-api/edac.rst b/Documentation/driver-api/edac.rst new file mode 100644 index 000000000000..b8c742aa0a71 --- /dev/null +++ b/Documentation/driver-api/edac.rst @@ -0,0 +1,178 @@ +Error Detection And Correction (EDAC) Devices +============================================= + +Main Concepts used at the EDAC subsystem +---------------------------------------- + +There are several things to be aware of that aren't at all obvious, like +*sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*, +etc... + +These are some of the many terms that are thrown about that don't always +mean what people think they mean (Inconceivable!). In the interest of +creating a common ground for discussion, terms and their definitions +will be established. + +* Memory devices + +The individual DRAM chips on a memory stick. These devices commonly +output 4 and 8 bits each (x4, x8). Grouping several of these in parallel +provides the number of bits that the memory controller expects: +typically 72 bits, in order to provide 64 bits + 8 bits of ECC data. + +* Memory Stick + +A printed circuit board that aggregates multiple memory devices in +parallel. In general, this is the Field Replaceable Unit (FRU) which +gets replaced, in the case of excessive errors. Most often it is also +called DIMM (Dual Inline Memory Module). + +* Memory Socket + +A physical connector on the motherboard that accepts a single memory +stick. Also called as "slot" on several datasheets. + +* Channel + +A memory controller channel, responsible to communicate with a group of +DIMMs. Each channel has its own independent control (command) and data +bus, and can be used independently or grouped with other channels. + +* Branch + +It is typically the highest hierarchy on a Fully-Buffered DIMM memory +controller. Typically, it contains two channels. Two channels at the +same branch can be used in single mode or in lockstep mode. When +lockstep is enabled, the cacheline is doubled, but it generally brings +some performance penalty. Also, it is generally not possible to point to +just one memory stick when an error occurs, as the error correction code +is calculated using two DIMMs instead of one. Due to that, it is capable +of correcting more errors than on single mode. + +* Single-channel + +The data accessed by the memory controller is contained into one dimm +only. E. g. if the data is 64 bits-wide, the data flows to the CPU using +one 64 bits parallel access. Typically used with SDR, DDR, DDR2 and DDR3 +memories. FB-DIMM and RAMBUS use a different concept for channel, so +this concept doesn't apply there. + +* Double-channel + +The data size accessed by the memory controller is interlaced into two +dimms, accessed at the same time. E. g. if the DIMM is 64 bits-wide (72 +bits with ECC), the data flows to the CPU using a 128 bits parallel +access. + +* Chip-select row + +This is the name of the DRAM signal used to select the DRAM ranks to be +accessed. Common chip-select rows for single channel are 64 bits, for +dual channel 128 bits. It may not be visible by the memory controller, +as some DIMM types have a memory buffer that can hide direct access to +it from the Memory Controller. + +* Single-Ranked stick + +A Single-ranked stick has 1 chip-select row of memory. Motherboards +commonly drive two chip-select pins to a memory stick. A single-ranked +stick, will occupy only one of those rows. The other will be unused. + +.. _doubleranked: + +* Double-Ranked stick + +A double-ranked stick has two chip-select rows which access different +sets of memory devices. The two rows cannot be accessed concurrently. + +* Double-sided stick + +**DEPRECATED TERM**, see :ref:`Double-Ranked stick <doubleranked>`. + +A double-sided stick has two chip-select rows which access different sets +of memory devices. The two rows cannot be accessed concurrently. +"Double-sided" is irrespective of the memory devices being mounted on +both sides of the memory stick. + +* Socket set + +All of the memory sticks that are required for a single memory access or +all of the memory sticks spanned by a chip-select row. A single socket +set has two chip-select rows and if double-sided sticks are used these +will occupy those chip-select rows. + +* Bank + +This term is avoided because it is unclear when needing to distinguish +between chip-select rows and socket sets. + + +Memory Controllers +------------------ + +Most of the EDAC core is focused on doing Memory Controller error detection. +The :c:func:`edac_mc_alloc`. It uses internally the struct ``mem_ctl_info`` +to describe the memory controllers, with is an opaque struct for the EDAC +drivers. Only the EDAC core is allowed to touch it. + +.. kernel-doc:: include/linux/edac.h + +.. kernel-doc:: drivers/edac/edac_mc.h + +PCI Controllers +--------------- + +The EDAC subsystem provides a mechanism to handle PCI controllers by calling +the :c:func:`edac_pci_alloc_ctl_info`. It will use the struct +:c:type:`edac_pci_ctl_info` to describe the PCI controllers. + +.. kernel-doc:: drivers/edac/edac_pci.h + +EDAC Blocks +----------- + +The EDAC subsystem also provides a generic mechanism to report errors on +other parts of the hardware via :c:func:`edac_device_alloc_ctl_info` function. + +The structures :c:type:`edac_dev_sysfs_block_attribute`, +:c:type:`edac_device_block`, :c:type:`edac_device_instance` and +:c:type:`edac_device_ctl_info` provide a generic or abstract 'edac_device' +representation at sysfs. + +This set of structures and the code that implements the APIs for the same, provide for registering EDAC type devices which are NOT standard memory or +PCI, like: + +- CPU caches (L1 and L2) +- DMA engines +- Core CPU switches +- Fabric switch units +- PCIe interface controllers +- other EDAC/ECC type devices that can be monitored for + errors, etc. + +It allows for a 2 level set of hierarchy. + +For example, a cache could be composed of L1, L2 and L3 levels of cache. +Each CPU core would have its own L1 cache, while sharing L2 and maybe L3 +caches. On such case, those can be represented via the following sysfs +nodes:: + + /sys/devices/system/edac/.. + + pci/ <existing pci directory (if available)> + mc/ <existing memory device directory> + cpu/cpu0/.. <L1 and L2 block directory> + /L1-cache/ce_count + /ue_count + /L2-cache/ce_count + /ue_count + cpu/cpu1/.. <L1 and L2 block directory> + /L1-cache/ce_count + /ue_count + /L2-cache/ce_count + /ue_count + ... + + the L1 and L2 directories would be "edac_device_block's" + +.. kernel-doc:: drivers/edac/edac_device.h diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst index a528178a54a5..5475a2807e7a 100644 --- a/Documentation/driver-api/index.rst +++ b/Documentation/driver-api/index.rst @@ -26,6 +26,7 @@ available subsections can be seen below. spi i2c hsi + edac miscellaneous vme 80211/index diff --git a/Documentation/driver-api/infrastructure.rst b/Documentation/driver-api/infrastructure.rst index 0bb0b5fc9512..6d9ff316b608 100644 --- a/Documentation/driver-api/infrastructure.rst +++ b/Documentation/driver-api/infrastructure.rst @@ -55,21 +55,6 @@ Device Drivers DMA Management .. kernel-doc:: drivers/base/dma-mapping.c :export: -Device Drivers Power Management -------------------------------- - -.. kernel-doc:: drivers/base/power/main.c - :export: - -Device Drivers ACPI Support ---------------------------- - -.. kernel-doc:: drivers/acpi/scan.c - :export: - -.. kernel-doc:: drivers/acpi/scan.c - :internal: - Device drivers PnP support -------------------------- diff --git a/Documentation/edac.txt b/Documentation/edac.txt deleted file mode 100644 index f89cfd85ae13..000000000000 --- a/Documentation/edac.txt +++ /dev/null @@ -1,812 +0,0 @@ -EDAC - Error Detection And Correction -===================================== - -"bluesmoke" was the name for this device driver when it -was "out-of-tree" and maintained at sourceforge.net - -bluesmoke.sourceforge.net. That site is mostly archaic now and can be -used only for historical purposes. - -When the subsystem was pushed into 2.6.16 for the first time, it was -renamed to 'EDAC'. - -PURPOSE -------- - -The 'edac' kernel module's goal is to detect and report hardware errors -that occur within the computer system running under linux. - -MEMORY ------- - -Memory Correctable Errors (CE) and Uncorrectable Errors (UE) are the -primary errors being harvested. These types of errors are harvested by -the 'edac_mc' device. - -Detecting CE events, then harvesting those events and reporting them, -*can* but must not necessarily be a predictor of future UE events. With -CE events only, the system can and will continue to operate as no data -has been damaged yet. - -However, preventive maintenance and proactive part replacement of memory -DIMMs exhibiting CEs can reduce the likelihood of the dreaded UE events -and system panics. - -OTHER HARDWARE ELEMENTS ------------------------ - -A new feature for EDAC, the edac_device class of device, was added in -the 2.6.23 version of the kernel. - -This new device type allows for non-memory type of ECC hardware detectors -to have their states harvested and presented to userspace via the sysfs -interface. - -Some architectures have ECC detectors for L1, L2 and L3 caches, -along with DMA engines, fabric switches, main data path switches, -interconnections, and various other hardware data paths. If the hardware -reports it, then a edac_device device probably can be constructed to -harvest and present that to userspace. - - -PCI BUS SCANNING ----------------- - -In addition, PCI devices are scanned for PCI Bus Parity and SERR Errors -in order to determine if errors are occurring during data transfers. - -The presence of PCI Parity errors must be examined with a grain of salt. -There are several add-in adapters that do *not* follow the PCI specification -with regards to Parity generation and reporting. The specification says -the vendor should tie the parity status bits to 0 if they do not intend -to generate parity. Some vendors do not do this, and thus the parity bit -can "float" giving false positives. - -There is a PCI device attribute located in sysfs that is checked by -the EDAC PCI scanning code. If that attribute is set, PCI parity/error -scanning is skipped for that device. The attribute is: - - broken_parity_status - -and is located in /sys/devices/pci<XXX>/0000:XX:YY.Z directories for -PCI devices. - - -VERSIONING ----------- - -EDAC is composed of a "core" module (edac_core.ko) and several Memory -Controller (MC) driver modules. On a given system, the CORE is loaded -and one MC driver will be loaded. Both the CORE and the MC driver (or -edac_device driver) have individual versions that reflect current -release level of their respective modules. - -Thus, to "report" on what version a system is running, one must report -both the CORE's and the MC driver's versions. - - -LOADING -------- - -If 'edac' was statically linked with the kernel then no loading -is necessary. If 'edac' was built as modules then simply modprobe -the 'edac' pieces that you need. You should be able to modprobe -hardware-specific modules and have the dependencies load the necessary -core modules. - -Example: - -$> modprobe amd76x_edac - -loads both the amd76x_edac.ko memory controller module and the edac_mc.ko -core module. - - -SYSFS INTERFACE ---------------- - -EDAC presents a 'sysfs' interface for control and reporting purposes. It -lives in the /sys/devices/system/edac directory. - -Within this directory there currently reside 2 components: - - mc memory controller(s) system - pci PCI control and status system - - - -Memory Controller (mc) Model ----------------------------- - -Each 'mc' device controls a set of DIMM memory modules. These modules -are laid out in a Chip-Select Row (csrowX) and Channel table (chX). -There can be multiple csrows and multiple channels. - -Memory controllers allow for several csrows, with 8 csrows being a -typical value. Yet, the actual number of csrows depends on the layout of -a given motherboard, memory controller and DIMM characteristics. - -Dual channels allows for 128 bit data transfers to/from the CPU from/to -memory. Some newer chipsets allow for more than 2 channels, like Fully -Buffered DIMMs (FB-DIMMs). The following example will assume 2 channels: - - - Channel 0 Channel 1 - =================================== - csrow0 | DIMM_A0 | DIMM_B0 | - csrow1 | DIMM_A0 | DIMM_B0 | - =================================== - - =================================== - csrow2 | DIMM_A1 | DIMM_B1 | - csrow3 | DIMM_A1 | DIMM_B1 | - =================================== - -In the above example table there are 4 physical slots on the motherboard -for memory DIMMs: - - DIMM_A0 - DIMM_B0 - DIMM_A1 - DIMM_B1 - -Labels for these slots are usually silk-screened on the motherboard. -Slots labeled 'A' are channel 0 in this example. Slots labeled 'B' are -channel 1. Notice that there are two csrows possible on a physical DIMM. -These csrows are allocated their csrow assignment based on the slot into -which the memory DIMM is placed. Thus, when 1 DIMM is placed in each -Channel, the csrows cross both DIMMs. - -Memory DIMMs come single or dual "ranked". A rank is a populated csrow. -Thus, 2 single ranked DIMMs, placed in slots DIMM_A0 and DIMM_B0 above -will have 1 csrow, csrow0. csrow1 will be empty. On the other hand, -when 2 dual ranked DIMMs are similarly placed, then both csrow0 and -csrow1 will be populated. The pattern repeats itself for csrow2 and -csrow3. - -The representation of the above is reflected in the directory -tree in EDAC's sysfs interface. Starting in directory -/sys/devices/system/edac/mc each memory controller will be represented -by its own 'mcX' directory, where 'X' is the index of the MC. - - - ..../edac/mc/ - | - |->mc0 - |->mc1 - |->mc2 - .... - -Under each 'mcX' directory each 'csrowX' is again represented by a -'csrowX', where 'X' is the csrow index: - - - .../mc/mc0/ - | - |->csrow0 - |->csrow2 - |->csrow3 - .... - -Notice that there is no csrow1, which indicates that csrow0 is composed -of a single ranked DIMMs. This should also apply in both Channels, in -order to have dual-channel mode be operational. Since both csrow2 and -csrow3 are populated, this indicates a dual ranked set of DIMMs for -channels 0 and 1. - - -Within each of the 'mcX' and 'csrowX' directories are several EDAC -control and attribute files. - - -'mcX' directories ------------------ - -In 'mcX' directories are EDAC control and attribute files for -this 'X' instance of the memory controllers. - -For a description of the sysfs API, please see: - Documentation/ABI/testing/sysfs-devices-edac - - - -'csrowX' directories --------------------- - -When CONFIG_EDAC_LEGACY_SYSFS is enabled, sysfs will contain the csrowX -directories. As this API doesn't work properly for Rambus, FB-DIMMs and -modern Intel Memory Controllers, this is being deprecated in favor of -dimmX directories. - -In the 'csrowX' directories are EDAC control and attribute files for -this 'X' instance of csrow: - - -Total Uncorrectable Errors count attribute file: - - 'ue_count' - - This attribute file displays the total count of uncorrectable - errors that have occurred on this csrow. If panic_on_ue is set - this counter will not have a chance to increment, since EDAC - will panic the system. - - -Total Correctable Errors count attribute file: - - 'ce_count' - - This attribute file displays the total count of correctable - errors that have occurred on this csrow. This count is very - important to examine. CEs provide early indications that a - DIMM is beginning to fail. This count field should be - monitored for non-zero values and report such information - to the system administrator. - - -Total memory managed by this csrow attribute file: - - 'size_mb' - - This attribute file displays, in count of megabytes, the memory - that this csrow contains. - - -Memory Type attribute file: - - 'mem_type' - - This attribute file will display what type of memory is currently - on this csrow. Normally, either buffered or unbuffered memory. - Examples: - Registered-DDR - Unbuffered-DDR - - -EDAC Mode of operation attribute file: - - 'edac_mode' - - This attribute file will display what type of Error detection - and correction is being utilized. - - -Device type attribute file: - - 'dev_type' - - This attribute file will display what type of DRAM device is - being utilized on this DIMM. - Examples: - x1 - x2 - x4 - x8 - - -Channel 0 CE Count attribute file: - - 'ch0_ce_count' - - This attribute file will display the count of CEs on this - DIMM located in channel 0. - - -Channel 0 UE Count attribute file: - - 'ch0_ue_count' - - This attribute file will display the count of UEs on this - DIMM located in channel 0. - - -Channel 0 DIMM Label control file: - - 'ch0_dimm_label' - - This control file allows this DIMM to have a label assigned - to it. With this label in the module, when errors occur - the output can provide the DIMM label in the system log. - This becomes vital for panic events to isolate the - cause of the UE event. - - DIMM Labels must be assigned after booting, with information - that correctly identifies the physical slot with its - silk screen label. This information is currently very - motherboard specific and determination of this information - must occur in userland at this time. - - -Channel 1 CE Count attribute file: - - 'ch1_ce_count' - - This attribute file will display the count of CEs on this - DIMM located in channel 1. - - -Channel 1 UE Count attribute file: - - 'ch1_ue_count' - - This attribute file will display the count of UEs on this - DIMM located in channel 0. - - -Channel 1 DIMM Label control file: - - 'ch1_dimm_label' - - This control file allows this DIMM to have a label assigned - to it. With this label in the module, when errors occur - the output can provide the DIMM label in the system log. - This becomes vital for panic events to isolate the - cause of the UE event. - - DIMM Labels must be assigned after booting, with information - that correctly identifies the physical slot with its - silk screen label. This information is currently very - motherboard specific and determination of this information - must occur in userland at this time. - - - -SYSTEM LOGGING --------------- - -If logging for UEs and CEs is enabled, then system logs will contain -information indicating that errors have been detected: - -EDAC MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0, -channel 1 "DIMM_B1": amd76x_edac - -EDAC MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0, -channel 1 "DIMM_B1": amd76x_edac - - -The structure of the message is: - the memory controller (MC0) - Error type (CE) - memory page (0x283) - offset in the page (0xce0) - the byte granularity (grain 8) - or resolution of the error - the error syndrome (0xb741) - memory row (row 0) - memory channel (channel 1) - DIMM label, if set prior (DIMM B1 - and then an optional, driver-specific message that may - have additional information. - -Both UEs and CEs with no info will lack all but memory controller, error -type, a notice of "no info" and then an optional, driver-specific error -message. - - -PCI Bus Parity Detection ------------------------- - -On Header Type 00 devices, the primary status is looked at for any -parity error regardless of whether parity is enabled on the device or -not. (The spec indicates parity is generated in some cases). On Header -Type 01 bridges, the secondary status register is also looked at to see -if parity occurred on the bus on the other side of the bridge. - - -SYSFS CONFIGURATION -------------------- - -Under /sys/devices/system/edac/pci are control and attribute files as follows: - - -Enable/Disable PCI Parity checking control file: - - 'check_pci_parity' - - - This control file enables or disables the PCI Bus Parity scanning - operation. Writing a 1 to this file enables the scanning. Writing - a 0 to this file disables the scanning. - - Enable: - echo "1" >/sys/devices/system/edac/pci/check_pci_parity - - Disable: - echo "0" >/sys/devices/system/edac/pci/check_pci_parity - - -Parity Count: - - 'pci_parity_count' - - This attribute file will display the number of parity errors that - have been detected. - - - -MODULE PARAMETERS ------------------ - -Panic on UE control file: - - 'edac_mc_panic_on_ue' - - An uncorrectable error will cause a machine panic. This is usually - desirable. It is a bad idea to continue when an uncorrectable error - occurs - it is indeterminate what was uncorrected and the operating - system context might be so mangled that continuing will lead to further - corruption. If the kernel has MCE configured, then EDAC will never - notice the UE. - - LOAD TIME: module/kernel parameter: edac_mc_panic_on_ue=[0|1] - - RUN TIME: echo "1" > /sys/module/edac_core/parameters/edac_mc_panic_on_ue - - -Log UE control file: - - 'edac_mc_log_ue' - - Generate kernel messages describing uncorrectable errors. These errors - are reported through the system message log system. UE statistics - will be accumulated even when UE logging is disabled. - - LOAD TIME: module/kernel parameter: edac_mc_log_ue=[0|1] - - RUN TIME: echo "1" > /sys/module/edac_core/parameters/edac_mc_log_ue - - -Log CE control file: - - 'edac_mc_log_ce' - - Generate kernel messages describing correctable errors. These - errors are reported through the system message log system. - CE statistics will be accumulated even when CE logging is disabled. - - LOAD TIME: module/kernel parameter: edac_mc_log_ce=[0|1] - - RUN TIME: echo "1" > /sys/module/edac_core/parameters/edac_mc_log_ce - - -Polling period control file: - - 'edac_mc_poll_msec' - - The time period, in milliseconds, for polling for error information. - Too small a value wastes resources. Too large a value might delay - necessary handling of errors and might loose valuable information for - locating the error. 1000 milliseconds (once each second) is the current - default. Systems which require all the bandwidth they can get, may - increase this. - - LOAD TIME: module/kernel parameter: edac_mc_poll_msec=[0|1] - - RUN TIME: echo "1000" > /sys/module/edac_core/parameters/edac_mc_poll_msec - - -Panic on PCI PARITY Error: - - 'panic_on_pci_parity' - - - This control file enables or disables panicking when a parity - error has been detected. - - - module/kernel parameter: edac_panic_on_pci_pe=[0|1] - - Enable: - echo "1" > /sys/module/edac_core/parameters/edac_panic_on_pci_pe - - Disable: - echo "0" > /sys/module/edac_core/parameters/edac_panic_on_pci_pe - - - -EDAC device type ----------------- - -In the header file, edac_core.h, there is a series of edac_device structures -and APIs for the EDAC_DEVICE. - -User space access to an edac_device is through the sysfs interface. - -At the location /sys/devices/system/edac (sysfs) new edac_device devices will -appear. - -There is a three level tree beneath the above 'edac' directory. For example, -the 'test_device_edac' device (found at the bluesmoke.sourceforget.net website) -installs itself as: - - /sys/devices/systm/edac/test-instance - -in this directory are various controls, a symlink and one or more 'instance' -directories. - -The standard default controls are: - - log_ce boolean to log CE events - log_ue boolean to log UE events - panic_on_ue boolean to 'panic' the system if an UE is encountered - (default off, can be set true via startup script) - poll_msec time period between POLL cycles for events - -The test_device_edac device adds at least one of its own custom control: - - test_bits which in the current test driver does nothing but - show how it is installed. A ported driver can - add one or more such controls and/or attributes - for specific uses. - One out-of-tree driver uses controls here to allow - for ERROR INJECTION operations to hardware - injection registers - -The symlink points to the 'struct dev' that is registered for this edac_device. - -INSTANCES ---------- - -One or more instance directories are present. For the 'test_device_edac' case: - - test-instance0 - - -In this directory there are two default counter attributes, which are totals of -counter in deeper subdirectories. - - ce_count total of CE events of subdirectories - ue_count total of UE events of subdirectories - -BLOCKS ------- - -At the lowest directory level is the 'block' directory. There can be 0, 1 -or more blocks specified in each instance. - - test-block0 - - -In this directory the default attributes are: - - ce_count which is counter of CE events for this 'block' - of hardware being monitored - ue_count which is counter of UE events for this 'block' - of hardware being monitored - - -The 'test_device_edac' device adds 4 attributes and 1 control: - - test-block-bits-0 for every POLL cycle this counter - is incremented - test-block-bits-1 every 10 cycles, this counter is bumped once, - and test-block-bits-0 is set to 0 - test-block-bits-2 every 100 cycles, this counter is bumped once, - and test-block-bits-1 is set to 0 - test-block-bits-3 every 1000 cycles, this counter is bumped once, - and test-block-bits-2 is set to 0 - - - reset-counters writing ANY thing to this control will - reset all the above counters. - - -Use of the 'test_device_edac' driver should enable any others to create their own -unique drivers for their hardware systems. - -The 'test_device_edac' sample driver is located at the -bluesmoke.sourceforge.net project site for EDAC. - - -NEHALEM USAGE OF EDAC APIs --------------------------- - -This chapter documents some EXPERIMENTAL mappings for EDAC API to handle -Nehalem EDAC driver. They will likely be changed on future versions -of the driver. - -Due to the way Nehalem exports Memory Controller data, some adjustments -were done at i7core_edac driver. This chapter will cover those differences - -1) On Nehalem, there is one Memory Controller per Quick Patch Interconnect - (QPI). At the driver, the term "socket" means one QPI. This is - associated with a physical CPU socket. - - Each MC have 3 physical read channels, 3 physical write channels and - 3 logic channels. The driver currently sees it as just 3 channels. - Each channel can have up to 3 DIMMs. - - The minimum known unity is DIMMs. There are no information about csrows. - As EDAC API maps the minimum unity is csrows, the driver sequentially - maps channel/dimm into different csrows. - - For example, supposing the following layout: - Ch0 phy rd0, wr0 (0x063f4031): 2 ranks, UDIMMs - dimm 0 1024 Mb offset: 0, bank: 8, rank: 1, row: 0x4000, col: 0x400 - dimm 1 1024 Mb offset: 4, bank: 8, rank: 1, row: 0x4000, col: 0x400 - Ch1 phy rd1, wr1 (0x063f4031): 2 ranks, UDIMMs - dimm 0 1024 Mb offset: 0, bank: 8, rank: 1, row: 0x4000, col: 0x400 - Ch2 phy rd3, wr3 (0x063f4031): 2 ranks, UDIMMs - dimm 0 1024 Mb offset: 0, bank: 8, rank: 1, row: 0x4000, col: 0x400 - The driver will map it as: - csrow0: channel 0, dimm0 - csrow1: channel 0, dimm1 - csrow2: channel 1, dimm0 - csrow3: channel 2, dimm0 - -exports one - DIMM per csrow. - - Each QPI is exported as a different memory controller. - -2) Nehalem MC has the ability to generate errors. The driver implements this - functionality via some error injection nodes: - - For injecting a memory error, there are some sysfs nodes, under - /sys/devices/system/edac/mc/mc?/: - - inject_addrmatch/*: - Controls the error injection mask register. It is possible to specify - several characteristics of the address to match an error code: - dimm = the affected dimm. Numbers are relative to a channel; - rank = the memory rank; - channel = the channel that will generate an error; - bank = the affected bank; - page = the page address; - column (or col) = the address column. - each of the above values can be set to "any" to match any valid value. - - At driver init, all values are set to any. - - For example, to generate an error at rank 1 of dimm 2, for any channel, - any bank, any page, any column: - echo 2 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/dimm - echo 1 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/rank - - To return to the default behaviour of matching any, you can do: - echo any >/sys/devices/system/edac/mc/mc0/inject_addrmatch/dimm - echo any >/sys/devices/system/edac/mc/mc0/inject_addrmatch/rank - - inject_eccmask: - specifies what bits will have troubles, - - inject_section: - specifies what ECC cache section will get the error: - 3 for both - 2 for the highest - 1 for the lowest - - inject_type: - specifies the type of error, being a combination of the following bits: - bit 0 - repeat - bit 1 - ecc - bit 2 - parity - - inject_enable starts the error generation when something different - than 0 is written. - - All inject vars can be read. root permission is needed for write. - - Datasheet states that the error will only be generated after a write on an - address that matches inject_addrmatch. It seems, however, that reading will - also produce an error. - - For example, the following code will generate an error for any write access - at socket 0, on any DIMM/address on channel 2: - - echo 2 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/channel - echo 2 >/sys/devices/system/edac/mc/mc0/inject_type - echo 64 >/sys/devices/system/edac/mc/mc0/inject_eccmask - echo 3 >/sys/devices/system/edac/mc/mc0/inject_section - echo 1 >/sys/devices/system/edac/mc/mc0/inject_enable - dd if=/dev/mem of=/dev/null seek=16k bs=4k count=1 >& /dev/null - - For socket 1, it is needed to replace "mc0" by "mc1" at the above - commands. - - The generated error message will look like: - - EDAC MC0: UE row 0, channel-a= 0 channel-b= 0 labels "-": NON_FATAL (addr = 0x0075b980, socket=0, Dimm=0, Channel=2, syndrome=0x00000040, count=1, Err=8c0000400001009f:4000080482 (read error: read ECC error)) - -3) Nehalem specific Corrected Error memory counters - - Nehalem have some registers to count memory errors. The driver uses those - registers to report Corrected Errors on devices with Registered Dimms. - - However, those counters don't work with Unregistered Dimms. As the chipset - offers some counters that also work with UDIMMS (but with a worse level of - granularity than the default ones), the driver exposes those registers for - UDIMM memories. - - They can be read by looking at the contents of all_channel_counts/ - - $ for i in /sys/devices/system/edac/mc/mc0/all_channel_counts/*; do echo $i; cat $i; done - /sys/devices/system/edac/mc/mc0/all_channel_counts/udimm0 - 0 - /sys/devices/system/edac/mc/mc0/all_channel_counts/udimm1 - 0 - /sys/devices/system/edac/mc/mc0/all_channel_counts/udimm2 - 0 - - What happens here is that errors on different csrows, but at the same - dimm number will increment the same counter. - So, in this memory mapping: - csrow0: channel 0, dimm0 - csrow1: channel 0, dimm1 - csrow2: channel 1, dimm0 - csrow3: channel 2, dimm0 - The hardware will increment udimm0 for an error at the first dimm at either - csrow0, csrow2 or csrow3; - The hardware will increment udimm1 for an error at the second dimm at either - csrow0, csrow2 or csrow3; - The hardware will increment udimm2 for an error at the third dimm at either - csrow0, csrow2 or csrow3; - -4) Standard error counters - - The standard error counters are generated when an mcelog error is received - by the driver. Since, with udimm, this is counted by software, it is - possible that some errors could be lost. With rdimm's, they display the - contents of the registers - -AMD64_EDAC REFERENCE DOCUMENTS USED ------------------------------------ -amd64_edac module is based on the following documents -(available from http://support.amd.com/en-us/search/tech-docs): - -1. Title: BIOS and Kernel Developer's Guide for AMD Athlon 64 and AMD - Opteron Processors - AMD publication #: 26094 - Revision: 3.26 - Link: http://support.amd.com/TechDocs/26094.PDF - -2. Title: BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh - Processors - AMD publication #: 32559 - Revision: 3.00 - Issue Date: May 2006 - Link: http://support.amd.com/TechDocs/32559.pdf - -3. Title: BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h - Processors - AMD publication #: 31116 - Revision: 3.00 - Issue Date: September 07, 2007 - Link: http://support.amd.com/TechDocs/31116.pdf - -4. Title: BIOS and Kernel Developer's Guide (BKDG) for AMD Family 15h - Models 30h-3Fh Processors - AMD publication #: 49125 - Revision: 3.06 - Issue Date: 2/12/2015 (latest release) - Link: http://support.amd.com/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf - -5. Title: BIOS and Kernel Developer's Guide (BKDG) for AMD Family 15h - Models 60h-6Fh Processors - AMD publication #: 50742 - Revision: 3.01 - Issue Date: 7/23/2015 (latest release) - Link: http://support.amd.com/TechDocs/50742_15h_Models_60h-6Fh_BKDG.pdf - -6. Title: BIOS and Kernel Developer's Guide (BKDG) for AMD Family 16h - Models 00h-0Fh Processors - AMD publication #: 48751 - Revision: 3.03 - Issue Date: 2/23/2015 (latest release) - Link: http://support.amd.com/TechDocs/48751_16h_bkdg.pdf - -CREDITS: -======== - -Written by Doug Thompson <dougthompson@xmission.com> -7 Dec 2005 -17 Jul 2007 Updated - -(c) Mauro Carvalho Chehab -05 Aug 2009 Nehalem interface - -EDAC authors/maintainers: - - Doug Thompson, Dave Jiang, Dave Peterson et al, - Mauro Carvalho Chehab - Borislav Petkov - original author: Thayne Harbaugh diff --git a/Documentation/features/io/dma-api-debug/arch-support.txt b/Documentation/features/io/dma-api-debug/arch-support.txt index 4f4a3443b114..ffa522a9bdfd 100644 --- a/Documentation/features/io/dma-api-debug/arch-support.txt +++ b/Documentation/features/io/dma-api-debug/arch-support.txt @@ -36,5 +36,5 @@ | um: | TODO | | unicore32: | TODO | | x86: | ok | - | xtensa: | TODO | + | xtensa: | ok | ----------------------- diff --git a/Documentation/features/io/dma-contiguous/arch-support.txt b/Documentation/features/io/dma-contiguous/arch-support.txt index a97e8e3f4ebb..83d2cf989ea3 100644 --- a/Documentation/features/io/dma-contiguous/arch-support.txt +++ b/Documentation/features/io/dma-contiguous/arch-support.txt @@ -36,5 +36,5 @@ | um: | TODO | | unicore32: | TODO | | x86: | ok | - | xtensa: | TODO | + | xtensa: | ok | ----------------------- diff --git a/Documentation/features/io/sg-chain/arch-support.txt b/Documentation/features/io/sg-chain/arch-support.txt index b9b675539b9d..6ca98f9911bb 100644 --- a/Documentation/features/io/sg-chain/arch-support.txt +++ b/Documentation/features/io/sg-chain/arch-support.txt @@ -7,7 +7,7 @@ | arch |status| ----------------------- | alpha: | TODO | - | arc: | TODO | + | arc: | ok | | arm: | ok | | arm64: | ok | | avr32: | TODO | diff --git a/Documentation/filesystems/00-INDEX b/Documentation/filesystems/00-INDEX index f66e748fc5e4..b7bd6c9009cc 100644 --- a/Documentation/filesystems/00-INDEX +++ b/Documentation/filesystems/00-INDEX @@ -87,8 +87,6 @@ jfs.txt - info and mount options for the JFS filesystem. locks.txt - info on file locking implementations, flock() vs. fcntl(), etc. -logfs.txt - - info on the LogFS flash filesystem. mandatory-locking.txt - info on the Linux implementation of Sys V mandatory file locking. ncpfs.txt diff --git a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking index 1b5f15653b1b..ace63cd7af8c 100644 --- a/Documentation/filesystems/Locking +++ b/Documentation/filesystems/Locking @@ -20,7 +20,7 @@ prototypes: void (*d_iput)(struct dentry *, struct inode *); char *(*d_dname)((struct dentry *dentry, char *buffer, int buflen); struct vfsmount *(*d_automount)(struct path *path); - int (*d_manage)(struct dentry *, bool); + int (*d_manage)(const struct path *, bool); struct dentry *(*d_real)(struct dentry *, const struct inode *, unsigned int); @@ -556,7 +556,7 @@ till "end_pgoff". ->map_pages() is called with page table locked and must not block. If it's not possible to reach a page without blocking, filesystem should skip it. Filesystem should use do_set_pte() to setup page table entry. Pointer to entry associated with the page is passed in -"pte" field in fault_env structure. Pointers to entries for other offsets +"pte" field in vm_fault structure. Pointers to entries for other offsets should be calculated relative to "pte". ->page_mkwrite() is called when a previously read-only pte is diff --git a/Documentation/filesystems/configfs/configfs.txt b/Documentation/filesystems/configfs/configfs.txt index 8ec9136aae56..3828e85345ae 100644 --- a/Documentation/filesystems/configfs/configfs.txt +++ b/Documentation/filesystems/configfs/configfs.txt @@ -174,7 +174,7 @@ among other things. For that, it needs a type. void (*release)(struct config_item *); int (*allow_link)(struct config_item *src, struct config_item *target); - int (*drop_link)(struct config_item *src, + void (*drop_link)(struct config_item *src, struct config_item *target); }; diff --git a/Documentation/filesystems/dax.txt b/Documentation/filesystems/dax.txt index 23d18b8a49d5..a7e6e14aeb08 100644 --- a/Documentation/filesystems/dax.txt +++ b/Documentation/filesystems/dax.txt @@ -58,22 +58,22 @@ Implementation Tips for Filesystem Writers Filesystem support consists of - adding support to mark inodes as being DAX by setting the S_DAX flag in i_flags -- implementing the direct_IO address space operation, and calling - dax_do_io() instead of blockdev_direct_IO() if S_DAX is set +- implementing ->read_iter and ->write_iter operations which use dax_iomap_rw() + when inode has S_DAX flag set - implementing an mmap file operation for DAX files which sets the VM_MIXEDMAP and VM_HUGEPAGE flags on the VMA, and setting the vm_ops to - include handlers for fault, pmd_fault and page_mkwrite (which should - probably call dax_fault(), dax_pmd_fault() and dax_mkwrite(), passing the - appropriate get_block() callback) -- calling dax_truncate_page() instead of block_truncate_page() for DAX files -- calling dax_zero_page_range() instead of zero_user() for DAX files + include handlers for fault, pmd_fault, page_mkwrite, pfn_mkwrite. These + handlers should probably call dax_iomap_fault() (for fault and page_mkwrite + handlers), dax_iomap_pmd_fault(), dax_pfn_mkwrite() passing the appropriate + iomap operations. +- calling iomap_zero_range() passing appropriate iomap operations instead of + block_truncate_page() for DAX files - ensuring that there is sufficient locking between reads, writes, truncates and page faults -The get_block() callback passed to the DAX functions may return -uninitialised extents. If it does, it must ensure that simultaneous -calls to get_block() (for example by a page-fault racing with a read() -or a write()) work correctly. +The iomap handlers for allocating blocks must make sure that allocated blocks +are zeroed out and converted to written extents before being returned to avoid +exposure of uninitialized data through mmap. These filesystems may be used for inspiration: - ext2: see Documentation/filesystems/ext2.txt diff --git a/Documentation/filesystems/ext4.txt b/Documentation/filesystems/ext4.txt index 6c0108eb0137..3698ed3146e3 100644 --- a/Documentation/filesystems/ext4.txt +++ b/Documentation/filesystems/ext4.txt @@ -351,14 +351,13 @@ nouid32 Disables 32-bit UIDs and GIDs. This is for interoperability with older kernels which only store and expect 16-bit values. -block_validity This options allows to enables/disables the in-kernel +block_validity(*) These options enable or disable the in-kernel noblock_validity facility for tracking filesystem metadata blocks - within internal data structures. This allows multi- - block allocator and other routines to quickly locate - extents which might overlap with filesystem metadata - blocks. This option is intended for debugging - purposes and since it negatively affects the - performance, it is off by default. + within internal data structures. This allows multi- + block allocator and other routines to notice + bugs or corrupted allocation bitmaps which cause + blocks to be allocated which overlap with + filesystem metadata blocks. dioread_lock Controls whether or not ext4 should use the DIO read dioread_nolock locking. If the dioread_nolock option is specified diff --git a/Documentation/filesystems/logfs.txt b/Documentation/filesystems/logfs.txt deleted file mode 100644 index bca42c22a143..000000000000 --- a/Documentation/filesystems/logfs.txt +++ /dev/null @@ -1,241 +0,0 @@ - -The LogFS Flash Filesystem -========================== - -Specification -============= - -Superblocks ------------ - -Two superblocks exist at the beginning and end of the filesystem. -Each superblock is 256 Bytes large, with another 3840 Bytes reserved -for future purposes, making a total of 4096 Bytes. - -Superblock locations may differ for MTD and block devices. On MTD the -first non-bad block contains a superblock in the first 4096 Bytes and -the last non-bad block contains a superblock in the last 4096 Bytes. -On block devices, the first 4096 Bytes of the device contain the first -superblock and the last aligned 4096 Byte-block contains the second -superblock. - -For the most part, the superblocks can be considered read-only. They -are written only to correct errors detected within the superblocks, -move the journal and change the filesystem parameters through tunefs. -As a result, the superblock does not contain any fields that require -constant updates, like the amount of free space, etc. - -Segments --------- - -The space in the device is split up into equal-sized segments. -Segments are the primary write unit of LogFS. Within each segments, -writes happen from front (low addresses) to back (high addresses. If -only a partial segment has been written, the segment number, the -current position within and optionally a write buffer are stored in -the journal. - -Segments are erased as a whole. Therefore Garbage Collection may be -required to completely free a segment before doing so. - -Journal --------- - -The journal contains all global information about the filesystem that -is subject to frequent change. At mount time, it has to be scanned -for the most recent commit entry, which contains a list of pointers to -all currently valid entries. - -Object Store ------------- - -All space except for the superblocks and journal is part of the object -store. Each segment contains a segment header and a number of -objects, each consisting of the object header and the payload. -Objects are either inodes, directory entries (dentries), file data -blocks or indirect blocks. - -Levels ------- - -Garbage collection (GC) may fail if all data is written -indiscriminately. One requirement of GC is that data is separated -roughly according to the distance between the tree root and the data. -Effectively that means all file data is on level 0, indirect blocks -are on levels 1, 2, 3 4 or 5 for 1x, 2x, 3x, 4x or 5x indirect blocks, -respectively. Inode file data is on level 6 for the inodes and 7-11 -for indirect blocks. - -Each segment contains objects of a single level only. As a result, -each level requires its own separate segment to be open for writing. - -Inode File ----------- - -All inodes are stored in a special file, the inode file. Single -exception is the inode file's inode (master inode) which for obvious -reasons is stored in the journal instead. Instead of data blocks, the -leaf nodes of the inode files are inodes. - -Aliases -------- - -Writes in LogFS are done by means of a wandering tree. A naïve -implementation would require that for each write or a block, all -parent blocks are written as well, since the block pointers have -changed. Such an implementation would not be very efficient. - -In LogFS, the block pointer changes are cached in the journal by means -of alias entries. Each alias consists of its logical address - inode -number, block index, level and child number (index into block) - and -the changed data. Any 8-byte word can be changes in this manner. - -Currently aliases are used for block pointers, file size, file used -bytes and the height of an inodes indirect tree. - -Segment Aliases ---------------- - -Related to regular aliases, these are used to handle bad blocks. -Initially, bad blocks are handled by moving the affected segment -content to a spare segment and noting this move in the journal with a -segment alias, a simple (to, from) tupel. GC will later empty this -segment and the alias can be removed again. This is used on MTD only. - -Vim ---- - -By cleverly predicting the life time of data, it is possible to -separate long-living data from short-living data and thereby reduce -the GC overhead later. Each type of distinc life expectency (vim) can -have a separate segment open for writing. Each (level, vim) tupel can -be open just once. If an open segment with unknown vim is encountered -at mount time, it is closed and ignored henceforth. - -Indirect Tree -------------- - -Inodes in LogFS are similar to FFS-style filesystems with direct and -indirect block pointers. One difference is that LogFS uses a single -indirect pointer that can be either a 1x, 2x, etc. indirect pointer. -A height field in the inode defines the height of the indirect tree -and thereby the indirection of the pointer. - -Another difference is the addressing of indirect blocks. In LogFS, -the first 16 pointers in the first indirect block are left empty, -corresponding to the 16 direct pointers in the inode. In ext2 (maybe -others as well) the first pointer in the first indirect block -corresponds to logical block 12, skipping the 12 direct pointers. -So where ext2 is using arithmetic to better utilize space, LogFS keeps -arithmetic simple and uses compression to save space. - -Compression ------------ - -Both file data and metadata can be compressed. Compression for file -data can be enabled with chattr +c and disabled with chattr -c. Doing -so has no effect on existing data, but new data will be stored -accordingly. New inodes will inherit the compression flag of the -parent directory. - -Metadata is always compressed. However, the space accounting ignores -this and charges for the uncompressed size. Failing to do so could -result in GC failures when, after moving some data, indirect blocks -compress worse than previously. Even on a 100% full medium, GC may -not consume any extra space, so the compression gains are lost space -to the user. - -However, they are not lost space to the filesystem internals. By -cheating the user for those bytes, the filesystem gained some slack -space and GC will run less often and faster. - -Garbage Collection and Wear Leveling ------------------------------------- - -Garbage collection is invoked whenever the number of free segments -falls below a threshold. The best (known) candidate is picked based -on the least amount of valid data contained in the segment. All -remaining valid data is copied elsewhere, thereby invalidating it. - -The GC code also checks for aliases and writes then back if their -number gets too large. - -Wear leveling is done by occasionally picking a suboptimal segment for -garbage collection. If a stale segments erase count is significantly -lower than the active segments' erase counts, it will be picked. Wear -leveling is rate limited, so it will never monopolize the device for -more than one segment worth at a time. - -Values for "occasionally", "significantly lower" are compile time -constants. - -Hashed directories ------------------- - -To satisfy efficient lookup(), directory entries are hashed and -located based on the hash. In order to both support large directories -and not be overly inefficient for small directories, several hash -tables of increasing size are used. For each table, the hash value -modulo the table size gives the table index. - -Tables sizes are chosen to limit the number of indirect blocks with a -fully populated table to 0, 1, 2 or 3 respectively. So the first -table contains 16 entries, the second 512-16, etc. - -The last table is special in several ways. First its size depends on -the effective 32bit limit on telldir/seekdir cookies. Since logfs -uses the upper half of the address space for indirect blocks, the size -is limited to 2^31. Secondly the table contains hash buckets with 16 -entries each. - -Using single-entry buckets would result in birthday "attacks". At -just 2^16 used entries, hash collisions would be likely (P >= 0.5). -My math skills are insufficient to do the combinatorics for the 17x -collisions necessary to overflow a bucket, but testing showed that in -10,000 runs the lowest directory fill before a bucket overflow was -188,057,130 entries with an average of 315,149,915 entries. So for -directory sizes of up to a million, bucket overflows should be -virtually impossible under normal circumstances. - -With carefully chosen filenames, it is obviously possible to cause an -overflow with just 21 entries (4 higher tables + 16 entries + 1). So -there may be a security concern if a malicious user has write access -to a directory. - -Open For Discussion -=================== - -Device Address Space --------------------- - -A device address space is used for caching. Both block devices and -MTD provide functions to either read a single page or write a segment. -Partial segments may be written for data integrity, but where possible -complete segments are written for performance on simple block device -flash media. - -Meta Inodes ------------ - -Inodes are stored in the inode file, which is just a regular file for -most purposes. At umount time, however, the inode file needs to -remain open until all dirty inodes are written. So -generic_shutdown_super() may not close this inode, but shouldn't -complain about remaining inodes due to the inode file either. Same -goes for mapping inode of the device address space. - -Currently logfs uses a hack that essentially copies part of fs/inode.c -code over. A general solution would be preferred. - -Indirect block mapping ----------------------- - -With compression, the block device (or mapping inode) cannot be used -to cache indirect blocks. Some other place is required. Currently -logfs uses the top half of each inode's address space. The low 8TB -(on 32bit) are filled with file data, the high 8TB are used for -indirect blocks. - -One problem is that 16TB files created on 64bit systems actually have -data in the top 8TB. But files >16TB would cause problems anyway, so -only the limit has changed. diff --git a/Documentation/filesystems/overlayfs.txt b/Documentation/filesystems/overlayfs.txt index bcbf9710e4af..634d03e20c2d 100644 --- a/Documentation/filesystems/overlayfs.txt +++ b/Documentation/filesystems/overlayfs.txt @@ -66,7 +66,7 @@ At mount time, the two directories given as mount options "lowerdir" and "upperdir" are combined into a merged directory: mount -t overlay overlay -olowerdir=/lower,upperdir=/upper,\ -workdir=/work /merged + workdir=/work /merged The "workdir" needs to be an empty directory on the same filesystem as upperdir. @@ -118,6 +118,7 @@ programs. seek offsets are assigned sequentially when the directories are read. Thus if + - read part of a directory - remember an offset, and close the directory - re-open the directory some time later @@ -130,6 +131,23 @@ directory. Readdir on directories that are not merged is simply handled by the underlying directory (upper or lower). +renaming directories +-------------------- + +When renaming a directory that is on the lower layer or merged (i.e. the +directory was not created on the upper layer to start with) overlayfs can +handle it in two different ways: + +1. return EXDEV error: this error is returned by rename(2) when trying to + move a file or directory across filesystem boundaries. Hence + applications are usually prepared to hande this error (mv(1) for example + recursively copies the directory tree). This is the default behavior. + +2. If the "redirect_dir" feature is enabled, then the directory will be + copied up (but not the contents). Then the "trusted.overlay.redirect" + extended attribute is set to the path of the original location from the + root of the overlay. Finally the directory is moved to the new + location. Non-directories --------------- @@ -185,13 +203,13 @@ filesystem, so both st_dev and st_ino of the file may change. Any open files referring to this inode will access the old data. -Any file locks (and leases) obtained before copy_up will not apply -to the copied up file. - If a file with multiple hard links is copied up, then this will "break" the link. Changes will not be propagated to other names referring to the same inode. +Unless "redirect_dir" feature is enabled, rename(2) on a lower or merged +directory will fail with EXDEV. + Changes to underlying filesystems --------------------------------- diff --git a/Documentation/filesystems/porting b/Documentation/filesystems/porting index bdd025ceb763..95280079c0b3 100644 --- a/Documentation/filesystems/porting +++ b/Documentation/filesystems/porting @@ -596,3 +596,7 @@ in your dentry operations instead. [mandatory] ->rename() has an added flags argument. Any flags not handled by the filesystem should result in EINVAL being returned. +-- +[recommended] + ->readlink is optional for symlinks. Don't set, unless filesystem needs + to fake something for readlink(2). diff --git a/Documentation/filesystems/sysfs-pci.txt b/Documentation/filesystems/sysfs-pci.txt index 74eaac26f8b8..6ea1ceda6f52 100644 --- a/Documentation/filesystems/sysfs-pci.txt +++ b/Documentation/filesystems/sysfs-pci.txt @@ -17,6 +17,7 @@ that support it. For example, a given bus might look like this: | |-- resource0 | |-- resource1 | |-- resource2 + | |-- revision | |-- rom | |-- subsystem_device | |-- subsystem_vendor @@ -41,6 +42,7 @@ files, each with their own function. resource PCI resource host addresses (ascii, ro) resource0..N PCI resource N, if present (binary, mmap, rw[1]) resource0_wc..N_wc PCI WC map resource N, if prefetchable (binary, mmap) + revision PCI revision (ascii, ro) rom PCI ROM resource, if present (binary, ro) subsystem_device PCI subsystem device (ascii, ro) subsystem_vendor PCI subsystem vendor (ascii, ro) diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt index b5039a00caaf..b968084eeac1 100644 --- a/Documentation/filesystems/vfs.txt +++ b/Documentation/filesystems/vfs.txt @@ -451,9 +451,6 @@ otherwise noted. exist; this is checked by the VFS. Unlike plain rename, source and target may be of different type. - readlink: called by the readlink(2) system call. Only required if - you want to support reading symbolic links - get_link: called by the VFS to follow a symbolic link to the inode it points to. Only required if you want to support symbolic links. This method returns the symlink body @@ -468,6 +465,12 @@ otherwise noted. argument. If request can't be handled without leaving RCU mode, have it return ERR_PTR(-ECHILD). + readlink: this is now just an override for use by readlink(2) for the + cases when ->get_link uses nd_jump_link() or object is not in + fact a symlink. Normally filesystems should only implement + ->get_link for symlinks and readlink(2) will automatically use + that. + permission: called by the VFS to check for access rights on a POSIX-like filesystem. @@ -948,7 +951,7 @@ struct dentry_operations { void (*d_iput)(struct dentry *, struct inode *); char *(*d_dname)(struct dentry *, char *, int); struct vfsmount *(*d_automount)(struct path *); - int (*d_manage)(struct dentry *, bool); + int (*d_manage)(const struct path *, bool); struct dentry *(*d_real)(struct dentry *, const struct inode *, unsigned int); }; diff --git a/Documentation/filesystems/xfs.txt b/Documentation/filesystems/xfs.txt index c2d44e6e117b..3b9b5c149f32 100644 --- a/Documentation/filesystems/xfs.txt +++ b/Documentation/filesystems/xfs.txt @@ -51,13 +51,6 @@ default behaviour. CRC enabled filesystems always use the attr2 format, and so will reject the noattr2 mount option if it is set. - barrier (*) - nobarrier - Enables/disables the use of block layer write barriers for - writes into the journal and for data integrity operations. - This allows for drive level write caching to be enabled, for - devices that support write barriers. - discard nodiscard (*) Enable/disable the issuing of commands to let the block @@ -228,7 +221,10 @@ default behaviour. Deprecated Mount Options ======================== -None at present. + Name Removal Schedule + ---- ---------------- + barrier no earlier than v4.15 + nobarrier no earlier than v4.15 Removed Mount Options diff --git a/Documentation/i2c/busses/i2c-mlxcpld b/Documentation/i2c/busses/i2c-mlxcpld new file mode 100644 index 000000000000..4e46c440b38d --- /dev/null +++ b/Documentation/i2c/busses/i2c-mlxcpld @@ -0,0 +1,47 @@ +Driver i2c-mlxcpld + +Author: Michael Shych <michaelsh@mellanox.com> + +This is the Mellanox I2C controller logic, implemented in Lattice CPLD +device. +Device supports: + - Master mode. + - One physical bus. + - Polling mode. + +This controller is equipped within the next Mellanox systems: +"msx6710", "msx6720", "msb7700", "msn2700", "msx1410", "msn2410", "msb7800", +"msn2740", "msn2100". + +The next transaction types are supported: + - Receive Byte/Block. + - Send Byte/Block. + - Read Byte/Block. + - Write Byte/Block. + +Registers: +CTRL 0x1 - control reg. + Resets all the registers. +HALF_CYC 0x4 - cycle reg. + Configure the width of I2C SCL half clock cycle (in 4 LPC_CLK + units). +I2C_HOLD 0x5 - hold reg. + OE (output enable) is delayed by value set to this register + (in LPC_CLK units) +CMD 0x6 - command reg. + Bit 0, 0 = write, 1 = read. + Bits [7:1] - the 7bit Address of the I2C device. + It should be written last as it triggers an I2C transaction. +NUM_DATA 0x7 - data size reg. + Number of data bytes to write in read transaction +NUM_ADDR 0x8 - address reg. + Number of address bytes to write in read transaction. +STATUS 0x9 - status reg. + Bit 0 - transaction is completed. + Bit 4 - ACK/NACK. +DATAx 0xa - 0x54 - 68 bytes data buffer regs. + For write transaction address is specified in four first bytes + (DATA1 - DATA4), data starting from DATA4. + For read transactions address is sent in a separate transaction and + specified in the four first bytes (DATA0 - DATA3). Data is read + starting from DATA0. diff --git a/Documentation/i2c/smbus-protocol b/Documentation/i2c/smbus-protocol index 14d4ec1be245..092d474f5843 100644 --- a/Documentation/i2c/smbus-protocol +++ b/Documentation/i2c/smbus-protocol @@ -200,10 +200,14 @@ alerting device's address. [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P] This is implemented in the following way in the Linux kernel: -* I2C bus drivers which support SMBus Host Notify should call - i2c_setup_smbus_host_notify() to setup SMBus Host Notify support. -* I2C drivers for devices which can trigger SMBus Host Notify should implement - the optional alert() callback. +* I2C bus drivers which support SMBus Host Notify should report + I2C_FUNC_SMBUS_HOST_NOTIFY. +* I2C bus drivers trigger SMBus Host Notify by a call to + i2c_handle_smbus_host_notify(). +* I2C drivers for devices which can trigger SMBus Host Notify will have + client->irq assigned to a Host Notify IRQ if noone else specified an other. + +There is currently no way to retrieve the data parameter from the client. Packet Error Checking (PEC) diff --git a/Documentation/index.rst b/Documentation/index.rst index 2bd8fdc9207c..cb5d77699c60 100644 --- a/Documentation/index.rst +++ b/Documentation/index.rst @@ -58,6 +58,7 @@ needed). gpu/index security/index sound/index + crypto/index Korean translations ------------------- diff --git a/Documentation/laptops/thinkpad-acpi.txt b/Documentation/laptops/thinkpad-acpi.txt index 72a150d8f3df..ba2e7d254842 100644 --- a/Documentation/laptops/thinkpad-acpi.txt +++ b/Documentation/laptops/thinkpad-acpi.txt @@ -540,6 +540,7 @@ Events that are propagated by the driver to userspace: 0x6022 ALARM: a sensor is extremely hot 0x6030 System thermal table changed 0x6040 Nvidia Optimus/AC adapter related (TO BE VERIFIED) +0x60C0 X1 Yoga 2016, Tablet mode status changed Battery nearly empty alarms are a last resort attempt to get the operating system to hibernate or shutdown cleanly (0x2313), or shutdown diff --git a/Documentation/livepatch/livepatch.txt b/Documentation/livepatch/livepatch.txt index 6c43f6ebee8d..f5967316deb9 100644 --- a/Documentation/livepatch/livepatch.txt +++ b/Documentation/livepatch/livepatch.txt @@ -87,7 +87,7 @@ The theory about how to apply functions a safe way is rather complex. The aim is to define a so-called consistency model. It attempts to define conditions when the new implementation could be used so that the system stays consistent. The theory is not yet finished. See the discussion at -http://thread.gmane.org/gmane.linux.kernel/1823033/focus=1828189 +https://lkml.kernel.org/r/20141107140458.GA21774@suse.cz The current consistency model is very simple. It guarantees that either the old or the new function is called. But various functions get redirected diff --git a/Documentation/media/Makefile b/Documentation/media/Makefile index 4d8e2ff378c4..32663602ff25 100644 --- a/Documentation/media/Makefile +++ b/Documentation/media/Makefile @@ -88,7 +88,7 @@ $(BUILDDIR)/videodev2.h.rst: ${UAPI}/videodev2.h ${PARSER} $(SRC_DIR)/videodev2. $(BUILDDIR)/media.h.rst: ${UAPI}/media.h ${PARSER} $(SRC_DIR)/media.h.rst.exceptions @$($(quiet)gen_rst) -$(BUILDDIR)/cec.h.rst: ${KAPI}/cec.h ${PARSER} $(SRC_DIR)/cec.h.rst.exceptions +$(BUILDDIR)/cec.h.rst: ${UAPI}/cec.h ${PARSER} $(SRC_DIR)/cec.h.rst.exceptions @$($(quiet)gen_rst) $(BUILDDIR)/lirc.h.rst: ${UAPI}/lirc.h ${PARSER} $(SRC_DIR)/lirc.h.rst.exceptions diff --git a/Documentation/media/kapi/cec-core.rst b/Documentation/media/kapi/cec-core.rst index 88c33b53ec13..81c6d8e93774 100644 --- a/Documentation/media/kapi/cec-core.rst +++ b/Documentation/media/kapi/cec-core.rst @@ -37,9 +37,8 @@ The struct cec_adapter represents the CEC adapter hardware. It is created by calling cec_allocate_adapter() and deleted by calling cec_delete_adapter(): .. c:function:: - struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops, - void *priv, const char *name, u32 caps, u8 available_las, - struct device *parent); + struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops, void *priv, + const char *name, u32 caps, u8 available_las); .. c:function:: void cec_delete_adapter(struct cec_adapter *adap); @@ -66,20 +65,19 @@ available_las: the number of simultaneous logical addresses that this adapter can handle. Must be 1 <= available_las <= CEC_MAX_LOG_ADDRS. -parent: - the parent device. - To register the /dev/cecX device node and the remote control device (if CEC_CAP_RC is set) you call: .. c:function:: - int cec_register_adapter(struct cec_adapter \*adap); + int cec_register_adapter(struct cec_adapter *adap, struct device *parent); + +where parent is the parent device. To unregister the devices call: .. c:function:: - void cec_unregister_adapter(struct cec_adapter \*adap); + void cec_unregister_adapter(struct cec_adapter *adap); Note: if cec_register_adapter() fails, then call cec_delete_adapter() to clean up. But if cec_register_adapter() succeeded, then only call @@ -106,13 +104,13 @@ your driver: int (*adap_log_addr)(struct cec_adapter *adap, u8 logical_addr); int (*adap_transmit)(struct cec_adapter *adap, u8 attempts, u32 signal_free_time, struct cec_msg *msg); - void (\*adap_log_status)(struct cec_adapter *adap); + void (*adap_status)(struct cec_adapter *adap, struct seq_file *file); /* High-level callbacks */ ... }; -The three low-level ops deal with various aspects of controlling the CEC adapter +The five low-level ops deal with various aspects of controlling the CEC adapter hardware: @@ -238,6 +236,18 @@ When a CEC message was received: Speaks for itself. +Implementing the interrupt handler +---------------------------------- + +Typically the CEC hardware provides interrupts that signal when a transmit +finished and whether it was successful or not, and it provides and interrupt +when a CEC message was received. + +The CEC driver should always process the transmit interrupts first before +handling the receive interrupt. The framework expects to see the cec_transmit_done +call before the cec_received_msg call, otherwise it can get confused if the +received message was in reply to the transmitted message. + Implementing the High-Level CEC Adapter --------------------------------------- @@ -247,11 +257,11 @@ CEC protocol driven. The following high-level callbacks are available: .. code-block:: none struct cec_adap_ops { - /\* Low-level callbacks \*/ + /* Low-level callbacks */ ... - /\* High-level CEC message callback \*/ - int (\*received)(struct cec_adapter \*adap, struct cec_msg \*msg); + /* High-level CEC message callback */ + int (*received)(struct cec_adapter *adap, struct cec_msg *msg); }; The received() callback allows the driver to optionally handle a newly @@ -263,7 +273,7 @@ received CEC message If the driver wants to process a CEC message, then it can implement this callback. If it doesn't want to handle this message, then it should return -ENOMSG, otherwise the CEC framework assumes it processed this message and -it will not no anything with it. +it will not do anything with it. CEC framework functions diff --git a/Documentation/media/kapi/csi2.rst b/Documentation/media/kapi/csi2.rst new file mode 100644 index 000000000000..2004db00b12b --- /dev/null +++ b/Documentation/media/kapi/csi2.rst @@ -0,0 +1,61 @@ +MIPI CSI-2 +========== + +CSI-2 is a data bus intended for transferring images from cameras to +the host SoC. It is defined by the `MIPI alliance`_. + +.. _`MIPI alliance`: http://www.mipi.org/ + +Transmitter drivers +------------------- + +CSI-2 transmitter, such as a sensor or a TV tuner, drivers need to +provide the CSI-2 receiver with information on the CSI-2 bus +configuration. These include the V4L2_CID_LINK_FREQ and +V4L2_CID_PIXEL_RATE controls and +(:c:type:`v4l2_subdev_video_ops`->s_stream() callback). These +interface elements must be present on the sub-device represents the +CSI-2 transmitter. + +The V4L2_CID_LINK_FREQ control is used to tell the receiver driver the +frequency (and not the symbol rate) of the link. The +V4L2_CID_PIXEL_RATE is may be used by the receiver to obtain the pixel +rate the transmitter uses. The +:c:type:`v4l2_subdev_video_ops`->s_stream() callback provides an +ability to start and stop the stream. + +The value of the V4L2_CID_PIXEL_RATE is calculated as follows:: + + pixel_rate = link_freq * 2 * nr_of_lanes / bits_per_sample + +where + +.. list-table:: variables in pixel rate calculation + :header-rows: 1 + + * - variable or constant + - description + * - link_freq + - The value of the V4L2_CID_LINK_FREQ integer64 menu item. + * - nr_of_lanes + - Number of data lanes used on the CSI-2 link. This can + be obtained from the OF endpoint configuration. + * - 2 + - Two bits are transferred per clock cycle per lane. + * - bits_per_sample + - Number of bits per sample. + +The transmitter drivers must configure the CSI-2 transmitter to *LP-11 +mode* whenever the transmitter is powered on but not active. Some +transmitters do this automatically but some have to be explicitly +programmed to do so. + +Receiver drivers +---------------- + +Before the receiver driver may enable the CSI-2 transmitter by using +the :c:type:`v4l2_subdev_video_ops`->s_stream(), it must have powered +the transmitter up by using the +:c:type:`v4l2_subdev_core_ops`->s_power() callback. This may take +place either indirectly by using :c:func:`v4l2_pipeline_pm_use` or +directly. diff --git a/Documentation/media/kapi/dtv-core.rst b/Documentation/media/kapi/dtv-core.rst index a3c4642eabfc..ff86bf0abeae 100644 --- a/Documentation/media/kapi/dtv-core.rst +++ b/Documentation/media/kapi/dtv-core.rst @@ -8,14 +8,6 @@ Digital TV Common functions .. kernel-doc:: drivers/media/dvb-core/dvbdev.h - - -.. kernel-doc:: drivers/media/dvb-core/dvb_math.h - :export: drivers/media/dvb-core/dvb_math.c - -.. kernel-doc:: drivers/media/dvb-core/dvbdev.h - :export: drivers/media/dvb-core/dvbdev.c - Digital TV Ring buffer ---------------------- diff --git a/Documentation/media/media_kapi.rst b/Documentation/media/media_kapi.rst index f282ca270369..bc0638956a43 100644 --- a/Documentation/media/media_kapi.rst +++ b/Documentation/media/media_kapi.rst @@ -33,3 +33,4 @@ For more details see the file COPYING in the source distribution of Linux. kapi/rc-core kapi/mc-core kapi/cec-core + kapi/csi2 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\ No newline at end of file diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst b/Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst index a35dca281178..2b0ddb14b280 100644 --- a/Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst +++ b/Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst @@ -48,41 +48,21 @@ returns the information to the application. The ioctl never fails. :stub-columns: 0 :widths: 1 1 16 - - - .. row 1 - - - char - - - ``driver[32]`` - - - The name of the cec adapter driver. - - - .. row 2 - - - char - - - ``name[32]`` - - - The name of this CEC adapter. The combination ``driver`` and - ``name`` must be unique. - - - .. row 3 - - - __u32 - - - ``capabilities`` - - - The capabilities of the CEC adapter, see - :ref:`cec-capabilities`. - - - .. row 4 - - - __u32 - - - ``version`` - - - CEC Framework API version, formatted with the ``KERNEL_VERSION()`` - macro. + * - char + - ``driver[32]`` + - The name of the cec adapter driver. + * - char + - ``name[32]`` + - The name of this CEC adapter. The combination ``driver`` and + ``name`` must be unique. + * - __u32 + - ``capabilities`` + - The capabilities of the CEC adapter, see + :ref:`cec-capabilities`. + * - __u32 + - ``version`` + - CEC Framework API version, formatted with the ``KERNEL_VERSION()`` + macro. .. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.6cm}| @@ -94,68 +74,50 @@ returns the information to the application. The ioctl never fails. :stub-columns: 0 :widths: 3 1 8 - - - .. _`CEC-CAP-PHYS-ADDR`: - - - ``CEC_CAP_PHYS_ADDR`` - - - 0x00000001 - - - Userspace has to configure the physical address by calling - :ref:`ioctl CEC_ADAP_S_PHYS_ADDR <CEC_ADAP_S_PHYS_ADDR>`. If - this capability isn't set, then setting the physical address is - handled by the kernel whenever the EDID is set (for an HDMI - receiver) or read (for an HDMI transmitter). - - - .. _`CEC-CAP-LOG-ADDRS`: - - - ``CEC_CAP_LOG_ADDRS`` - - - 0x00000002 - - - Userspace has to configure the logical addresses by calling - :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>`. If - this capability isn't set, then the kernel will have configured - this. - - - .. _`CEC-CAP-TRANSMIT`: - - - ``CEC_CAP_TRANSMIT`` - - - 0x00000004 - - - Userspace can transmit CEC messages by calling - :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>`. This implies that - userspace can be a follower as well, since being able to transmit - messages is a prerequisite of becoming a follower. If this - capability isn't set, then the kernel will handle all CEC - transmits and process all CEC messages it receives. - - - .. _`CEC-CAP-PASSTHROUGH`: - - - ``CEC_CAP_PASSTHROUGH`` - - - 0x00000008 - - - Userspace can use the passthrough mode by calling - :ref:`ioctl CEC_S_MODE <CEC_S_MODE>`. - - - .. _`CEC-CAP-RC`: - - - ``CEC_CAP_RC`` - - - 0x00000010 - - - This adapter supports the remote control protocol. - - - .. _`CEC-CAP-MONITOR-ALL`: - - - ``CEC_CAP_MONITOR_ALL`` - - - 0x00000020 - - - The CEC hardware can monitor all messages, not just directed and - broadcast messages. + * .. _`CEC-CAP-PHYS-ADDR`: + + - ``CEC_CAP_PHYS_ADDR`` + - 0x00000001 + - Userspace has to configure the physical address by calling + :ref:`ioctl CEC_ADAP_S_PHYS_ADDR <CEC_ADAP_S_PHYS_ADDR>`. If + this capability isn't set, then setting the physical address is + handled by the kernel whenever the EDID is set (for an HDMI + receiver) or read (for an HDMI transmitter). + * .. _`CEC-CAP-LOG-ADDRS`: + + - ``CEC_CAP_LOG_ADDRS`` + - 0x00000002 + - Userspace has to configure the logical addresses by calling + :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>`. If + this capability isn't set, then the kernel will have configured + this. + * .. _`CEC-CAP-TRANSMIT`: + + - ``CEC_CAP_TRANSMIT`` + - 0x00000004 + - Userspace can transmit CEC messages by calling + :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>`. This implies that + userspace can be a follower as well, since being able to transmit + messages is a prerequisite of becoming a follower. If this + capability isn't set, then the kernel will handle all CEC + transmits and process all CEC messages it receives. + * .. _`CEC-CAP-PASSTHROUGH`: + + - ``CEC_CAP_PASSTHROUGH`` + - 0x00000008 + - Userspace can use the passthrough mode by calling + :ref:`ioctl CEC_S_MODE <CEC_S_MODE>`. + * .. _`CEC-CAP-RC`: + + - ``CEC_CAP_RC`` + - 0x00000010 + - This adapter supports the remote control protocol. + * .. _`CEC-CAP-MONITOR-ALL`: + + - ``CEC_CAP_MONITOR_ALL`` + - 0x00000020 + - The CEC hardware can monitor all messages, not just directed and + broadcast messages. diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst b/Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst index 940a16d8d55e..b878637e91b3 100644 --- a/Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst +++ b/Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst @@ -77,134 +77,79 @@ logical address types are already defined will return with error ``EBUSY``. :stub-columns: 0 :widths: 1 1 16 - - - .. row 1 - - - __u8 - - - ``log_addr[CEC_MAX_LOG_ADDRS]`` - - - The actual logical addresses that were claimed. This is set by the - driver. If no logical address could be claimed, then it is set to - ``CEC_LOG_ADDR_INVALID``. If this adapter is Unregistered, then - ``log_addr[0]`` is set to 0xf and all others to - ``CEC_LOG_ADDR_INVALID``. - - - .. row 2 - - - __u16 - - - ``log_addr_mask`` - - - The bitmask of all logical addresses this adapter has claimed. If - this adapter is Unregistered then ``log_addr_mask`` sets bit 15 - and clears all other bits. If this adapter is not configured at - all, then ``log_addr_mask`` is set to 0. Set by the driver. - - - .. row 3 - - - __u8 - - - ``cec_version`` - - - The CEC version that this adapter shall use. See - :ref:`cec-versions`. Used to implement the - ``CEC_MSG_CEC_VERSION`` and ``CEC_MSG_REPORT_FEATURES`` messages. - Note that :ref:`CEC_OP_CEC_VERSION_1_3A <CEC-OP-CEC-VERSION-1-3A>` is not allowed by the CEC - framework. - - - .. row 4 - - - __u8 - - - ``num_log_addrs`` - - - Number of logical addresses to set up. Must be ≤ - ``available_log_addrs`` as returned by - :ref:`CEC_ADAP_G_CAPS`. All arrays in - this structure are only filled up to index - ``available_log_addrs``-1. The remaining array elements will be - ignored. Note that the CEC 2.0 standard allows for a maximum of 2 - logical addresses, although some hardware has support for more. - ``CEC_MAX_LOG_ADDRS`` is 4. The driver will return the actual - number of logical addresses it could claim, which may be less than - what was requested. If this field is set to 0, then the CEC - adapter shall clear all claimed logical addresses and all other - fields will be ignored. - - - .. row 5 - - - __u32 - - - ``vendor_id`` - - - The vendor ID is a 24-bit number that identifies the specific - vendor or entity. Based on this ID vendor specific commands may be - defined. If you do not want a vendor ID then set it to - ``CEC_VENDOR_ID_NONE``. - - - .. row 6 - - - __u32 - - - ``flags`` - - - Flags. See :ref:`cec-log-addrs-flags` for a list of available flags. - - - .. row 7 - - - char - - - ``osd_name[15]`` - - - The On-Screen Display name as is returned by the - ``CEC_MSG_SET_OSD_NAME`` message. - - - .. row 8 - - - __u8 - - - ``primary_device_type[CEC_MAX_LOG_ADDRS]`` - - - Primary device type for each logical address. See - :ref:`cec-prim-dev-types` for possible types. - - - .. row 9 - - - __u8 - - - ``log_addr_type[CEC_MAX_LOG_ADDRS]`` - - - Logical address types. See :ref:`cec-log-addr-types` for - possible types. The driver will update this with the actual - logical address type that it claimed (e.g. it may have to fallback - to :ref:`CEC_LOG_ADDR_TYPE_UNREGISTERED <CEC-LOG-ADDR-TYPE-UNREGISTERED>`). - - - .. row 10 - - - __u8 - - - ``all_device_types[CEC_MAX_LOG_ADDRS]`` - - - CEC 2.0 specific: the bit mask of all device types. See - :ref:`cec-all-dev-types-flags`. It is used in the CEC 2.0 - ``CEC_MSG_REPORT_FEATURES`` message. For CEC 1.4 you can either leave - this field to 0, or fill it in according to the CEC 2.0 guidelines to - give the CEC framework more information about the device type, even - though the framework won't use it directly in the CEC message. - - - .. row 11 - - - __u8 - - - ``features[CEC_MAX_LOG_ADDRS][12]`` - - - Features for each logical address. It is used in the CEC 2.0 - ``CEC_MSG_REPORT_FEATURES`` message. The 12 bytes include both the - RC Profile and the Device Features. For CEC 1.4 you can either leave - this field to all 0, or fill it in according to the CEC 2.0 guidelines to - give the CEC framework more information about the device type, even - though the framework won't use it directly in the CEC message. + * - __u8 + - ``log_addr[CEC_MAX_LOG_ADDRS]`` + - The actual logical addresses that were claimed. This is set by the + driver. If no logical address could be claimed, then it is set to + ``CEC_LOG_ADDR_INVALID``. If this adapter is Unregistered, then + ``log_addr[0]`` is set to 0xf and all others to + ``CEC_LOG_ADDR_INVALID``. + * - __u16 + - ``log_addr_mask`` + - The bitmask of all logical addresses this adapter has claimed. If + this adapter is Unregistered then ``log_addr_mask`` sets bit 15 + and clears all other bits. If this adapter is not configured at + all, then ``log_addr_mask`` is set to 0. Set by the driver. + * - __u8 + - ``cec_version`` + - The CEC version that this adapter shall use. See + :ref:`cec-versions`. Used to implement the + ``CEC_MSG_CEC_VERSION`` and ``CEC_MSG_REPORT_FEATURES`` messages. + Note that :ref:`CEC_OP_CEC_VERSION_1_3A <CEC-OP-CEC-VERSION-1-3A>` is not allowed by the CEC + framework. + * - __u8 + - ``num_log_addrs`` + - Number of logical addresses to set up. Must be ≤ + ``available_log_addrs`` as returned by + :ref:`CEC_ADAP_G_CAPS`. All arrays in + this structure are only filled up to index + ``available_log_addrs``-1. The remaining array elements will be + ignored. Note that the CEC 2.0 standard allows for a maximum of 2 + logical addresses, although some hardware has support for more. + ``CEC_MAX_LOG_ADDRS`` is 4. The driver will return the actual + number of logical addresses it could claim, which may be less than + what was requested. If this field is set to 0, then the CEC + adapter shall clear all claimed logical addresses and all other + fields will be ignored. + * - __u32 + - ``vendor_id`` + - The vendor ID is a 24-bit number that identifies the specific + vendor or entity. Based on this ID vendor specific commands may be + defined. If you do not want a vendor ID then set it to + ``CEC_VENDOR_ID_NONE``. + * - __u32 + - ``flags`` + - Flags. See :ref:`cec-log-addrs-flags` for a list of available flags. + * - char + - ``osd_name[15]`` + - The On-Screen Display name as is returned by the + ``CEC_MSG_SET_OSD_NAME`` message. + * - __u8 + - ``primary_device_type[CEC_MAX_LOG_ADDRS]`` + - Primary device type for each logical address. See + :ref:`cec-prim-dev-types` for possible types. + * - __u8 + - ``log_addr_type[CEC_MAX_LOG_ADDRS]`` + - Logical address types. See :ref:`cec-log-addr-types` for + possible types. The driver will update this with the actual + logical address type that it claimed (e.g. it may have to fallback + to :ref:`CEC_LOG_ADDR_TYPE_UNREGISTERED <CEC-LOG-ADDR-TYPE-UNREGISTERED>`). + * - __u8 + - ``all_device_types[CEC_MAX_LOG_ADDRS]`` + - CEC 2.0 specific: the bit mask of all device types. See + :ref:`cec-all-dev-types-flags`. It is used in the CEC 2.0 + ``CEC_MSG_REPORT_FEATURES`` message. For CEC 1.4 you can either leave + this field to 0, or fill it in according to the CEC 2.0 guidelines to + give the CEC framework more information about the device type, even + though the framework won't use it directly in the CEC message. + * - __u8 + - ``features[CEC_MAX_LOG_ADDRS][12]`` + - Features for each logical address. It is used in the CEC 2.0 + ``CEC_MSG_REPORT_FEATURES`` message. The 12 bytes include both the + RC Profile and the Device Features. For CEC 1.4 you can either leave + this field to all 0, or fill it in according to the CEC 2.0 guidelines to + give the CEC framework more information about the device type, even + though the framework won't use it directly in the CEC message. .. _cec-log-addrs-flags: @@ -213,17 +158,33 @@ logical address types are already defined will return with error ``EBUSY``. :stub-columns: 0 :widths: 3 1 4 + * .. _`CEC-LOG-ADDRS-FL-ALLOW-UNREG-FALLBACK`: + + - ``CEC_LOG_ADDRS_FL_ALLOW_UNREG_FALLBACK`` + - 1 + - By default if no logical address of the requested type can be claimed, then + it will go back to the unconfigured state. If this flag is set, then it will + fallback to the Unregistered logical address. Note that if the Unregistered + logical address was explicitly requested, then this flag has no effect. + * .. _`CEC-LOG-ADDRS-FL-ALLOW-RC-PASSTHRU`: - - .. _`CEC-LOG-ADDRS-FL-ALLOW-UNREG-FALLBACK`: + - ``CEC_LOG_ADDRS_FL_ALLOW_RC_PASSTHRU`` + - 2 + - By default the ``CEC_MSG_USER_CONTROL_PRESSED`` and ``CEC_MSG_USER_CONTROL_RELEASED`` + messages are only passed on to the follower(s), if any. If this flag is set, + then these messages are also passed on to the remote control input subsystem + and will appear as keystrokes. This features needs to be enabled explicitly. + If CEC is used to enter e.g. passwords, then you may not want to enable this + to avoid trivial snooping of the keystrokes. + * .. _`CEC-LOG-ADDRS-FL-CDC-ONLY`: - - ``CEC_LOG_ADDRS_FL_ALLOW_UNREG_FALLBACK`` + - `CEC_LOG_ADDRS_FL_CDC_ONLY` + - 4 + - If this flag is set, then the device is CDC-Only. CDC-Only CEC devices + are CEC devices that can only handle CDC messages. - - 1 + All other messages are ignored. - - By default if no logical address of the requested type can be claimed, then - it will go back to the unconfigured state. If this flag is set, then it will - fallback to the Unregistered logical address. Note that if the Unregistered - logical address was explicitly requested, then this flag has no effect. .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| @@ -234,30 +195,21 @@ logical address types are already defined will return with error ``EBUSY``. :stub-columns: 0 :widths: 3 1 4 + * .. _`CEC-OP-CEC-VERSION-1-3A`: - - .. _`CEC-OP-CEC-VERSION-1-3A`: - - - ``CEC_OP_CEC_VERSION_1_3A`` - - - 4 - - - CEC version according to the HDMI 1.3a standard. - - - .. _`CEC-OP-CEC-VERSION-1-4B`: - - - ``CEC_OP_CEC_VERSION_1_4B`` + - ``CEC_OP_CEC_VERSION_1_3A`` + - 4 + - CEC version according to the HDMI 1.3a standard. + * .. _`CEC-OP-CEC-VERSION-1-4B`: - - 5 + - ``CEC_OP_CEC_VERSION_1_4B`` + - 5 + - CEC version according to the HDMI 1.4b standard. + * .. _`CEC-OP-CEC-VERSION-2-0`: - - CEC version according to the HDMI 1.4b standard. - - - .. _`CEC-OP-CEC-VERSION-2-0`: - - - ``CEC_OP_CEC_VERSION_2_0`` - - - 6 - - - CEC version according to the HDMI 2.0 standard. + - ``CEC_OP_CEC_VERSION_2_0`` + - 6 + - CEC version according to the HDMI 2.0 standard. .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| @@ -269,62 +221,41 @@ logical address types are already defined will return with error ``EBUSY``. :stub-columns: 0 :widths: 3 1 4 + * .. _`CEC-OP-PRIM-DEVTYPE-TV`: - - .. _`CEC-OP-PRIM-DEVTYPE-TV`: - - - ``CEC_OP_PRIM_DEVTYPE_TV`` - - - 0 - - - Use for a TV. + - ``CEC_OP_PRIM_DEVTYPE_TV`` + - 0 + - Use for a TV. + * .. _`CEC-OP-PRIM-DEVTYPE-RECORD`: - - .. _`CEC-OP-PRIM-DEVTYPE-RECORD`: + - ``CEC_OP_PRIM_DEVTYPE_RECORD`` + - 1 + - Use for a recording device. + * .. _`CEC-OP-PRIM-DEVTYPE-TUNER`: - - ``CEC_OP_PRIM_DEVTYPE_RECORD`` + - ``CEC_OP_PRIM_DEVTYPE_TUNER`` + - 3 + - Use for a device with a tuner. + * .. _`CEC-OP-PRIM-DEVTYPE-PLAYBACK`: - - 1 + - ``CEC_OP_PRIM_DEVTYPE_PLAYBACK`` + - 4 + - Use for a playback device. + * .. _`CEC-OP-PRIM-DEVTYPE-AUDIOSYSTEM`: - - Use for a recording device. + - ``CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM`` + - 5 + - Use for an audio system (e.g. an audio/video receiver). + * .. _`CEC-OP-PRIM-DEVTYPE-SWITCH`: - - .. _`CEC-OP-PRIM-DEVTYPE-TUNER`: + - ``CEC_OP_PRIM_DEVTYPE_SWITCH`` + - 6 + - Use for a CEC switch. + * .. _`CEC-OP-PRIM-DEVTYPE-VIDEOPROC`: - - ``CEC_OP_PRIM_DEVTYPE_TUNER`` - - - 3 - - - Use for a device with a tuner. - - - .. _`CEC-OP-PRIM-DEVTYPE-PLAYBACK`: - - - ``CEC_OP_PRIM_DEVTYPE_PLAYBACK`` - - - 4 - - - Use for a playback device. - - - .. _`CEC-OP-PRIM-DEVTYPE-AUDIOSYSTEM`: - - - ``CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM`` - - - 5 - - - Use for an audio system (e.g. an audio/video receiver). - - - .. _`CEC-OP-PRIM-DEVTYPE-SWITCH`: - - - ``CEC_OP_PRIM_DEVTYPE_SWITCH`` - - - 6 - - - Use for a CEC switch. - - - .. _`CEC-OP-PRIM-DEVTYPE-VIDEOPROC`: - - - ``CEC_OP_PRIM_DEVTYPE_VIDEOPROC`` - - - 7 - - - Use for a video processor device. + - ``CEC_OP_PRIM_DEVTYPE_VIDEOPROC`` + - 7 + - Use for a video processor device. .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| @@ -336,64 +267,43 @@ logical address types are already defined will return with error ``EBUSY``. :stub-columns: 0 :widths: 3 1 16 + * .. _`CEC-LOG-ADDR-TYPE-TV`: - - .. _`CEC-LOG-ADDR-TYPE-TV`: - - - ``CEC_LOG_ADDR_TYPE_TV`` - - - 0 - - - Use for a TV. - - - .. _`CEC-LOG-ADDR-TYPE-RECORD`: - - - ``CEC_LOG_ADDR_TYPE_RECORD`` - - - 1 - - - Use for a recording device. - - - .. _`CEC-LOG-ADDR-TYPE-TUNER`: - - - ``CEC_LOG_ADDR_TYPE_TUNER`` - - - 2 - - - Use for a tuner device. + - ``CEC_LOG_ADDR_TYPE_TV`` + - 0 + - Use for a TV. + * .. _`CEC-LOG-ADDR-TYPE-RECORD`: - - .. _`CEC-LOG-ADDR-TYPE-PLAYBACK`: + - ``CEC_LOG_ADDR_TYPE_RECORD`` + - 1 + - Use for a recording device. + * .. _`CEC-LOG-ADDR-TYPE-TUNER`: - - ``CEC_LOG_ADDR_TYPE_PLAYBACK`` + - ``CEC_LOG_ADDR_TYPE_TUNER`` + - 2 + - Use for a tuner device. + * .. _`CEC-LOG-ADDR-TYPE-PLAYBACK`: - - 3 + - ``CEC_LOG_ADDR_TYPE_PLAYBACK`` + - 3 + - Use for a playback device. + * .. _`CEC-LOG-ADDR-TYPE-AUDIOSYSTEM`: - - Use for a playback device. + - ``CEC_LOG_ADDR_TYPE_AUDIOSYSTEM`` + - 4 + - Use for an audio system device. + * .. _`CEC-LOG-ADDR-TYPE-SPECIFIC`: - - .. _`CEC-LOG-ADDR-TYPE-AUDIOSYSTEM`: + - ``CEC_LOG_ADDR_TYPE_SPECIFIC`` + - 5 + - Use for a second TV or for a video processor device. + * .. _`CEC-LOG-ADDR-TYPE-UNREGISTERED`: - - ``CEC_LOG_ADDR_TYPE_AUDIOSYSTEM`` - - - 4 - - - Use for an audio system device. - - - .. _`CEC-LOG-ADDR-TYPE-SPECIFIC`: - - - ``CEC_LOG_ADDR_TYPE_SPECIFIC`` - - - 5 - - - Use for a second TV or for a video processor device. - - - .. _`CEC-LOG-ADDR-TYPE-UNREGISTERED`: - - - ``CEC_LOG_ADDR_TYPE_UNREGISTERED`` - - - 6 - - - Use this if you just want to remain unregistered. Used for pure - CEC switches or CDC-only devices (CDC: Capability Discovery and - Control). + - ``CEC_LOG_ADDR_TYPE_UNREGISTERED`` + - 6 + - Use this if you just want to remain unregistered. Used for pure + CEC switches or CDC-only devices (CDC: Capability Discovery and + Control). @@ -406,54 +316,36 @@ logical address types are already defined will return with error ``EBUSY``. :stub-columns: 0 :widths: 3 1 4 + * .. _`CEC-OP-ALL-DEVTYPE-TV`: - - .. _`CEC-OP-ALL-DEVTYPE-TV`: - - - ``CEC_OP_ALL_DEVTYPE_TV`` - - - 0x80 - - - This supports the TV type. - - - .. _`CEC-OP-ALL-DEVTYPE-RECORD`: - - - ``CEC_OP_ALL_DEVTYPE_RECORD`` - - - 0x40 - - - This supports the Recording type. - - - .. _`CEC-OP-ALL-DEVTYPE-TUNER`: - - - ``CEC_OP_ALL_DEVTYPE_TUNER`` - - - 0x20 - - - This supports the Tuner type. - - - .. _`CEC-OP-ALL-DEVTYPE-PLAYBACK`: - - - ``CEC_OP_ALL_DEVTYPE_PLAYBACK`` - - - 0x10 - - - This supports the Playback type. - - - .. _`CEC-OP-ALL-DEVTYPE-AUDIOSYSTEM`: - - - ``CEC_OP_ALL_DEVTYPE_AUDIOSYSTEM`` - - - 0x08 + - ``CEC_OP_ALL_DEVTYPE_TV`` + - 0x80 + - This supports the TV type. + * .. _`CEC-OP-ALL-DEVTYPE-RECORD`: - - This supports the Audio System type. + - ``CEC_OP_ALL_DEVTYPE_RECORD`` + - 0x40 + - This supports the Recording type. + * .. _`CEC-OP-ALL-DEVTYPE-TUNER`: - - .. _`CEC-OP-ALL-DEVTYPE-SWITCH`: + - ``CEC_OP_ALL_DEVTYPE_TUNER`` + - 0x20 + - This supports the Tuner type. + * .. _`CEC-OP-ALL-DEVTYPE-PLAYBACK`: - - ``CEC_OP_ALL_DEVTYPE_SWITCH`` + - ``CEC_OP_ALL_DEVTYPE_PLAYBACK`` + - 0x10 + - This supports the Playback type. + * .. _`CEC-OP-ALL-DEVTYPE-AUDIOSYSTEM`: - - 0x04 + - ``CEC_OP_ALL_DEVTYPE_AUDIOSYSTEM`` + - 0x08 + - This supports the Audio System type. + * .. _`CEC-OP-ALL-DEVTYPE-SWITCH`: - - This supports the CEC Switch or Video Processing type. + - ``CEC_OP_ALL_DEVTYPE_SWITCH`` + - 0x04 + - This supports the CEC Switch or Video Processing type. diff --git a/Documentation/media/uapi/cec/cec-ioc-dqevent.rst b/Documentation/media/uapi/cec/cec-ioc-dqevent.rst index e283588a830b..e256c6605de7 100644 --- a/Documentation/media/uapi/cec/cec-ioc-dqevent.rst +++ b/Documentation/media/uapi/cec/cec-ioc-dqevent.rst @@ -58,26 +58,16 @@ it is guaranteed that the state did change in between the two events. :stub-columns: 0 :widths: 1 1 8 - - - .. row 1 - - - __u16 - - - ``phys_addr`` - - - The current physical address. This is ``CEC_PHYS_ADDR_INVALID`` if no + * - __u16 + - ``phys_addr`` + - The current physical address. This is ``CEC_PHYS_ADDR_INVALID`` if no valid physical address is set. - - - .. row 2 - - - __u16 - - - ``log_addr_mask`` - - - The current set of claimed logical addresses. This is 0 if no logical - addresses are claimed or if ``phys_addr`` is ``CEC_PHYS_ADDR_INVALID``. - If bit 15 is set (``1 << CEC_LOG_ADDR_UNREGISTERED``) then this device - has the unregistered logical address. In that case all other bits are 0. + * - __u16 + - ``log_addr_mask`` + - The current set of claimed logical addresses. This is 0 if no logical + addresses are claimed or if ``phys_addr`` is ``CEC_PHYS_ADDR_INVALID``. + If bit 15 is set (``1 << CEC_LOG_ADDR_UNREGISTERED``) then this device + has the unregistered logical address. In that case all other bits are 0. .. c:type:: cec_event_lost_msgs @@ -89,22 +79,17 @@ it is guaranteed that the state did change in between the two events. :stub-columns: 0 :widths: 1 1 16 - - - .. row 1 - - - __u32 - - - ``lost_msgs`` - - - Set to the number of lost messages since the filehandle was opened - or since the last time this event was dequeued for this - filehandle. The messages lost are the oldest messages. So when a - new message arrives and there is no more room, then the oldest - message is discarded to make room for the new one. The internal - size of the message queue guarantees that all messages received in - the last two seconds will be stored. Since messages should be - replied to within a second according to the CEC specification, - this is more than enough. + * - __u32 + - ``lost_msgs`` + - Set to the number of lost messages since the filehandle was opened + or since the last time this event was dequeued for this + filehandle. The messages lost are the oldest messages. So when a + new message arrives and there is no more room, then the oldest + message is discarded to make room for the new one. The internal + size of the message queue guarantees that all messages received in + the last two seconds will be stored. Since messages should be + replied to within a second according to the CEC specification, + this is more than enough. .. tabularcolumns:: |p{1.0cm}|p{4.2cm}|p{2.5cm}|p{8.8cm}| @@ -116,62 +101,32 @@ it is guaranteed that the state did change in between the two events. :stub-columns: 0 :widths: 1 1 1 8 - - - .. row 1 - - - __u64 - - - ``ts`` - - - :cspan:`1` Timestamp of the event in ns. - - The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access - the same clock from userspace use :c:func:`clock_gettime`. - - - .. row 2 - - - __u32 - - - ``event`` - - - :cspan:`1` The CEC event type, see :ref:`cec-events`. - - - .. row 3 - - - __u32 - - - ``flags`` - - - :cspan:`1` Event flags, see :ref:`cec-event-flags`. - - - .. row 4 - - - union - - - (anonymous) - - - - - - - - .. row 5 - - - - - struct cec_event_state_change - - - ``state_change`` - - - The new adapter state as sent by the :ref:`CEC_EVENT_STATE_CHANGE <CEC-EVENT-STATE-CHANGE>` - event. - - - .. row 6 - - - - - struct cec_event_lost_msgs - - - ``lost_msgs`` - - - The number of lost messages as sent by the :ref:`CEC_EVENT_LOST_MSGS <CEC-EVENT-LOST-MSGS>` - event. + * - __u64 + - ``ts`` + - :cspan:`1` Timestamp of the event in ns. + + The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access + the same clock from userspace use :c:func:`clock_gettime`. + * - __u32 + - ``event`` + - :cspan:`1` The CEC event type, see :ref:`cec-events`. + * - __u32 + - ``flags`` + - :cspan:`1` Event flags, see :ref:`cec-event-flags`. + * - union + - (anonymous) + - + - + * - + - struct cec_event_state_change + - ``state_change`` + - The new adapter state as sent by the :ref:`CEC_EVENT_STATE_CHANGE <CEC-EVENT-STATE-CHANGE>` + event. + * - + - struct cec_event_lost_msgs + - ``lost_msgs`` + - The number of lost messages as sent by the :ref:`CEC_EVENT_LOST_MSGS <CEC-EVENT-LOST-MSGS>` + event. .. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}| @@ -183,25 +138,19 @@ it is guaranteed that the state did change in between the two events. :stub-columns: 0 :widths: 3 1 16 + * .. _`CEC-EVENT-STATE-CHANGE`: - - .. _`CEC-EVENT-STATE-CHANGE`: - - - ``CEC_EVENT_STATE_CHANGE`` - - - 1 - - - Generated when the CEC Adapter's state changes. When open() is - called an initial event will be generated for that filehandle with - the CEC Adapter's state at that time. - - - .. _`CEC-EVENT-LOST-MSGS`: + - ``CEC_EVENT_STATE_CHANGE`` + - 1 + - Generated when the CEC Adapter's state changes. When open() is + called an initial event will be generated for that filehandle with + the CEC Adapter's state at that time. + * .. _`CEC-EVENT-LOST-MSGS`: - - ``CEC_EVENT_LOST_MSGS`` - - - 2 - - - Generated if one or more CEC messages were lost because the - application didn't dequeue CEC messages fast enough. + - ``CEC_EVENT_LOST_MSGS`` + - 2 + - Generated if one or more CEC messages were lost because the + application didn't dequeue CEC messages fast enough. .. tabularcolumns:: |p{6.0cm}|p{0.6cm}|p{10.9cm}| @@ -213,17 +162,14 @@ it is guaranteed that the state did change in between the two events. :stub-columns: 0 :widths: 3 1 8 + * .. _`CEC-EVENT-FL-INITIAL-VALUE`: - - .. _`CEC-EVENT-FL-INITIAL-VALUE`: - - - ``CEC_EVENT_FL_INITIAL_VALUE`` - - - 1 - - - Set for the initial events that are generated when the device is - opened. See the table above for which events do this. This allows - applications to learn the initial state of the CEC adapter at - open() time. + - ``CEC_EVENT_FL_INITIAL_VALUE`` + - 1 + - Set for the initial events that are generated when the device is + opened. See the table above for which events do this. This allows + applications to learn the initial state of the CEC adapter at + open() time. diff --git a/Documentation/media/uapi/cec/cec-ioc-g-mode.rst b/Documentation/media/uapi/cec/cec-ioc-g-mode.rst index 70a41902ab58..4f5818b9d277 100644 --- a/Documentation/media/uapi/cec/cec-ioc-g-mode.rst +++ b/Documentation/media/uapi/cec/cec-ioc-g-mode.rst @@ -83,37 +83,28 @@ Available initiator modes are: :stub-columns: 0 :widths: 3 1 16 - - - .. _`CEC-MODE-NO-INITIATOR`: - - - ``CEC_MODE_NO_INITIATOR`` - - - 0x0 - - - This is not an initiator, i.e. it cannot transmit CEC messages or - make any other changes to the CEC adapter. - - - .. _`CEC-MODE-INITIATOR`: - - - ``CEC_MODE_INITIATOR`` - - - 0x1 - - - This is an initiator (the default when the device is opened) and - it can transmit CEC messages and make changes to the CEC adapter, - unless there is an exclusive initiator. - - - .. _`CEC-MODE-EXCL-INITIATOR`: - - - ``CEC_MODE_EXCL_INITIATOR`` - - - 0x2 - - - This is an exclusive initiator and this file descriptor is the - only one that can transmit CEC messages and make changes to the - CEC adapter. If someone else is already the exclusive initiator - then an attempt to become one will return the ``EBUSY`` error code - error. + * .. _`CEC-MODE-NO-INITIATOR`: + + - ``CEC_MODE_NO_INITIATOR`` + - 0x0 + - This is not an initiator, i.e. it cannot transmit CEC messages or + make any other changes to the CEC adapter. + * .. _`CEC-MODE-INITIATOR`: + + - ``CEC_MODE_INITIATOR`` + - 0x1 + - This is an initiator (the default when the device is opened) and + it can transmit CEC messages and make changes to the CEC adapter, + unless there is an exclusive initiator. + * .. _`CEC-MODE-EXCL-INITIATOR`: + + - ``CEC_MODE_EXCL_INITIATOR`` + - 0x2 + - This is an exclusive initiator and this file descriptor is the + only one that can transmit CEC messages and make changes to the + CEC adapter. If someone else is already the exclusive initiator + then an attempt to become one will return the ``EBUSY`` error code + error. Available follower modes are: @@ -127,86 +118,68 @@ Available follower modes are: :stub-columns: 0 :widths: 3 1 16 - - - .. _`CEC-MODE-NO-FOLLOWER`: - - - ``CEC_MODE_NO_FOLLOWER`` - - - 0x00 - - - This is not a follower (the default when the device is opened). - - - .. _`CEC-MODE-FOLLOWER`: - - - ``CEC_MODE_FOLLOWER`` - - - 0x10 - - - This is a follower and it will receive CEC messages unless there - is an exclusive follower. You cannot become a follower if - :ref:`CEC_CAP_TRANSMIT <CEC-CAP-TRANSMIT>` is not set or if :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>` - was specified, the ``EINVAL`` error code is returned in that case. - - - .. _`CEC-MODE-EXCL-FOLLOWER`: - - - ``CEC_MODE_EXCL_FOLLOWER`` - - - 0x20 - - - This is an exclusive follower and only this file descriptor will - receive CEC messages for processing. If someone else is already - the exclusive follower then an attempt to become one will return - the ``EBUSY`` error code. You cannot become a follower if - :ref:`CEC_CAP_TRANSMIT <CEC-CAP-TRANSMIT>` is not set or if :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>` - was specified, the ``EINVAL`` error code is returned in that case. - - - .. _`CEC-MODE-EXCL-FOLLOWER-PASSTHRU`: - - - ``CEC_MODE_EXCL_FOLLOWER_PASSTHRU`` - - - 0x30 - - - This is an exclusive follower and only this file descriptor will - receive CEC messages for processing. In addition it will put the - CEC device into passthrough mode, allowing the exclusive follower - to handle most core messages instead of relying on the CEC - framework for that. If someone else is already the exclusive - follower then an attempt to become one will return the ``EBUSY`` error - code. You cannot become a follower if :ref:`CEC_CAP_TRANSMIT <CEC-CAP-TRANSMIT>` - is not set or if :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>` was specified, - the ``EINVAL`` error code is returned in that case. - - - .. _`CEC-MODE-MONITOR`: - - - ``CEC_MODE_MONITOR`` - - - 0xe0 - - - Put the file descriptor into monitor mode. Can only be used in - combination with :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>`, otherwise EINVAL error - code will be returned. In monitor mode all messages this CEC - device transmits and all messages it receives (both broadcast - messages and directed messages for one its logical addresses) will - be reported. This is very useful for debugging. This is only - allowed if the process has the ``CAP_NET_ADMIN`` capability. If - that is not set, then the ``EPERM`` error code is returned. - - - .. _`CEC-MODE-MONITOR-ALL`: - - - ``CEC_MODE_MONITOR_ALL`` - - - 0xf0 - - - Put the file descriptor into 'monitor all' mode. Can only be used - in combination with :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>`, otherwise - the ``EINVAL`` error code will be returned. In 'monitor all' mode all messages - this CEC device transmits and all messages it receives, including - directed messages for other CEC devices will be reported. This is - very useful for debugging, but not all devices support this. This - mode requires that the :ref:`CEC_CAP_MONITOR_ALL <CEC-CAP-MONITOR-ALL>` capability is set, - otherwise the ``EINVAL`` error code is returned. This is only allowed if - the process has the ``CAP_NET_ADMIN`` capability. If that is not - set, then the ``EPERM`` error code is returned. + * .. _`CEC-MODE-NO-FOLLOWER`: + + - ``CEC_MODE_NO_FOLLOWER`` + - 0x00 + - This is not a follower (the default when the device is opened). + * .. _`CEC-MODE-FOLLOWER`: + + - ``CEC_MODE_FOLLOWER`` + - 0x10 + - This is a follower and it will receive CEC messages unless there + is an exclusive follower. You cannot become a follower if + :ref:`CEC_CAP_TRANSMIT <CEC-CAP-TRANSMIT>` is not set or if :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>` + was specified, the ``EINVAL`` error code is returned in that case. + * .. _`CEC-MODE-EXCL-FOLLOWER`: + + - ``CEC_MODE_EXCL_FOLLOWER`` + - 0x20 + - This is an exclusive follower and only this file descriptor will + receive CEC messages for processing. If someone else is already + the exclusive follower then an attempt to become one will return + the ``EBUSY`` error code. You cannot become a follower if + :ref:`CEC_CAP_TRANSMIT <CEC-CAP-TRANSMIT>` is not set or if :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>` + was specified, the ``EINVAL`` error code is returned in that case. + * .. _`CEC-MODE-EXCL-FOLLOWER-PASSTHRU`: + + - ``CEC_MODE_EXCL_FOLLOWER_PASSTHRU`` + - 0x30 + - This is an exclusive follower and only this file descriptor will + receive CEC messages for processing. In addition it will put the + CEC device into passthrough mode, allowing the exclusive follower + to handle most core messages instead of relying on the CEC + framework for that. If someone else is already the exclusive + follower then an attempt to become one will return the ``EBUSY`` error + code. You cannot become a follower if :ref:`CEC_CAP_TRANSMIT <CEC-CAP-TRANSMIT>` + is not set or if :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>` was specified, + the ``EINVAL`` error code is returned in that case. + * .. _`CEC-MODE-MONITOR`: + + - ``CEC_MODE_MONITOR`` + - 0xe0 + - Put the file descriptor into monitor mode. Can only be used in + combination with :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>`, otherwise EINVAL error + code will be returned. In monitor mode all messages this CEC + device transmits and all messages it receives (both broadcast + messages and directed messages for one its logical addresses) will + be reported. This is very useful for debugging. This is only + allowed if the process has the ``CAP_NET_ADMIN`` capability. If + that is not set, then the ``EPERM`` error code is returned. + * .. _`CEC-MODE-MONITOR-ALL`: + + - ``CEC_MODE_MONITOR_ALL`` + - 0xf0 + - Put the file descriptor into 'monitor all' mode. Can only be used + in combination with :ref:`CEC_MODE_NO_INITIATOR <CEC-MODE-NO-INITIATOR>`, otherwise + the ``EINVAL`` error code will be returned. In 'monitor all' mode all messages + this CEC device transmits and all messages it receives, including + directed messages for other CEC devices will be reported. This is + very useful for debugging, but not all devices support this. This + mode requires that the :ref:`CEC_CAP_MONITOR_ALL <CEC-CAP-MONITOR-ALL>` capability is set, + otherwise the ``EINVAL`` error code is returned. This is only allowed if + the process has the ``CAP_NET_ADMIN`` capability. If that is not + set, then the ``EPERM`` error code is returned. Core message processing details: @@ -220,76 +193,58 @@ Core message processing details: :stub-columns: 0 :widths: 1 8 - - - .. _`CEC-MSG-GET-CEC-VERSION`: - - - ``CEC_MSG_GET_CEC_VERSION`` - - - When in passthrough mode this message has to be handled by - userspace, otherwise the core will return the CEC version that was - set with :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>`. - - - .. _`CEC-MSG-GIVE-DEVICE-VENDOR-ID`: - - - ``CEC_MSG_GIVE_DEVICE_VENDOR_ID`` - - - When in passthrough mode this message has to be handled by - userspace, otherwise the core will return the vendor ID that was - set with :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>`. - - - .. _`CEC-MSG-ABORT`: - - - ``CEC_MSG_ABORT`` - - - When in passthrough mode this message has to be handled by - userspace, otherwise the core will return a feature refused - message as per the specification. - - - .. _`CEC-MSG-GIVE-PHYSICAL-ADDR`: - - - ``CEC_MSG_GIVE_PHYSICAL_ADDR`` - - - When in passthrough mode this message has to be handled by - userspace, otherwise the core will report the current physical - address. - - - .. _`CEC-MSG-GIVE-OSD-NAME`: - - - ``CEC_MSG_GIVE_OSD_NAME`` - - - When in passthrough mode this message has to be handled by - userspace, otherwise the core will report the current OSD name as - was set with :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>`. - - - .. _`CEC-MSG-GIVE-FEATURES`: - - - ``CEC_MSG_GIVE_FEATURES`` - - - When in passthrough mode this message has to be handled by - userspace, otherwise the core will report the current features as - was set with :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>` - or the message is ignored if the CEC version was older than 2.0. - - - .. _`CEC-MSG-USER-CONTROL-PRESSED`: - - - ``CEC_MSG_USER_CONTROL_PRESSED`` - - - If :ref:`CEC_CAP_RC <CEC-CAP-RC>` is set, then generate a remote control key - press. This message is always passed on to userspace. - - - .. _`CEC-MSG-USER-CONTROL-RELEASED`: - - - ``CEC_MSG_USER_CONTROL_RELEASED`` - - - If :ref:`CEC_CAP_RC <CEC-CAP-RC>` is set, then generate a remote control key - release. This message is always passed on to userspace. - - - .. _`CEC-MSG-REPORT-PHYSICAL-ADDR`: - - - ``CEC_MSG_REPORT_PHYSICAL_ADDR`` - - - The CEC framework will make note of the reported physical address - and then just pass the message on to userspace. + * .. _`CEC-MSG-GET-CEC-VERSION`: + + - ``CEC_MSG_GET_CEC_VERSION`` + - When in passthrough mode this message has to be handled by + userspace, otherwise the core will return the CEC version that was + set with :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>`. + * .. _`CEC-MSG-GIVE-DEVICE-VENDOR-ID`: + + - ``CEC_MSG_GIVE_DEVICE_VENDOR_ID`` + - When in passthrough mode this message has to be handled by + userspace, otherwise the core will return the vendor ID that was + set with :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>`. + * .. _`CEC-MSG-ABORT`: + + - ``CEC_MSG_ABORT`` + - When in passthrough mode this message has to be handled by + userspace, otherwise the core will return a feature refused + message as per the specification. + * .. _`CEC-MSG-GIVE-PHYSICAL-ADDR`: + + - ``CEC_MSG_GIVE_PHYSICAL_ADDR`` + - When in passthrough mode this message has to be handled by + userspace, otherwise the core will report the current physical + address. + * .. _`CEC-MSG-GIVE-OSD-NAME`: + + - ``CEC_MSG_GIVE_OSD_NAME`` + - When in passthrough mode this message has to be handled by + userspace, otherwise the core will report the current OSD name as + was set with :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>`. + * .. _`CEC-MSG-GIVE-FEATURES`: + + - ``CEC_MSG_GIVE_FEATURES`` + - When in passthrough mode this message has to be handled by + userspace, otherwise the core will report the current features as + was set with :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_ADDRS>` + or the message is ignored if the CEC version was older than 2.0. + * .. _`CEC-MSG-USER-CONTROL-PRESSED`: + + - ``CEC_MSG_USER_CONTROL_PRESSED`` + - If :ref:`CEC_CAP_RC <CEC-CAP-RC>` is set, then generate a remote control key + press. This message is always passed on to userspace. + * .. _`CEC-MSG-USER-CONTROL-RELEASED`: + + - ``CEC_MSG_USER_CONTROL_RELEASED`` + - If :ref:`CEC_CAP_RC <CEC-CAP-RC>` is set, then generate a remote control key + release. This message is always passed on to userspace. + * .. _`CEC-MSG-REPORT-PHYSICAL-ADDR`: + + - ``CEC_MSG_REPORT_PHYSICAL_ADDR`` + - The CEC framework will make note of the reported physical address + and then just pass the message on to userspace. diff --git a/Documentation/media/uapi/cec/cec-ioc-receive.rst b/Documentation/media/uapi/cec/cec-ioc-receive.rst index d585b1bba6ac..bdf015b1d1dc 100644 --- a/Documentation/media/uapi/cec/cec-ioc-receive.rst +++ b/Documentation/media/uapi/cec/cec-ioc-receive.rst @@ -86,173 +86,126 @@ result. :stub-columns: 0 :widths: 1 1 16 + * - __u64 + - ``tx_ts`` + - Timestamp in ns of when the last byte of the message was transmitted. + The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access + the same clock from userspace use :c:func:`clock_gettime`. + * - __u64 + - ``rx_ts`` + - Timestamp in ns of when the last byte of the message was received. + The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access + the same clock from userspace use :c:func:`clock_gettime`. + * - __u32 + - ``len`` + - The length of the message. For :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>` this is filled in + by the application. The driver will fill this in for + :ref:`ioctl CEC_RECEIVE <CEC_RECEIVE>`. For :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>` it will be + filled in by the driver with the length of the reply message if ``reply`` was set. + * - __u32 + - ``timeout`` + - The timeout in milliseconds. This is the time the device will wait + for a message to be received before timing out. If it is set to 0, + then it will wait indefinitely when it is called by :ref:`ioctl CEC_RECEIVE <CEC_RECEIVE>`. + If it is 0 and it is called by :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>`, + then it will be replaced by 1000 if the ``reply`` is non-zero or + ignored if ``reply`` is 0. + * - __u32 + - ``sequence`` + - A non-zero sequence number is automatically assigned by the CEC framework + for all transmitted messages. It is used by the CEC framework when it queues + the transmit result (when transmit was called in non-blocking mode). This + allows the application to associate the received message with the original + transmit. + * - __u32 + - ``flags`` + - Flags. See :ref:`cec-msg-flags` for a list of available flags. + * - __u8 + - ``tx_status`` + - The status bits of the transmitted message. See + :ref:`cec-tx-status` for the possible status values. It is 0 if + this messages was received, not transmitted. + * - __u8 + - ``msg[16]`` + - The message payload. For :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>` this is filled in by the + application. The driver will fill this in for :ref:`ioctl CEC_RECEIVE <CEC_RECEIVE>`. + For :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>` it will be filled in by the driver with + the payload of the reply message if ``timeout`` was set. + * - __u8 + - ``reply`` + - Wait until this message is replied. If ``reply`` is 0 and the + ``timeout`` is 0, then don't wait for a reply but return after + transmitting the message. Ignored by :ref:`ioctl CEC_RECEIVE <CEC_RECEIVE>`. + The case where ``reply`` is 0 (this is the opcode for the Feature Abort + message) and ``timeout`` is non-zero is specifically allowed to make it + possible to send a message and wait up to ``timeout`` milliseconds for a + Feature Abort reply. In this case ``rx_status`` will either be set + to :ref:`CEC_RX_STATUS_TIMEOUT <CEC-RX-STATUS-TIMEOUT>` or + :ref:`CEC_RX_STATUS_FEATURE_ABORT <CEC-RX-STATUS-FEATURE-ABORT>`. + + If the transmitter message is ``CEC_MSG_INITIATE_ARC`` then the ``reply`` + values ``CEC_MSG_REPORT_ARC_INITIATED`` and ``CEC_MSG_REPORT_ARC_TERMINATED`` + are processed differently: either value will match both possible replies. + The reason is that the ``CEC_MSG_INITIATE_ARC`` message is the only CEC + message that has two possible replies other than Feature Abort. The + ``reply`` field will be updated with the actual reply so that it is + synchronized with the contents of the received message. + * - __u8 + - ``rx_status`` + - The status bits of the received message. See + :ref:`cec-rx-status` for the possible status values. It is 0 if + this message was transmitted, not received, unless this is the + reply to a transmitted message. In that case both ``rx_status`` + and ``tx_status`` are set. + * - __u8 + - ``tx_status`` + - The status bits of the transmitted message. See + :ref:`cec-tx-status` for the possible status values. It is 0 if + this messages was received, not transmitted. + * - __u8 + - ``tx_arb_lost_cnt`` + - A counter of the number of transmit attempts that resulted in the + Arbitration Lost error. This is only set if the hardware supports + this, otherwise it is always 0. This counter is only valid if the + :ref:`CEC_TX_STATUS_ARB_LOST <CEC-TX-STATUS-ARB-LOST>` status bit is set. + * - __u8 + - ``tx_nack_cnt`` + - A counter of the number of transmit attempts that resulted in the + Not Acknowledged error. This is only set if the hardware supports + this, otherwise it is always 0. This counter is only valid if the + :ref:`CEC_TX_STATUS_NACK <CEC-TX-STATUS-NACK>` status bit is set. + * - __u8 + - ``tx_low_drive_cnt`` + - A counter of the number of transmit attempts that resulted in the + Arbitration Lost error. This is only set if the hardware supports + this, otherwise it is always 0. This counter is only valid if the + :ref:`CEC_TX_STATUS_LOW_DRIVE <CEC-TX-STATUS-LOW-DRIVE>` status bit is set. + * - __u8 + - ``tx_error_cnt`` + - A counter of the number of transmit errors other than Arbitration + Lost or Not Acknowledged. This is only set if the hardware + supports this, otherwise it is always 0. This counter is only + valid if the :ref:`CEC_TX_STATUS_ERROR <CEC-TX-STATUS-ERROR>` status bit is set. + + +.. _cec-msg-flags: + +.. flat-table:: Flags for struct cec_msg + :header-rows: 0 + :stub-columns: 0 + :widths: 3 1 4 - - .. row 1 - - - __u64 - - - ``tx_ts`` - - - Timestamp in ns of when the last byte of the message was transmitted. - The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access - the same clock from userspace use :c:func:`clock_gettime`. - - - .. row 2 - - - __u64 - - - ``rx_ts`` - - - Timestamp in ns of when the last byte of the message was received. - The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access - the same clock from userspace use :c:func:`clock_gettime`. - - - .. row 3 - - - __u32 - - - ``len`` - - - The length of the message. For :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>` this is filled in - by the application. The driver will fill this in for - :ref:`ioctl CEC_RECEIVE <CEC_RECEIVE>`. For :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>` it will be - filled in by the driver with the length of the reply message if ``reply`` was set. - - - .. row 4 - - - __u32 - - - ``timeout`` - - - The timeout in milliseconds. This is the time the device will wait - for a message to be received before timing out. If it is set to 0, - then it will wait indefinitely when it is called by :ref:`ioctl CEC_RECEIVE <CEC_RECEIVE>`. - If it is 0 and it is called by :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>`, - then it will be replaced by 1000 if the ``reply`` is non-zero or - ignored if ``reply`` is 0. - - - .. row 5 - - - __u32 - - - ``sequence`` - - - A non-zero sequence number is automatically assigned by the CEC framework - for all transmitted messages. It is used by the CEC framework when it queues - the transmit result (when transmit was called in non-blocking mode). This - allows the application to associate the received message with the original - transmit. - - - .. row 6 - - - __u32 - - - ``flags`` - - - Flags. No flags are defined yet, so set this to 0. - - - .. row 7 - - - __u8 - - - ``tx_status`` - - - The status bits of the transmitted message. See - :ref:`cec-tx-status` for the possible status values. It is 0 if - this messages was received, not transmitted. - - - .. row 8 - - - __u8 - - - ``msg[16]`` - - - The message payload. For :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>` this is filled in by the - application. The driver will fill this in for :ref:`ioctl CEC_RECEIVE <CEC_RECEIVE>`. - For :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>` it will be filled in by the driver with - the payload of the reply message if ``timeout`` was set. - - - .. row 8 - - - __u8 - - - ``reply`` - - - Wait until this message is replied. If ``reply`` is 0 and the - ``timeout`` is 0, then don't wait for a reply but return after - transmitting the message. Ignored by :ref:`ioctl CEC_RECEIVE <CEC_RECEIVE>`. - The case where ``reply`` is 0 (this is the opcode for the Feature Abort - message) and ``timeout`` is non-zero is specifically allowed to make it - possible to send a message and wait up to ``timeout`` milliseconds for a - Feature Abort reply. In this case ``rx_status`` will either be set - to :ref:`CEC_RX_STATUS_TIMEOUT <CEC-RX-STATUS-TIMEOUT>` or - :ref:`CEC_RX_STATUS_FEATURE_ABORT <CEC-RX-STATUS-FEATURE-ABORT>`. - - - .. row 9 - - - __u8 - - - ``rx_status`` - - - The status bits of the received message. See - :ref:`cec-rx-status` for the possible status values. It is 0 if - this message was transmitted, not received, unless this is the - reply to a transmitted message. In that case both ``rx_status`` - and ``tx_status`` are set. - - - .. row 10 - - - __u8 - - - ``tx_status`` - - - The status bits of the transmitted message. See - :ref:`cec-tx-status` for the possible status values. It is 0 if - this messages was received, not transmitted. - - - .. row 11 - - - __u8 - - - ``tx_arb_lost_cnt`` - - - A counter of the number of transmit attempts that resulted in the - Arbitration Lost error. This is only set if the hardware supports - this, otherwise it is always 0. This counter is only valid if the - :ref:`CEC_TX_STATUS_ARB_LOST <CEC-TX-STATUS-ARB-LOST>` status bit is set. - - - .. row 12 - - - __u8 - - - ``tx_nack_cnt`` - - - A counter of the number of transmit attempts that resulted in the - Not Acknowledged error. This is only set if the hardware supports - this, otherwise it is always 0. This counter is only valid if the - :ref:`CEC_TX_STATUS_NACK <CEC-TX-STATUS-NACK>` status bit is set. - - - .. row 13 - - - __u8 - - - ``tx_low_drive_cnt`` - - - A counter of the number of transmit attempts that resulted in the - Arbitration Lost error. This is only set if the hardware supports - this, otherwise it is always 0. This counter is only valid if the - :ref:`CEC_TX_STATUS_LOW_DRIVE <CEC-TX-STATUS-LOW-DRIVE>` status bit is set. - - - .. row 14 - - - __u8 - - - ``tx_error_cnt`` + * .. _`CEC-MSG-FL-REPLY-TO-FOLLOWERS`: - - A counter of the number of transmit errors other than Arbitration - Lost or Not Acknowledged. This is only set if the hardware - supports this, otherwise it is always 0. This counter is only - valid if the :ref:`CEC_TX_STATUS_ERROR <CEC-TX-STATUS-ERROR>` status bit is set. + - ``CEC_MSG_FL_REPLY_TO_FOLLOWERS`` + - 1 + - If a CEC transmit expects a reply, then by default that reply is only sent to + the filehandle that called :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>`. If this + flag is set, then the reply is also sent to all followers, if any. If the + filehandle that called :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>` is also a + follower, then that filehandle will receive the reply twice: once as the + result of the :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>`, and once via + :ref:`ioctl CEC_RECEIVE <CEC_RECEIVE>`. .. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}| @@ -264,64 +217,46 @@ result. :stub-columns: 0 :widths: 3 1 16 - - - .. _`CEC-TX-STATUS-OK`: - - - ``CEC_TX_STATUS_OK`` - - - 0x01 - - - The message was transmitted successfully. This is mutually - exclusive with :ref:`CEC_TX_STATUS_MAX_RETRIES <CEC-TX-STATUS-MAX-RETRIES>`. Other bits can still - be set if earlier attempts met with failure before the transmit - was eventually successful. - - - .. _`CEC-TX-STATUS-ARB-LOST`: - - - ``CEC_TX_STATUS_ARB_LOST`` - - - 0x02 - - - CEC line arbitration was lost. - - - .. _`CEC-TX-STATUS-NACK`: - - - ``CEC_TX_STATUS_NACK`` - - - 0x04 - - - Message was not acknowledged. - - - .. _`CEC-TX-STATUS-LOW-DRIVE`: - - - ``CEC_TX_STATUS_LOW_DRIVE`` - - - 0x08 - - - Low drive was detected on the CEC bus. This indicates that a - follower detected an error on the bus and requests a - retransmission. - - - .. _`CEC-TX-STATUS-ERROR`: - - - ``CEC_TX_STATUS_ERROR`` - - - 0x10 - - - Some error occurred. This is used for any errors that do not fit - the previous two, either because the hardware could not tell which - error occurred, or because the hardware tested for other - conditions besides those two. - - - .. _`CEC-TX-STATUS-MAX-RETRIES`: - - - ``CEC_TX_STATUS_MAX_RETRIES`` - - - 0x20 - - - The transmit failed after one or more retries. This status bit is - mutually exclusive with :ref:`CEC_TX_STATUS_OK <CEC-TX-STATUS-OK>`. Other bits can still - be set to explain which failures were seen. + * .. _`CEC-TX-STATUS-OK`: + + - ``CEC_TX_STATUS_OK`` + - 0x01 + - The message was transmitted successfully. This is mutually + exclusive with :ref:`CEC_TX_STATUS_MAX_RETRIES <CEC-TX-STATUS-MAX-RETRIES>`. Other bits can still + be set if earlier attempts met with failure before the transmit + was eventually successful. + * .. _`CEC-TX-STATUS-ARB-LOST`: + + - ``CEC_TX_STATUS_ARB_LOST`` + - 0x02 + - CEC line arbitration was lost. + * .. _`CEC-TX-STATUS-NACK`: + + - ``CEC_TX_STATUS_NACK`` + - 0x04 + - Message was not acknowledged. + * .. _`CEC-TX-STATUS-LOW-DRIVE`: + + - ``CEC_TX_STATUS_LOW_DRIVE`` + - 0x08 + - Low drive was detected on the CEC bus. This indicates that a + follower detected an error on the bus and requests a + retransmission. + * .. _`CEC-TX-STATUS-ERROR`: + + - ``CEC_TX_STATUS_ERROR`` + - 0x10 + - Some error occurred. This is used for any errors that do not fit + the previous two, either because the hardware could not tell which + error occurred, or because the hardware tested for other + conditions besides those two. + * .. _`CEC-TX-STATUS-MAX-RETRIES`: + + - ``CEC_TX_STATUS_MAX_RETRIES`` + - 0x20 + - The transmit failed after one or more retries. This status bit is + mutually exclusive with :ref:`CEC_TX_STATUS_OK <CEC-TX-STATUS-OK>`. Other bits can still + be set to explain which failures were seen. .. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}| @@ -333,32 +268,23 @@ result. :stub-columns: 0 :widths: 3 1 16 + * .. _`CEC-RX-STATUS-OK`: - - .. _`CEC-RX-STATUS-OK`: - - - ``CEC_RX_STATUS_OK`` - - - 0x01 - - - The message was received successfully. - - - .. _`CEC-RX-STATUS-TIMEOUT`: - - - ``CEC_RX_STATUS_TIMEOUT`` - - - 0x02 - - - The reply to an earlier transmitted message timed out. - - - .. _`CEC-RX-STATUS-FEATURE-ABORT`: - - - ``CEC_RX_STATUS_FEATURE_ABORT`` + - ``CEC_RX_STATUS_OK`` + - 0x01 + - The message was received successfully. + * .. _`CEC-RX-STATUS-TIMEOUT`: - - 0x04 + - ``CEC_RX_STATUS_TIMEOUT`` + - 0x02 + - The reply to an earlier transmitted message timed out. + * .. _`CEC-RX-STATUS-FEATURE-ABORT`: - - The message was received successfully but the reply was - ``CEC_MSG_FEATURE_ABORT``. This status is only set if this message - was the reply to an earlier transmitted message. + - ``CEC_RX_STATUS_FEATURE_ABORT`` + - 0x04 + - The message was received successfully but the reply was + ``CEC_MSG_FEATURE_ABORT``. This status is only set if this message + was the reply to an earlier transmitted message. diff --git a/Documentation/media/uapi/v4l/control.rst b/Documentation/media/uapi/v4l/control.rst index d3f1450c4b08..51112badb804 100644 --- a/Documentation/media/uapi/v4l/control.rst +++ b/Documentation/media/uapi/v4l/control.rst @@ -312,21 +312,20 @@ more menu type controls. .. _enum_all_controls: -Example: Enumerating all user controls -====================================== +Example: Enumerating all controls +================================= .. code-block:: c - struct v4l2_queryctrl queryctrl; struct v4l2_querymenu querymenu; - static void enumerate_menu(void) + static void enumerate_menu(__u32 id) { printf(" Menu items:\\n"); memset(&querymenu, 0, sizeof(querymenu)); - querymenu.id = queryctrl.id; + querymenu.id = id; for (querymenu.index = queryctrl.minimum; querymenu.index <= queryctrl.maximum; @@ -339,6 +338,55 @@ Example: Enumerating all user controls memset(&queryctrl, 0, sizeof(queryctrl)); + queryctrl.id = V4L2_CTRL_FLAG_NEXT_CTRL; + while (0 == ioctl(fd, VIDIOC_QUERYCTRL, &queryctrl)) { + if (!(queryctrl.flags & V4L2_CTRL_FLAG_DISABLED)) { + printf("Control %s\\n", queryctrl.name); + + if (queryctrl.type == V4L2_CTRL_TYPE_MENU) + enumerate_menu(queryctrl.id); + } + + queryctrl.id |= V4L2_CTRL_FLAG_NEXT_CTRL; + } + if (errno != EINVAL) { + perror("VIDIOC_QUERYCTRL"); + exit(EXIT_FAILURE); + } + +Example: Enumerating all controls including compound controls +============================================================= + +.. code-block:: c + + struct v4l2_query_ext_ctrl query_ext_ctrl; + + memset(&query_ext_ctrl, 0, sizeof(query_ext_ctrl)); + + query_ext_ctrl.id = V4L2_CTRL_FLAG_NEXT_CTRL | V4L2_CTRL_FLAG_NEXT_COMPOUND; + while (0 == ioctl(fd, VIDIOC_QUERY_EXT_CTRL, &query_ext_ctrl)) { + if (!(query_ext_ctrl.flags & V4L2_CTRL_FLAG_DISABLED)) { + printf("Control %s\\n", query_ext_ctrl.name); + + if (query_ext_ctrl.type == V4L2_CTRL_TYPE_MENU) + enumerate_menu(query_ext_ctrl.id); + } + + query_ext_ctrl.id |= V4L2_CTRL_FLAG_NEXT_CTRL | V4L2_CTRL_FLAG_NEXT_COMPOUND; + } + if (errno != EINVAL) { + perror("VIDIOC_QUERY_EXT_CTRL"); + exit(EXIT_FAILURE); + } + +Example: Enumerating all user controls (old style) +================================================== + +.. code-block:: c + + + memset(&queryctrl, 0, sizeof(queryctrl)); + for (queryctrl.id = V4L2_CID_BASE; queryctrl.id < V4L2_CID_LASTP1; queryctrl.id++) { @@ -349,7 +397,7 @@ Example: Enumerating all user controls printf("Control %s\\n", queryctrl.name); if (queryctrl.type == V4L2_CTRL_TYPE_MENU) - enumerate_menu(); + enumerate_menu(queryctrl.id); } else { if (errno == EINVAL) continue; @@ -368,7 +416,7 @@ Example: Enumerating all user controls printf("Control %s\\n", queryctrl.name); if (queryctrl.type == V4L2_CTRL_TYPE_MENU) - enumerate_menu(); + enumerate_menu(queryctrl.id); } else { if (errno == EINVAL) break; @@ -379,32 +427,6 @@ Example: Enumerating all user controls } -Example: Enumerating all user controls (alternative) -==================================================== - -.. code-block:: c - - memset(&queryctrl, 0, sizeof(queryctrl)); - - queryctrl.id = V4L2_CTRL_CLASS_USER | V4L2_CTRL_FLAG_NEXT_CTRL; - while (0 == ioctl(fd, VIDIOC_QUERYCTRL, &queryctrl)) { - if (V4L2_CTRL_ID2CLASS(queryctrl.id) != V4L2_CTRL_CLASS_USER) - break; - if (queryctrl.flags & V4L2_CTRL_FLAG_DISABLED) - continue; - - printf("Control %s\\n", queryctrl.name); - - if (queryctrl.type == V4L2_CTRL_TYPE_MENU) - enumerate_menu(); - - queryctrl.id |= V4L2_CTRL_FLAG_NEXT_CTRL; - } - if (errno != EINVAL) { - perror("VIDIOC_QUERYCTRL"); - exit(EXIT_FAILURE); - } - Example: Changing controls ========================== diff --git a/Documentation/media/uapi/v4l/dev-codec.rst b/Documentation/media/uapi/v4l/dev-codec.rst index d9f218449ddd..c61e938bd8dc 100644 --- a/Documentation/media/uapi/v4l/dev-codec.rst +++ b/Documentation/media/uapi/v4l/dev-codec.rst @@ -26,7 +26,7 @@ parameters The MPEG controls actually support many more codecs than just MPEG. See :ref:`mpeg-controls`. -Memory-to-memory devices can often be used as a shared resource: you can +Memory-to-memory devices function as a shared resource: you can open the video node multiple times, each application setting up their own codec properties that are local to the file handle, and each can use it independently from the others. The driver will arbitrate access to diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst index 7725c33d8b69..abb105724c05 100644 --- a/Documentation/media/uapi/v4l/extended-controls.rst +++ b/Documentation/media/uapi/v4l/extended-controls.rst @@ -2846,7 +2846,7 @@ JPEG Control IDs input image is sampled, in respect to maximum sample rate in each spatial dimension. See :ref:`itu-t81`, clause A.1.1. for more details. The ``V4L2_CID_JPEG_CHROMA_SUBSAMPLING`` control determines - how Cb and Cr components are downsampled after coverting an input + how Cb and Cr components are downsampled after converting an input image from RGB to Y'CbCr color space. .. tabularcolumns:: |p{7.0cm}|p{10.5cm}| @@ -3017,6 +3017,10 @@ Image Process Control IDs test pattern images. These hardware specific test patterns can be used to test if a device is working properly. +``V4L2_CID_DEINTERLACING_MODE (menu)`` + The video deinterlacing mode (such as Bob, Weave, ...). The menu items are + driver specific and are documented in :ref:`v4l-drivers`. + .. _dv-controls: diff --git a/Documentation/media/uapi/v4l/hsv-formats.rst b/Documentation/media/uapi/v4l/hsv-formats.rst new file mode 100644 index 000000000000..f0f2615eaa95 --- /dev/null +++ b/Documentation/media/uapi/v4l/hsv-formats.rst @@ -0,0 +1,19 @@ +.. -*- coding: utf-8; mode: rst -*- + +.. _hsv-formats: + +*********** +HSV Formats +*********** + +These formats store the color information of the image +in a geometrical representation. The colors are mapped into a +cylinder, where the angle is the HUE, the height is the VALUE +and the distance to the center is the SATURATION. This is a very +useful format for image segmentation algorithms. + + +.. toctree:: + :maxdepth: 1 + + pixfmt-packed-hsv diff --git a/Documentation/media/uapi/v4l/pixfmt-002.rst b/Documentation/media/uapi/v4l/pixfmt-002.rst index 0d9e697f5d4e..2ee164c25637 100644 --- a/Documentation/media/uapi/v4l/pixfmt-002.rst +++ b/Documentation/media/uapi/v4l/pixfmt-002.rst @@ -121,6 +121,11 @@ Single-planar format structure - This information supplements the ``colorspace`` and must be set by the driver for capture streams and by the application for output streams, see :ref:`colorspaces`. + * - enum :c:type:`v4l2_hsv_encoding` + - ``hsv_enc`` + - This information supplements the ``colorspace`` and must be set by + the driver for capture streams and by the application for output + streams, see :ref:`colorspaces`. * - enum :c:type:`v4l2_quantization` - ``quantization`` - This information supplements the ``colorspace`` and must be set by diff --git a/Documentation/media/uapi/v4l/pixfmt-003.rst b/Documentation/media/uapi/v4l/pixfmt-003.rst index ae9ea7a791de..337e8188caf1 100644 --- a/Documentation/media/uapi/v4l/pixfmt-003.rst +++ b/Documentation/media/uapi/v4l/pixfmt-003.rst @@ -78,6 +78,11 @@ describing all planes of that format. - This information supplements the ``colorspace`` and must be set by the driver for capture streams and by the application for output streams, see :ref:`colorspaces`. + * - enum :c:type:`v4l2_hsv_encoding` + - ``hsv_enc`` + - This information supplements the ``colorspace`` and must be set by + the driver for capture streams and by the application for output + streams, see :ref:`colorspaces`. * - enum :c:type:`v4l2_quantization` - ``quantization`` - This information supplements the ``colorspace`` and must be set by diff --git a/Documentation/media/uapi/v4l/pixfmt-006.rst b/Documentation/media/uapi/v4l/pixfmt-006.rst index a9890ff6038b..7ae7dcf73f63 100644 --- a/Documentation/media/uapi/v4l/pixfmt-006.rst +++ b/Documentation/media/uapi/v4l/pixfmt-006.rst @@ -19,9 +19,16 @@ colorspace field of struct :c:type:`v4l2_pix_format` or struct :c:type:`v4l2_pix_format_mplane` needs to be filled in. -.. note:: +.. _hsv-colorspace: - The default R'G'B' quantization is full range for all +On :ref:`HSV formats <hsv-formats>` the *Hue* is defined as the angle on +the cylindrical color representation. Usually this angle is measured in +degrees, i.e. 0-360. When we map this angle value into 8 bits, there are +two basic ways to do it: Divide the angular value by 2 (0-179), or use the +whole range, 0-255, dividing the angular value by 1.41. The enum +:c:type:`v4l2_hsv_encoding` specifies which encoding is used. + +.. note:: The default R'G'B' quantization is full range for all colorspaces except for BT.2020 which uses limited range R'G'B' quantization. @@ -123,6 +130,24 @@ needs to be filled in. +.. c:type:: v4l2_hsv_encoding + +.. tabularcolumns:: |p{6.5cm}|p{11.0cm}| + +.. flat-table:: V4L2 HSV Encodings + :header-rows: 1 + :stub-columns: 0 + + * - Identifier + - Details + * - ``V4L2_HSV_ENC_180`` + - For the Hue, each LSB is two degrees. + * - ``V4L2_HSV_ENC_256`` + - For the Hue, the 360 degrees are mapped into 8 bits, i.e. each + LSB is roughly 1.41 degrees. + + + .. c:type:: v4l2_quantization .. tabularcolumns:: |p{6.5cm}|p{11.0cm}| @@ -136,7 +161,7 @@ needs to be filled in. * - ``V4L2_QUANTIZATION_DEFAULT`` - Use the default quantization encoding as defined by the colorspace. This is always full range for R'G'B' (except for the - BT.2020 colorspace) and usually limited range for Y'CbCr. + BT.2020 colorspace) and HSV. It is usually limited range for Y'CbCr. * - ``V4L2_QUANTIZATION_FULL_RANGE`` - Use the full range quantization encoding. I.e. the range [0…1] is mapped to [0…255] (with possible clipping to [1…254] to avoid the diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst index 542c087152e3..728d7ede10fa 100644 --- a/Documentation/media/uapi/v4l/pixfmt-013.rst +++ b/Documentation/media/uapi/v4l/pixfmt-013.rst @@ -85,3 +85,8 @@ Compressed Formats - ``V4L2_PIX_FMT_VP8`` - 'VP80' - VP8 video elementary stream. + * .. _V4L2-PIX-FMT-VP9: + + - ``V4L2_PIX_FMT_VP9`` + - 'VP90' + - VP9 video elementary stream. diff --git a/Documentation/media/uapi/v4l/pixfmt-packed-hsv.rst b/Documentation/media/uapi/v4l/pixfmt-packed-hsv.rst new file mode 100644 index 000000000000..3fdb34ce2f09 --- /dev/null +++ b/Documentation/media/uapi/v4l/pixfmt-packed-hsv.rst @@ -0,0 +1,157 @@ +.. -*- coding: utf-8; mode: rst -*- + +.. _packed-hsv: + +****************** +Packed HSV formats +****************** + +Description +=========== + +The *hue* (h) is measured in degrees, the equivalence between degrees and LSBs +depends on the hsv-encoding used, see :ref:`colorspaces`. +The *saturation* (s) and the *value* (v) are measured in percentage of the +cylinder: 0 being the smallest value and 255 the maximum. + + +The values are packed in 24 or 32 bit formats. + +.. raw:: latex + + \newline\begin{adjustbox}{width=\columnwidth} + +.. tabularcolumns:: |p{4.2cm}|p{1.0cm}|p{0.7cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.2cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.2cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.2cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{0.4cm}|p{1.7cm}| + +.. _packed-hsv-formats: + +.. flat-table:: Packed HSV Image Formats + :header-rows: 2 + :stub-columns: 0 + + * - Identifier + - Code + - + - :cspan:`7` Byte 0 in memory + - + - :cspan:`7` Byte 1 + - + - :cspan:`7` Byte 2 + - + - :cspan:`7` Byte 3 + * - + - + - Bit + - 7 + - 6 + - 5 + - 4 + - 3 + - 2 + - 1 + - 0 + - + - 7 + - 6 + - 5 + - 4 + - 3 + - 2 + - 1 + - 0 + - + - 7 + - 6 + - 5 + - 4 + - 3 + - 2 + - 1 + - 0 + - + - 7 + - 6 + - 5 + - 4 + - 3 + - 2 + - 1 + - 0 + * .. _V4L2-PIX-FMT-HSV32: + + - ``V4L2_PIX_FMT_HSV32`` + - 'HSV4' + - + - + - + - + - + - + - + - + - + - + - h\ :sub:`7` + - h\ :sub:`6` + - h\ :sub:`5` + - h\ :sub:`4` + - h\ :sub:`3` + - h\ :sub:`2` + - h\ :sub:`1` + - h\ :sub:`0` + - + - s\ :sub:`7` + - s\ :sub:`6` + - s\ :sub:`5` + - s\ :sub:`4` + - s\ :sub:`3` + - s\ :sub:`2` + - s\ :sub:`1` + - s\ :sub:`0` + - + - v\ :sub:`7` + - v\ :sub:`6` + - v\ :sub:`5` + - v\ :sub:`4` + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + * .. _V4L2-PIX-FMT-HSV24: + + - ``V4L2_PIX_FMT_HSV24`` + - 'HSV3' + - + - h\ :sub:`7` + - h\ :sub:`6` + - h\ :sub:`5` + - h\ :sub:`4` + - h\ :sub:`3` + - h\ :sub:`2` + - h\ :sub:`1` + - h\ :sub:`0` + - + - s\ :sub:`7` + - s\ :sub:`6` + - s\ :sub:`5` + - s\ :sub:`4` + - s\ :sub:`3` + - s\ :sub:`2` + - s\ :sub:`1` + - s\ :sub:`0` + - + - v\ :sub:`7` + - v\ :sub:`6` + - v\ :sub:`5` + - v\ :sub:`4` + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + - + - +.. raw:: latex + + \end{adjustbox}\newline\newline + +Bit 7 is the most significant bit. diff --git a/Documentation/media/uapi/v4l/pixfmt-reserved.rst b/Documentation/media/uapi/v4l/pixfmt-reserved.rst index bd7bf3dae6af..521adb795535 100644 --- a/Documentation/media/uapi/v4l/pixfmt-reserved.rst +++ b/Documentation/media/uapi/v4l/pixfmt-reserved.rst @@ -234,7 +234,15 @@ please make a proposal on the linux-media mailing list. repeated for each line, i.e. the number of entries in the pointer array. Anything what's in between the UYVY lines is JPEG data and should be concatenated to form the JPEG stream. - + * .. _V4L2-PIX-FMT-MT21C: + + - ``V4L2_PIX_FMT_MT21C`` + - 'MT21' + - Compressed two-planar YVU420 format used by Mediatek MT8173. + The compression is lossless. + It is an opaque intermediate format and the MDP hardware must be + used to convert ``V4L2_PIX_FMT_MT21C`` to ``V4L2_PIX_FMT_NV12M``, + ``V4L2_PIX_FMT_YUV420M`` or ``V4L2_PIX_FMT_YVU420``. .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| diff --git a/Documentation/media/uapi/v4l/pixfmt-rgb.rst b/Documentation/media/uapi/v4l/pixfmt-rgb.rst index 9cc980882e80..b0f35136021e 100644 --- a/Documentation/media/uapi/v4l/pixfmt-rgb.rst +++ b/Documentation/media/uapi/v4l/pixfmt-rgb.rst @@ -12,9 +12,9 @@ RGB Formats pixfmt-packed-rgb pixfmt-srggb8 - pixfmt-sbggr16 pixfmt-srggb10 pixfmt-srggb10p pixfmt-srggb10alaw8 pixfmt-srggb10dpcm8 pixfmt-srggb12 + pixfmt-srggb16 diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb10p.rst b/Documentation/media/uapi/v4l/pixfmt-srggb10p.rst index 9a41c8d811d0..b6d426c70ccd 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb10p.rst +++ b/Documentation/media/uapi/v4l/pixfmt-srggb10p.rst @@ -28,7 +28,7 @@ bits of each pixel, in the same order. Each n-pixel row contains n/2 green samples and n/2 blue or red samples, with alternating green-red and green-blue rows. They are conventionally described as GRGR... BGBG..., RGRG... GBGB..., etc. Below is an example -of one of these formats: +of a small V4L2_PIX_FMT_SBGGR10P image: **Byte Order.** Each cell is one byte. diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb12.rst b/Documentation/media/uapi/v4l/pixfmt-srggb12.rst index a50ee143cb08..15041e568a0a 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb12.rst +++ b/Documentation/media/uapi/v4l/pixfmt-srggb12.rst @@ -26,7 +26,7 @@ high bits filled with zeros. Each n-pixel row contains n/2 green samples and n/2 blue or red samples, with alternating red and blue rows. Bytes are stored in memory in little endian order. They are conventionally described as GRGR... BGBG..., RGRG... GBGB..., etc. Below is an example -of one of these formats: +of a small V4L2_PIX_FMT_SBGGR12 image: **Byte Order.** Each cell is one byte, the 4 most significant bits in the high bytes are diff --git a/Documentation/media/uapi/v4l/pixfmt-sbggr16.rst b/Documentation/media/uapi/v4l/pixfmt-srggb16.rst index 6f7f327db85c..d407b2b2050f 100644 --- a/Documentation/media/uapi/v4l/pixfmt-sbggr16.rst +++ b/Documentation/media/uapi/v4l/pixfmt-srggb16.rst @@ -1,21 +1,28 @@ .. -*- coding: utf-8; mode: rst -*- -.. _V4L2-PIX-FMT-SBGGR16: +.. _V4L2-PIX-FMT-SRGGB16: +.. _v4l2-pix-fmt-sbggr16: +.. _v4l2-pix-fmt-sgbrg16: +.. _v4l2-pix-fmt-sgrbg16: -***************************** -V4L2_PIX_FMT_SBGGR16 ('BYR2') -***************************** -Bayer RGB format +*************************************************************************************************************************** +V4L2_PIX_FMT_SRGGB16 ('RG16'), V4L2_PIX_FMT_SGRBG16 ('GR16'), V4L2_PIX_FMT_SGBRG16 ('GB16'), V4L2_PIX_FMT_SBGGR16 ('BYR2'), +*************************************************************************************************************************** + + +16-bit Bayer formats Description =========== -This format is similar to -:ref:`V4L2_PIX_FMT_SBGGR8 <V4L2-PIX-FMT-SBGGR8>`, except each pixel -has a depth of 16 bits. The least significant byte is stored at lower -memory addresses (little-endian). +These four pixel formats are raw sRGB / Bayer formats with 16 bits per +sample. Each sample is stored in a 16-bit word. Each n-pixel row contains +n/2 green samples and n/2 blue or red samples, with alternating red and blue +rows. Bytes are stored in memory in little endian order. They are +conventionally described as GRGR... BGBG..., RGRG... GBGB..., etc. Below is +an example of a small V4L2_PIX_FMT_SBGGR16 image: **Byte Order.** Each cell is one byte. diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb8.rst b/Documentation/media/uapi/v4l/pixfmt-srggb8.rst index a3987d2e97fd..5ac25a634d30 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb8.rst +++ b/Documentation/media/uapi/v4l/pixfmt-srggb8.rst @@ -20,7 +20,7 @@ These four pixel formats are raw sRGB / Bayer formats with 8 bits per sample. Each sample is stored in a byte. Each n-pixel row contains n/2 green samples and n/2 blue or red samples, with alternating red and blue rows. They are conventionally described as GRGR... BGBG..., -RGRG... GBGB..., etc. Below is an example of one of these formats: +RGRG... GBGB..., etc. Below is an example of a small V4L2_PIX_FMT_SBGGR8 image: **Byte Order.** Each cell is one byte. diff --git a/Documentation/media/uapi/v4l/pixfmt.rst b/Documentation/media/uapi/v4l/pixfmt.rst index 4d297f6eb5f1..4f184c7aedab 100644 --- a/Documentation/media/uapi/v4l/pixfmt.rst +++ b/Documentation/media/uapi/v4l/pixfmt.rst @@ -29,6 +29,7 @@ see also :ref:`VIDIOC_G_FBUF <VIDIOC_G_FBUF>`.) pixfmt-indexed pixfmt-rgb yuv-formats + hsv-formats depth-formats pixfmt-013 sdr-formats diff --git a/Documentation/media/uapi/v4l/subdev-image-processing-crop.svg b/Documentation/media/uapi/v4l/subdev-image-processing-crop.svg index ba02e6f6214d..1903dd3846c2 100644 --- a/Documentation/media/uapi/v4l/subdev-image-processing-crop.svg +++ b/Documentation/media/uapi/v4l/subdev-image-processing-crop.svg @@ -7,9 +7,9 @@ xmlns="http://www.w3.org/2000/svg" xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd" xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape" - width="43cm" - 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SDR API. +- Ribalda, Ricardo + + - Introduce HSV formats and other minor changes. + - Rubli, Martin - Designed and documented the VIDIOC_ENUM_FRAMESIZES and VIDIOC_ENUM_FRAMEINTERVALS ioctls. @@ -89,6 +93,11 @@ part can be used and distributed without restrictions. Revision History **************** +:revision: 4.10 / 2016-07-15 (*rr*) + +Introduce HSV formats. + + :revision: 4.5 / 2015-10-29 (*rr*) Extend VIDIOC_G_EXT_CTRLS;. Replace ctrl_class with a new union with diff --git a/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst b/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst index 7dd943ff14cd..aea276502f5e 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst +++ b/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst @@ -270,3 +270,14 @@ EBUSY - Some formats like SMPTE-125M have an interlaced signal with a odd total height. For these formats, if this flag is set, the first field has the extra line. Else, it is the second field. + * - ``V4L2_DV_FL_HAS_PICTURE_ASPECT`` + - If set, then the picture_aspect field is valid. Otherwise assume that + the pixels are square, so the picture aspect ratio is the same as the + width to height ratio. + * - ``V4L2_DV_FL_HAS_CEA861_VIC`` + - If set, then the cea861_vic field is valid and contains the Video + Identification Code as per the CEA-861 standard. + * - ``V4L2_DV_FL_HAS_HDMI_VIC`` + - If set, then the hdmi_vic field is valid and contains the Video + Identification Code as per the HDMI standard (HDMI Vendor Specific + InfoFrame). diff --git a/Documentation/media/uapi/v4l/vidioc-g-tuner.rst b/Documentation/media/uapi/v4l/vidioc-g-tuner.rst index e8aa8cd7065f..57c79fa43866 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-tuner.rst +++ b/Documentation/media/uapi/v4l/vidioc-g-tuner.rst @@ -201,10 +201,10 @@ To change the radio frequency the * - ``V4L2_TUNER_SDR`` - 4 - Tuner controls the A/D and/or D/A block of a - Sofware Digital Radio (SDR) + Software Digital Radio (SDR) * - ``V4L2_TUNER_RF`` - 5 - - Tuner controls the RF part of a Sofware Digital Radio (SDR) + - Tuner controls the RF part of a Software Digital Radio (SDR) .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| diff --git a/Documentation/media/v4l-drivers/au0828-cardlist.rst b/Documentation/media/v4l-drivers/au0828-cardlist.rst index aed51b4ffb46..82d2567bc7c1 100644 --- a/Documentation/media/v4l-drivers/au0828-cardlist.rst +++ b/Documentation/media/v4l-drivers/au0828-cardlist.rst @@ -1,11 +1,13 @@ AU0828 cards list ================= -.. code-block:: none - - 0 -> Unknown board (au0828) - 1 -> Hauppauge HVR950Q (au0828) [2040:7200,2040:7210,2040:7217,2040:721b,2040:721e,2040:721f,2040:7280,0fd9:0008,2040:7260,2040:7213,2040:7270] - 2 -> Hauppauge HVR850 (au0828) [2040:7240] - 3 -> DViCO FusionHDTV USB (au0828) [0fe9:d620] - 4 -> Hauppauge HVR950Q rev xxF8 (au0828) [2040:7201,2040:7211,2040:7281] - 5 -> Hauppauge Woodbury (au0828) [05e1:0480,2040:8200] +=========== ========================== ======================================================================================================================= +Card number Card name USB IDs +=========== ========================== ======================================================================================================================= +0 Unknown board +1 Hauppauge HVR950Q 2040:7200, 2040:7210, 2040:7217, 2040:721b, 2040:721e, 2040:721f, 2040:7280, 0fd9:0008, 2040:7260, 2040:7213, 2040:7270 +2 Hauppauge HVR850 2040:7240 +3 DViCO FusionHDTV USB 0fe9:d620 +4 Hauppauge HVR950Q rev xxF8 2040:7201, 2040:7211, 2040:7281 +5 Hauppauge Woodbury 05e1:0480, 2040:8200 +=========== ========================== ======================================================================================================================= diff --git a/Documentation/media/v4l-drivers/bttv-cardlist.rst b/Documentation/media/v4l-drivers/bttv-cardlist.rst index 97a966e7f9c4..28a01cd6cf2e 100644 --- a/Documentation/media/v4l-drivers/bttv-cardlist.rst +++ b/Documentation/media/v4l-drivers/bttv-cardlist.rst @@ -1,172 +1,174 @@ BTTV cards list =============== -.. code-block:: none - - 0 -> *** UNKNOWN/GENERIC *** - 1 -> MIRO PCTV - 2 -> Hauppauge (bt848) - 3 -> STB, Gateway P/N 6000699 (bt848) - 4 -> Intel Create and Share PCI/ Smart Video Recorder III - 5 -> Diamond DTV2000 - 6 -> AVerMedia TVPhone - 7 -> MATRIX-Vision MV-Delta - 8 -> Lifeview FlyVideo II (Bt848) LR26 / MAXI TV Video PCI2 LR26 - 9 -> IMS/IXmicro TurboTV - 10 -> Hauppauge (bt878) [0070:13eb,0070:3900,2636:10b4] - 11 -> MIRO PCTV pro - 12 -> ADS Technologies Channel Surfer TV (bt848) - 13 -> AVerMedia TVCapture 98 [1461:0002,1461:0004,1461:0300] - 14 -> Aimslab Video Highway Xtreme (VHX) - 15 -> Zoltrix TV-Max [a1a0:a0fc] - 16 -> Prolink Pixelview PlayTV (bt878) - 17 -> Leadtek WinView 601 - 18 -> AVEC Intercapture - 19 -> Lifeview FlyVideo II EZ /FlyKit LR38 Bt848 (capture only) - 20 -> CEI Raffles Card - 21 -> Lifeview FlyVideo 98/ Lucky Star Image World ConferenceTV LR50 - 22 -> Askey CPH050/ Phoebe Tv Master + FM [14ff:3002] - 23 -> Modular Technology MM201/MM202/MM205/MM210/MM215 PCTV, bt878 [14c7:0101] - 24 -> Askey CPH05X/06X (bt878) [many vendors] [144f:3002,144f:3005,144f:5000,14ff:3000] - 25 -> Terratec TerraTV+ Version 1.0 (Bt848)/ Terra TValue Version 1.0/ Vobis TV-Boostar - 26 -> Hauppauge WinCam newer (bt878) - 27 -> Lifeview FlyVideo 98/ MAXI TV Video PCI2 LR50 - 28 -> Terratec TerraTV+ Version 1.1 (bt878) [153b:1127,1852:1852] - 29 -> Imagenation PXC200 [1295:200a] - 30 -> Lifeview FlyVideo 98 LR50 [1f7f:1850] - 31 -> Formac iProTV, Formac ProTV I (bt848) - 32 -> Intel Create and Share PCI/ Smart Video Recorder III - 33 -> Terratec TerraTValue Version Bt878 [153b:1117,153b:1118,153b:1119,153b:111a,153b:1134,153b:5018] - 34 -> Leadtek WinFast 2000/ WinFast 2000 XP [107d:6606,107d:6609,6606:217d,f6ff:fff6] - 35 -> Lifeview FlyVideo 98 LR50 / Chronos Video Shuttle II [1851:1850,1851:a050] - 36 -> Lifeview FlyVideo 98FM LR50 / Typhoon TView TV/FM Tuner [1852:1852] - 37 -> Prolink PixelView PlayTV pro - 38 -> Askey CPH06X TView99 [144f:3000,144f:a005,a04f:a0fc] - 39 -> Pinnacle PCTV Studio/Rave [11bd:0012,bd11:1200,bd11:ff00,11bd:ff12] - 40 -> STB TV PCI FM, Gateway P/N 6000704 (bt878), 3Dfx VoodooTV 100 [10b4:2636,10b4:2645,121a:3060] - 41 -> AVerMedia TVPhone 98 [1461:0001,1461:0003] - 42 -> ProVideo PV951 [aa0c:146c] - 43 -> Little OnAir TV - 44 -> Sigma TVII-FM - 45 -> MATRIX-Vision MV-Delta 2 - 46 -> Zoltrix Genie TV/FM [15b0:4000,15b0:400a,15b0:400d,15b0:4010,15b0:4016] - 47 -> Terratec TV/Radio+ [153b:1123] - 48 -> Askey CPH03x/ Dynalink Magic TView - 49 -> IODATA GV-BCTV3/PCI [10fc:4020] - 50 -> Prolink PV-BT878P+4E / PixelView PlayTV PAK / Lenco MXTV-9578 CP - 51 -> Eagle Wireless Capricorn2 (bt878A) - 52 -> Pinnacle PCTV Studio Pro - 53 -> Typhoon TView RDS + FM Stereo / KNC1 TV Station RDS - 54 -> Lifeview FlyVideo 2000 /FlyVideo A2/ Lifetec LT 9415 TV [LR90] - 55 -> Askey CPH031/ BESTBUY Easy TV - 56 -> Lifeview FlyVideo 98FM LR50 [a051:41a0] - 57 -> GrandTec 'Grand Video Capture' (Bt848) [4344:4142] - 58 -> Askey CPH060/ Phoebe TV Master Only (No FM) - 59 -> Askey CPH03x TV Capturer - 60 -> Modular Technology MM100PCTV - 61 -> AG Electronics GMV1 [15cb:0101] - 62 -> Askey CPH061/ BESTBUY Easy TV (bt878) - 63 -> ATI TV-Wonder [1002:0001] - 64 -> ATI TV-Wonder VE [1002:0003] - 65 -> Lifeview FlyVideo 2000S LR90 - 66 -> Terratec TValueRadio [153b:1135,153b:ff3b] - 67 -> IODATA GV-BCTV4/PCI [10fc:4050] - 68 -> 3Dfx VoodooTV FM (Euro) [10b4:2637] - 69 -> Active Imaging AIMMS - 70 -> Prolink Pixelview PV-BT878P+ (Rev.4C,8E) - 71 -> Lifeview FlyVideo 98EZ (capture only) LR51 [1851:1851] - 72 -> Prolink Pixelview PV-BT878P+9B (PlayTV Pro rev.9B FM+NICAM) [1554:4011] - 73 -> Sensoray 311/611 [6000:0311,6000:0611] - 74 -> RemoteVision MX (RV605) - 75 -> Powercolor MTV878/ MTV878R/ MTV878F - 76 -> Canopus WinDVR PCI (COMPAQ Presario 3524JP, 5112JP) [0e11:0079] - 77 -> GrandTec Multi Capture Card (Bt878) - 78 -> Jetway TV/Capture JW-TV878-FBK, Kworld KW-TV878RF [0a01:17de] - 79 -> DSP Design TCVIDEO - 80 -> Hauppauge WinTV PVR [0070:4500] - 81 -> IODATA GV-BCTV5/PCI [10fc:4070,10fc:d018] - 82 -> Osprey 100/150 (878) [0070:ff00] - 83 -> Osprey 100/150 (848) - 84 -> Osprey 101 (848) - 85 -> Osprey 101/151 - 86 -> Osprey 101/151 w/ svid - 87 -> Osprey 200/201/250/251 - 88 -> Osprey 200/250 [0070:ff01] - 89 -> Osprey 210/220/230 - 90 -> Osprey 500 [0070:ff02] - 91 -> Osprey 540 [0070:ff04] - 92 -> Osprey 2000 [0070:ff03] - 93 -> IDS Eagle - 94 -> Pinnacle PCTV Sat [11bd:001c] - 95 -> Formac ProTV II (bt878) - 96 -> MachTV - 97 -> Euresys Picolo - 98 -> ProVideo PV150 [aa00:1460,aa01:1461,aa02:1462,aa03:1463,aa04:1464,aa05:1465,aa06:1466,aa07:1467] - 99 -> AD-TVK503 - 100 -> Hercules Smart TV Stereo - 101 -> Pace TV & Radio Card - 102 -> IVC-200 [0000:a155,0001:a155,0002:a155,0003:a155,0100:a155,0101:a155,0102:a155,0103:a155,0800:a155,0801:a155,0802:a155,0803:a155] - 103 -> Grand X-Guard / Trust 814PCI [0304:0102] - 104 -> Nebula Electronics DigiTV [0071:0101] - 105 -> ProVideo PV143 [aa00:1430,aa00:1431,aa00:1432,aa00:1433,aa03:1433] - 106 -> PHYTEC VD-009-X1 VD-011 MiniDIN (bt878) - 107 -> PHYTEC VD-009-X1 VD-011 Combi (bt878) - 108 -> PHYTEC VD-009 MiniDIN (bt878) - 109 -> PHYTEC VD-009 Combi (bt878) - 110 -> IVC-100 [ff00:a132] - 111 -> IVC-120G [ff00:a182,ff01:a182,ff02:a182,ff03:a182,ff04:a182,ff05:a182,ff06:a182,ff07:a182,ff08:a182,ff09:a182,ff0a:a182,ff0b:a182,ff0c:a182,ff0d:a182,ff0e:a182,ff0f:a182] - 112 -> pcHDTV HD-2000 TV [7063:2000] - 113 -> Twinhan DST + clones [11bd:0026,1822:0001,270f:fc00,1822:0026] - 114 -> Winfast VC100 [107d:6607] - 115 -> Teppro TEV-560/InterVision IV-560 - 116 -> SIMUS GVC1100 [aa6a:82b2] - 117 -> NGS NGSTV+ - 118 -> LMLBT4 - 119 -> Tekram M205 PRO - 120 -> Conceptronic CONTVFMi - 121 -> Euresys Picolo Tetra [1805:0105,1805:0106,1805:0107,1805:0108] - 122 -> Spirit TV Tuner - 123 -> AVerMedia AVerTV DVB-T 771 [1461:0771] - 124 -> AverMedia AverTV DVB-T 761 [1461:0761] - 125 -> MATRIX Vision Sigma-SQ - 126 -> MATRIX Vision Sigma-SLC - 127 -> APAC Viewcomp 878(AMAX) - 128 -> DViCO FusionHDTV DVB-T Lite [18ac:db10,18ac:db11] - 129 -> V-Gear MyVCD - 130 -> Super TV Tuner - 131 -> Tibet Systems 'Progress DVR' CS16 - 132 -> Kodicom 4400R (master) - 133 -> Kodicom 4400R (slave) - 134 -> Adlink RTV24 - 135 -> DViCO FusionHDTV 5 Lite [18ac:d500] - 136 -> Acorp Y878F [9511:1540] - 137 -> Conceptronic CTVFMi v2 [036e:109e] - 138 -> Prolink Pixelview PV-BT878P+ (Rev.2E) - 139 -> Prolink PixelView PlayTV MPEG2 PV-M4900 - 140 -> Osprey 440 [0070:ff07] - 141 -> Asound Skyeye PCTV - 142 -> Sabrent TV-FM (bttv version) - 143 -> Hauppauge ImpactVCB (bt878) [0070:13eb] - 144 -> MagicTV - 145 -> SSAI Security Video Interface [4149:5353] - 146 -> SSAI Ultrasound Video Interface [414a:5353] - 147 -> VoodooTV 200 (USA) [121a:3000] - 148 -> DViCO FusionHDTV 2 [dbc0:d200] - 149 -> Typhoon TV-Tuner PCI (50684) - 150 -> Geovision GV-600 [008a:763c] - 151 -> Kozumi KTV-01C - 152 -> Encore ENL TV-FM-2 [1000:1801] - 153 -> PHYTEC VD-012 (bt878) - 154 -> PHYTEC VD-012-X1 (bt878) - 155 -> PHYTEC VD-012-X2 (bt878) - 156 -> IVCE-8784 [0000:f050,0001:f050,0002:f050,0003:f050] - 157 -> Geovision GV-800(S) (master) [800a:763d] - 158 -> Geovision GV-800(S) (slave) [800b:763d,800c:763d,800d:763d] - 159 -> ProVideo PV183 [1830:1540,1831:1540,1832:1540,1833:1540,1834:1540,1835:1540,1836:1540,1837:1540] - 160 -> Tongwei Video Technology TD-3116 [f200:3116] - 161 -> Aposonic W-DVR [0279:0228] - 162 -> Adlink MPG24 - 163 -> Bt848 Capture 14MHz - 164 -> CyberVision CV06 (SV) - 165 -> Kworld V-Stream Xpert TV PVR878 - 166 -> PCI-8604PW +=========== ================================================================================= ============================================================================================================================================================================== +Card number Card name PCI IDs +=========== ================================================================================= ============================================================================================================================================================================== +0 *** UNKNOWN/GENERIC *** +1 MIRO PCTV +2 Hauppauge (bt848) +3 STB, Gateway P/N 6000699 (bt848) +4 Intel Create and Share PCI/ Smart Video Recorder III +5 Diamond DTV2000 +6 AVerMedia TVPhone +7 MATRIX-Vision MV-Delta +8 Lifeview FlyVideo II (Bt848) LR26 / MAXI TV Video PCI2 LR26 +9 IMS/IXmicro TurboTV +10 Hauppauge (bt878) 0070:13eb, 0070:3900, 2636:10b4 +11 MIRO PCTV pro +12 ADS Technologies Channel Surfer TV (bt848) +13 AVerMedia TVCapture 98 1461:0002, 1461:0004, 1461:0300 +14 Aimslab Video Highway Xtreme (VHX) +15 Zoltrix TV-Max a1a0:a0fc +16 Prolink Pixelview PlayTV (bt878) +17 Leadtek WinView 601 +18 AVEC Intercapture +19 Lifeview FlyVideo II EZ /FlyKit LR38 Bt848 (capture only) +20 CEI Raffles Card +21 Lifeview FlyVideo 98/ Lucky Star Image World ConferenceTV LR50 +22 Askey CPH050/ Phoebe Tv Master + FM 14ff:3002 +23 Modular Technology MM201/MM202/MM205/MM210/MM215 PCTV, bt878 14c7:0101 +24 Askey CPH05X/06X (bt878) [many vendors] 144f:3002, 144f:3005, 144f:5000, 14ff:3000 +25 Terratec TerraTV+ Version 1.0 (Bt848)/ Terra TValue Version 1.0/ Vobis TV-Boostar +26 Hauppauge WinCam newer (bt878) +27 Lifeview FlyVideo 98/ MAXI TV Video PCI2 LR50 +28 Terratec TerraTV+ Version 1.1 (bt878) 153b:1127, 1852:1852 +29 Imagenation PXC200 1295:200a +30 Lifeview FlyVideo 98 LR50 1f7f:1850 +31 Formac iProTV, Formac ProTV I (bt848) +32 Intel Create and Share PCI/ Smart Video Recorder III +33 Terratec TerraTValue Version Bt878 153b:1117, 153b:1118, 153b:1119, 153b:111a, 153b:1134, 153b:5018 +34 Leadtek WinFast 2000/ WinFast 2000 XP 107d:6606, 107d:6609, 6606:217d, f6ff:fff6 +35 Lifeview FlyVideo 98 LR50 / Chronos Video Shuttle II 1851:1850, 1851:a050 +36 Lifeview FlyVideo 98FM LR50 / Typhoon TView TV/FM Tuner 1852:1852 +37 Prolink PixelView PlayTV pro +38 Askey CPH06X TView99 144f:3000, 144f:a005, a04f:a0fc +39 Pinnacle PCTV Studio/Rave 11bd:0012, bd11:1200, bd11:ff00, 11bd:ff12 +40 STB TV PCI FM, Gateway P/N 6000704 (bt878), 3Dfx VoodooTV 100 10b4:2636, 10b4:2645, 121a:3060 +41 AVerMedia TVPhone 98 1461:0001, 1461:0003 +42 ProVideo PV951 aa0c:146c +43 Little OnAir TV +44 Sigma TVII-FM +45 MATRIX-Vision MV-Delta 2 +46 Zoltrix Genie TV/FM 15b0:4000, 15b0:400a, 15b0:400d, 15b0:4010, 15b0:4016 +47 Terratec TV/Radio+ 153b:1123 +48 Askey CPH03x/ Dynalink Magic TView +49 IODATA GV-BCTV3/PCI 10fc:4020 +50 Prolink PV-BT878P+4E / PixelView PlayTV PAK / Lenco MXTV-9578 CP +51 Eagle Wireless Capricorn2 (bt878A) +52 Pinnacle PCTV Studio Pro +53 Typhoon TView RDS + FM Stereo / KNC1 TV Station RDS +54 Lifeview FlyVideo 2000 /FlyVideo A2/ Lifetec LT 9415 TV [LR90] +55 Askey CPH031/ BESTBUY Easy TV +56 Lifeview FlyVideo 98FM LR50 a051:41a0 +57 GrandTec 'Grand Video Capture' (Bt848) 4344:4142 +58 Askey CPH060/ Phoebe TV Master Only (No FM) +59 Askey CPH03x TV Capturer +60 Modular Technology MM100PCTV +61 AG Electronics GMV1 15cb:0101 +62 Askey CPH061/ BESTBUY Easy TV (bt878) +63 ATI TV-Wonder 1002:0001 +64 ATI TV-Wonder VE 1002:0003 +65 Lifeview FlyVideo 2000S LR90 +66 Terratec TValueRadio 153b:1135, 153b:ff3b +67 IODATA GV-BCTV4/PCI 10fc:4050 +68 3Dfx VoodooTV FM (Euro) 10b4:2637 +69 Active Imaging AIMMS +70 Prolink Pixelview PV-BT878P+ (Rev.4C,8E) +71 Lifeview FlyVideo 98EZ (capture only) LR51 1851:1851 +72 Prolink Pixelview PV-BT878P+9B (PlayTV Pro rev.9B FM+NICAM) 1554:4011 +73 Sensoray 311/611 6000:0311, 6000:0611 +74 RemoteVision MX (RV605) +75 Powercolor MTV878/ MTV878R/ MTV878F +76 Canopus WinDVR PCI (COMPAQ Presario 3524JP, 5112JP) 0e11:0079 +77 GrandTec Multi Capture Card (Bt878) +78 Jetway TV/Capture JW-TV878-FBK, Kworld KW-TV878RF 0a01:17de +79 DSP Design TCVIDEO +80 Hauppauge WinTV PVR 0070:4500 +81 IODATA GV-BCTV5/PCI 10fc:4070, 10fc:d018 +82 Osprey 100/150 (878) 0070:ff00 +83 Osprey 100/150 (848) +84 Osprey 101 (848) +85 Osprey 101/151 +86 Osprey 101/151 w/ svid +87 Osprey 200/201/250/251 +88 Osprey 200/250 0070:ff01 +89 Osprey 210/220/230 +90 Osprey 500 0070:ff02 +91 Osprey 540 0070:ff04 +92 Osprey 2000 0070:ff03 +93 IDS Eagle +94 Pinnacle PCTV Sat 11bd:001c +95 Formac ProTV II (bt878) +96 MachTV +97 Euresys Picolo +98 ProVideo PV150 aa00:1460, aa01:1461, aa02:1462, aa03:1463, aa04:1464, aa05:1465, aa06:1466, aa07:1467 +99 AD-TVK503 +100 Hercules Smart TV Stereo +101 Pace TV & Radio Card +102 IVC-200 0000:a155, 0001:a155, 0002:a155, 0003:a155, 0100:a155, 0101:a155, 0102:a155, 0103:a155, 0800:a155, 0801:a155, 0802:a155, 0803:a155 +103 Grand X-Guard / Trust 814PCI 0304:0102 +104 Nebula Electronics DigiTV 0071:0101 +105 ProVideo PV143 aa00:1430, aa00:1431, aa00:1432, aa00:1433, aa03:1433 +106 PHYTEC VD-009-X1 VD-011 MiniDIN (bt878) +107 PHYTEC VD-009-X1 VD-011 Combi (bt878) +108 PHYTEC VD-009 MiniDIN (bt878) +109 PHYTEC VD-009 Combi (bt878) +110 IVC-100 ff00:a132 +111 IVC-120G ff00:a182, ff01:a182, ff02:a182, ff03:a182, ff04:a182, ff05:a182, ff06:a182, ff07:a182, ff08:a182, ff09:a182, ff0a:a182, ff0b:a182, ff0c:a182, ff0d:a182, ff0e:a182, ff0f:a182 +112 pcHDTV HD-2000 TV 7063:2000 +113 Twinhan DST + clones 11bd:0026, 1822:0001, 270f:fc00, 1822:0026 +114 Winfast VC100 107d:6607 +115 Teppro TEV-560/InterVision IV-560 +116 SIMUS GVC1100 aa6a:82b2 +117 NGS NGSTV+ +118 LMLBT4 +119 Tekram M205 PRO +120 Conceptronic CONTVFMi +121 Euresys Picolo Tetra 1805:0105, 1805:0106, 1805:0107, 1805:0108 +122 Spirit TV Tuner +123 AVerMedia AVerTV DVB-T 771 1461:0771 +124 AverMedia AverTV DVB-T 761 1461:0761 +125 MATRIX Vision Sigma-SQ +126 MATRIX Vision Sigma-SLC +127 APAC Viewcomp 878(AMAX) +128 DViCO FusionHDTV DVB-T Lite 18ac:db10, 18ac:db11 +129 V-Gear MyVCD +130 Super TV Tuner +131 Tibet Systems 'Progress DVR' CS16 +132 Kodicom 4400R (master) +133 Kodicom 4400R (slave) +134 Adlink RTV24 +135 DViCO FusionHDTV 5 Lite 18ac:d500 +136 Acorp Y878F 9511:1540 +137 Conceptronic CTVFMi v2 036e:109e +138 Prolink Pixelview PV-BT878P+ (Rev.2E) +139 Prolink PixelView PlayTV MPEG2 PV-M4900 +140 Osprey 440 0070:ff07 +141 Asound Skyeye PCTV +142 Sabrent TV-FM (bttv version) +143 Hauppauge ImpactVCB (bt878) 0070:13eb +144 MagicTV +145 SSAI Security Video Interface 4149:5353 +146 SSAI Ultrasound Video Interface 414a:5353 +147 VoodooTV 200 (USA) 121a:3000 +148 DViCO FusionHDTV 2 dbc0:d200 +149 Typhoon TV-Tuner PCI (50684) +150 Geovision GV-600 008a:763c +151 Kozumi KTV-01C +152 Encore ENL TV-FM-2 1000:1801 +153 PHYTEC VD-012 (bt878) +154 PHYTEC VD-012-X1 (bt878) +155 PHYTEC VD-012-X2 (bt878) +156 IVCE-8784 0000:f050, 0001:f050, 0002:f050, 0003:f050 +157 Geovision GV-800(S) (master) 800a:763d +158 Geovision GV-800(S) (slave) 800b:763d, 800c:763d, 800d:763d +159 ProVideo PV183 1830:1540, 1831:1540, 1832:1540, 1833:1540, 1834:1540, 1835:1540, 1836:1540, 1837:1540 +160 Tongwei Video Technology TD-3116 f200:3116 +161 Aposonic W-DVR 0279:0228 +162 Adlink MPG24 +163 Bt848 Capture 14MHz +164 CyberVision CV06 (SV) +165 Kworld V-Stream Xpert TV PVR878 +166 PCI-8604PW +=========== ================================================================================= ============================================================================================================================================================================== diff --git a/Documentation/media/v4l-drivers/cx23885-cardlist.rst b/Documentation/media/v4l-drivers/cx23885-cardlist.rst index f38003255b9a..fd20b50d2c1d 100644 --- a/Documentation/media/v4l-drivers/cx23885-cardlist.rst +++ b/Documentation/media/v4l-drivers/cx23885-cardlist.rst @@ -1,63 +1,65 @@ cx23885 cards list ================== -.. code-block:: none - - 0 -> UNKNOWN/GENERIC [0070:3400] - 1 -> Hauppauge WinTV-HVR1800lp [0070:7600] - 2 -> Hauppauge WinTV-HVR1800 [0070:7800,0070:7801,0070:7809] - 3 -> Hauppauge WinTV-HVR1250 [0070:7911] - 4 -> DViCO FusionHDTV5 Express [18ac:d500] - 5 -> Hauppauge WinTV-HVR1500Q [0070:7790,0070:7797] - 6 -> Hauppauge WinTV-HVR1500 [0070:7710,0070:7717] - 7 -> Hauppauge WinTV-HVR1200 [0070:71d1,0070:71d3] - 8 -> Hauppauge WinTV-HVR1700 [0070:8101] - 9 -> Hauppauge WinTV-HVR1400 [0070:8010] - 10 -> DViCO FusionHDTV7 Dual Express [18ac:d618] - 11 -> DViCO FusionHDTV DVB-T Dual Express [18ac:db78] - 12 -> Leadtek Winfast PxDVR3200 H [107d:6681] - 13 -> Compro VideoMate E650F [185b:e800] - 14 -> TurboSight TBS 6920 [6920:8888] - 15 -> TeVii S470 [d470:9022] - 16 -> DVBWorld DVB-S2 2005 [0001:2005] - 17 -> NetUP Dual DVB-S2 CI [1b55:2a2c] - 18 -> Hauppauge WinTV-HVR1270 [0070:2211] - 19 -> Hauppauge WinTV-HVR1275 [0070:2215,0070:221d,0070:22f2] - 20 -> Hauppauge WinTV-HVR1255 [0070:2251,0070:22f1] - 21 -> Hauppauge WinTV-HVR1210 [0070:2291,0070:2295,0070:2299,0070:229d,0070:22f0,0070:22f3,0070:22f4,0070:22f5] - 22 -> Mygica X8506 DMB-TH [14f1:8651] - 23 -> Magic-Pro ProHDTV Extreme 2 [14f1:8657] - 24 -> Hauppauge WinTV-HVR1850 [0070:8541] - 25 -> Compro VideoMate E800 [1858:e800] - 26 -> Hauppauge WinTV-HVR1290 [0070:8551] - 27 -> Mygica X8558 PRO DMB-TH [14f1:8578] - 28 -> LEADTEK WinFast PxTV1200 [107d:6f22] - 29 -> GoTView X5 3D Hybrid [5654:2390] - 30 -> NetUP Dual DVB-T/C-CI RF [1b55:e2e4] - 31 -> Leadtek Winfast PxDVR3200 H XC4000 [107d:6f39] - 32 -> MPX-885 - 33 -> Mygica X8502/X8507 ISDB-T [14f1:8502] - 34 -> TerraTec Cinergy T PCIe Dual [153b:117e] - 35 -> TeVii S471 [d471:9022] - 36 -> Hauppauge WinTV-HVR1255 [0070:2259] - 37 -> Prof Revolution DVB-S2 8000 [8000:3034] - 38 -> Hauppauge WinTV-HVR4400/HVR5500 [0070:c108,0070:c138,0070:c1f8] - 39 -> AVerTV Hybrid Express Slim HC81R [1461:d939] - 40 -> TurboSight TBS 6981 [6981:8888] - 41 -> TurboSight TBS 6980 [6980:8888] - 42 -> Leadtek Winfast PxPVR2200 [107d:6f21] - 43 -> Hauppauge ImpactVCB-e [0070:7133] - 44 -> DViCO FusionHDTV DVB-T Dual Express2 [18ac:db98] - 45 -> DVBSky T9580 [4254:9580] - 46 -> DVBSky T980C [4254:980c] - 47 -> DVBSky S950C [4254:950c] - 48 -> Technotrend TT-budget CT2-4500 CI [13c2:3013] - 49 -> DVBSky S950 [4254:0950] - 50 -> DVBSky S952 [4254:0952] - 51 -> DVBSky T982 [4254:0982] - 52 -> Hauppauge WinTV-HVR5525 [0070:f038] - 53 -> Hauppauge WinTV Starburst [0070:c12a] - 54 -> ViewCast 260e [1576:0260] - 55 -> ViewCast 460e [1576:0460] - 56 -> Hauppauge WinTV-QuadHD-DVB [0070:6a28,0070:6b28] - 57 -> Hauppauge WinTV-QuadHD-ATSC [0070:6a18,0070:6b18] +=========== ==================================== ====================================================================================== +Card number Card name PCI IDs +=========== ==================================== ====================================================================================== +0 UNKNOWN/GENERIC 0070:3400 +1 Hauppauge WinTV-HVR1800lp 0070:7600 +2 Hauppauge WinTV-HVR1800 0070:7800, 0070:7801, 0070:7809 +3 Hauppauge WinTV-HVR1250 0070:7911 +4 DViCO FusionHDTV5 Express 18ac:d500 +5 Hauppauge WinTV-HVR1500Q 0070:7790, 0070:7797 +6 Hauppauge WinTV-HVR1500 0070:7710, 0070:7717 +7 Hauppauge WinTV-HVR1200 0070:71d1, 0070:71d3 +8 Hauppauge WinTV-HVR1700 0070:8101 +9 Hauppauge WinTV-HVR1400 0070:8010 +10 DViCO FusionHDTV7 Dual Express 18ac:d618 +11 DViCO FusionHDTV DVB-T Dual Express 18ac:db78 +12 Leadtek Winfast PxDVR3200 H 107d:6681 +13 Compro VideoMate E650F 185b:e800 +14 TurboSight TBS 6920 6920:8888 +15 TeVii S470 d470:9022 +16 DVBWorld DVB-S2 2005 0001:2005 +17 NetUP Dual DVB-S2 CI 1b55:2a2c +18 Hauppauge WinTV-HVR1270 0070:2211 +19 Hauppauge WinTV-HVR1275 0070:2215, 0070:221d, 0070:22f2 +20 Hauppauge WinTV-HVR1255 0070:2251, 0070:22f1 +21 Hauppauge WinTV-HVR1210 0070:2291, 0070:2295, 0070:2299, 0070:229d, 0070:22f0, 0070:22f3, 0070:22f4, 0070:22f5 +22 Mygica X8506 DMB-TH 14f1:8651 +23 Magic-Pro ProHDTV Extreme 2 14f1:8657 +24 Hauppauge WinTV-HVR1850 0070:8541 +25 Compro VideoMate E800 1858:e800 +26 Hauppauge WinTV-HVR1290 0070:8551 +27 Mygica X8558 PRO DMB-TH 14f1:8578 +28 LEADTEK WinFast PxTV1200 107d:6f22 +29 GoTView X5 3D Hybrid 5654:2390 +30 NetUP Dual DVB-T/C-CI RF 1b55:e2e4 +31 Leadtek Winfast PxDVR3200 H XC4000 107d:6f39 +32 MPX-885 +33 Mygica X8502/X8507 ISDB-T 14f1:8502 +34 TerraTec Cinergy T PCIe Dual 153b:117e +35 TeVii S471 d471:9022 +36 Hauppauge WinTV-HVR1255 0070:2259 +37 Prof Revolution DVB-S2 8000 8000:3034 +38 Hauppauge WinTV-HVR4400/HVR5500 0070:c108, 0070:c138, 0070:c1f8 +39 AVerTV Hybrid Express Slim HC81R 1461:d939 +40 TurboSight TBS 6981 6981:8888 +41 TurboSight TBS 6980 6980:8888 +42 Leadtek Winfast PxPVR2200 107d:6f21 +43 Hauppauge ImpactVCB-e 0070:7133 +44 DViCO FusionHDTV DVB-T Dual Express2 18ac:db98 +45 DVBSky T9580 4254:9580 +46 DVBSky T980C 4254:980c +47 DVBSky S950C 4254:950c +48 Technotrend TT-budget CT2-4500 CI 13c2:3013 +49 DVBSky S950 4254:0950 +50 DVBSky S952 4254:0952 +51 DVBSky T982 4254:0982 +52 Hauppauge WinTV-HVR5525 0070:f038 +53 Hauppauge WinTV Starburst 0070:c12a +54 ViewCast 260e 1576:0260 +55 ViewCast 460e 1576:0460 +56 Hauppauge WinTV-QuadHD-DVB 0070:6a28, 0070:6b28 +57 Hauppauge WinTV-QuadHD-ATSC 0070:6a18, 0070:6b18 +=========== ==================================== ====================================================================================== diff --git a/Documentation/media/v4l-drivers/cx88-cardlist.rst b/Documentation/media/v4l-drivers/cx88-cardlist.rst index 01128341e1ea..8cc1cea17035 100644 --- a/Documentation/media/v4l-drivers/cx88-cardlist.rst +++ b/Documentation/media/v4l-drivers/cx88-cardlist.rst @@ -1,96 +1,98 @@ CX88 cards list =============== -.. code-block:: none - - 0 -> UNKNOWN/GENERIC - 1 -> Hauppauge WinTV 34xxx models [0070:3400,0070:3401] - 2 -> GDI Black Gold [14c7:0106,14c7:0107] - 3 -> PixelView [1554:4811] - 4 -> ATI TV Wonder Pro [1002:00f8,1002:00f9] - 5 -> Leadtek Winfast 2000XP Expert [107d:6611,107d:6613] - 6 -> AverTV Studio 303 (M126) [1461:000b] - 7 -> MSI TV-@nywhere Master [1462:8606] - 8 -> Leadtek Winfast DV2000 [107d:6620,107d:6621] - 9 -> Leadtek PVR 2000 [107d:663b,107d:663c,107d:6632,107d:6630,107d:6638,107d:6631,107d:6637,107d:663d] - 10 -> IODATA GV-VCP3/PCI [10fc:d003] - 11 -> Prolink PlayTV PVR - 12 -> ASUS PVR-416 [1043:4823,1461:c111] - 13 -> MSI TV-@nywhere - 14 -> KWorld/VStream XPert DVB-T [17de:08a6] - 15 -> DViCO FusionHDTV DVB-T1 [18ac:db00] - 16 -> KWorld LTV883RF - 17 -> DViCO FusionHDTV 3 Gold-Q [18ac:d810,18ac:d800] - 18 -> Hauppauge Nova-T DVB-T [0070:9002,0070:9001,0070:9000] - 19 -> Conexant DVB-T reference design [14f1:0187] - 20 -> Provideo PV259 [1540:2580] - 21 -> DViCO FusionHDTV DVB-T Plus [18ac:db10,18ac:db11] - 22 -> pcHDTV HD3000 HDTV [7063:3000] - 23 -> digitalnow DNTV Live! DVB-T [17de:a8a6] - 24 -> Hauppauge WinTV 28xxx (Roslyn) models [0070:2801] - 25 -> Digital-Logic MICROSPACE Entertainment Center (MEC) [14f1:0342] - 26 -> IODATA GV/BCTV7E [10fc:d035] - 27 -> PixelView PlayTV Ultra Pro (Stereo) - 28 -> DViCO FusionHDTV 3 Gold-T [18ac:d820] - 29 -> ADS Tech Instant TV DVB-T PCI [1421:0334] - 30 -> TerraTec Cinergy 1400 DVB-T [153b:1166] - 31 -> DViCO FusionHDTV 5 Gold [18ac:d500] - 32 -> AverMedia UltraTV Media Center PCI 550 [1461:8011] - 33 -> Kworld V-Stream Xpert DVD - 34 -> ATI HDTV Wonder [1002:a101] - 35 -> WinFast DTV1000-T [107d:665f] - 36 -> AVerTV 303 (M126) [1461:000a] - 37 -> Hauppauge Nova-S-Plus DVB-S [0070:9201,0070:9202] - 38 -> Hauppauge Nova-SE2 DVB-S [0070:9200] - 39 -> KWorld DVB-S 100 [17de:08b2,1421:0341] - 40 -> Hauppauge WinTV-HVR1100 DVB-T/Hybrid [0070:9400,0070:9402] - 41 -> Hauppauge WinTV-HVR1100 DVB-T/Hybrid (Low Profile) [0070:9800,0070:9802] - 42 -> digitalnow DNTV Live! DVB-T Pro [1822:0025,1822:0019] - 43 -> KWorld/VStream XPert DVB-T with cx22702 [17de:08a1,12ab:2300] - 44 -> DViCO FusionHDTV DVB-T Dual Digital [18ac:db50,18ac:db54] - 45 -> KWorld HardwareMpegTV XPert [17de:0840,1421:0305] - 46 -> DViCO FusionHDTV DVB-T Hybrid [18ac:db40,18ac:db44] - 47 -> pcHDTV HD5500 HDTV [7063:5500] - 48 -> Kworld MCE 200 Deluxe [17de:0841] - 49 -> PixelView PlayTV P7000 [1554:4813] - 50 -> NPG Tech Real TV FM Top 10 [14f1:0842] - 51 -> WinFast DTV2000 H [107d:665e] - 52 -> Geniatech DVB-S [14f1:0084] - 53 -> Hauppauge WinTV-HVR3000 TriMode Analog/DVB-S/DVB-T [0070:1404,0070:1400,0070:1401,0070:1402] - 54 -> Norwood Micro TV Tuner - 55 -> Shenzhen Tungsten Ages Tech TE-DTV-250 / Swann OEM [c180:c980] - 56 -> Hauppauge WinTV-HVR1300 DVB-T/Hybrid MPEG Encoder [0070:9600,0070:9601,0070:9602] - 57 -> ADS Tech Instant Video PCI [1421:0390] - 58 -> Pinnacle PCTV HD 800i [11bd:0051] - 59 -> DViCO FusionHDTV 5 PCI nano [18ac:d530] - 60 -> Pinnacle Hybrid PCTV [12ab:1788] - 61 -> Leadtek TV2000 XP Global [107d:6f18,107d:6618,107d:6619] - 62 -> PowerColor RA330 [14f1:ea3d] - 63 -> Geniatech X8000-MT DVBT [14f1:8852] - 64 -> DViCO FusionHDTV DVB-T PRO [18ac:db30] - 65 -> DViCO FusionHDTV 7 Gold [18ac:d610] - 66 -> Prolink Pixelview MPEG 8000GT [1554:4935] - 67 -> Kworld PlusTV HD PCI 120 (ATSC 120) [17de:08c1] - 68 -> Hauppauge WinTV-HVR4000 DVB-S/S2/T/Hybrid [0070:6900,0070:6904,0070:6902] - 69 -> Hauppauge WinTV-HVR4000(Lite) DVB-S/S2 [0070:6905,0070:6906] - 70 -> TeVii S460 DVB-S/S2 [d460:9022] - 71 -> Omicom SS4 DVB-S/S2 PCI [A044:2011] - 72 -> TBS 8920 DVB-S/S2 [8920:8888] - 73 -> TeVii S420 DVB-S [d420:9022] - 74 -> Prolink Pixelview Global Extreme [1554:4976] - 75 -> PROF 7300 DVB-S/S2 [B033:3033] - 76 -> SATTRADE ST4200 DVB-S/S2 [b200:4200] - 77 -> TBS 8910 DVB-S [8910:8888] - 78 -> Prof 6200 DVB-S [b022:3022] - 79 -> Terratec Cinergy HT PCI MKII [153b:1177] - 80 -> Hauppauge WinTV-IR Only [0070:9290] - 81 -> Leadtek WinFast DTV1800 Hybrid [107d:6654] - 82 -> WinFast DTV2000 H rev. J [107d:6f2b] - 83 -> Prof 7301 DVB-S/S2 [b034:3034] - 84 -> Samsung SMT 7020 DVB-S [18ac:dc00,18ac:dccd] - 85 -> Twinhan VP-1027 DVB-S [1822:0023] - 86 -> TeVii S464 DVB-S/S2 [d464:9022] - 87 -> Leadtek WinFast DTV2000 H PLUS [107d:6f42] - 88 -> Leadtek WinFast DTV1800 H (XC4000) [107d:6f38] - 89 -> Leadtek TV2000 XP Global (SC4100) [107d:6f36] - 90 -> Leadtek TV2000 XP Global (XC4100) [107d:6f43] +=========== =================================================== ====================================================================================== +Card number Card name PCI IDs +=========== =================================================== ====================================================================================== +0 UNKNOWN/GENERIC +1 Hauppauge WinTV 34xxx models 0070:3400, 0070:3401 +2 GDI Black Gold 14c7:0106, 14c7:0107 +3 PixelView 1554:4811 +4 ATI TV Wonder Pro 1002:00f8, 1002:00f9 +5 Leadtek Winfast 2000XP Expert 107d:6611, 107d:6613 +6 AverTV Studio 303 (M126) 1461:000b +7 MSI TV-@nywhere Master 1462:8606 +8 Leadtek Winfast DV2000 107d:6620, 107d:6621 +9 Leadtek PVR 2000 107d:663b, 107d:663c, 107d:6632, 107d:6630, 107d:6638, 107d:6631, 107d:6637, 107d:663d +10 IODATA GV-VCP3/PCI 10fc:d003 +11 Prolink PlayTV PVR +12 ASUS PVR-416 1043:4823, 1461:c111 +13 MSI TV-@nywhere +14 KWorld/VStream XPert DVB-T 17de:08a6 +15 DViCO FusionHDTV DVB-T1 18ac:db00 +16 KWorld LTV883RF +17 DViCO FusionHDTV 3 Gold-Q 18ac:d810, 18ac:d800 +18 Hauppauge Nova-T DVB-T 0070:9002, 0070:9001, 0070:9000 +19 Conexant DVB-T reference design 14f1:0187 +20 Provideo PV259 1540:2580 +21 DViCO FusionHDTV DVB-T Plus 18ac:db10, 18ac:db11 +22 pcHDTV HD3000 HDTV 7063:3000 +23 digitalnow DNTV Live! DVB-T 17de:a8a6 +24 Hauppauge WinTV 28xxx (Roslyn) models 0070:2801 +25 Digital-Logic MICROSPACE Entertainment Center (MEC) 14f1:0342 +26 IODATA GV/BCTV7E 10fc:d035 +27 PixelView PlayTV Ultra Pro (Stereo) +28 DViCO FusionHDTV 3 Gold-T 18ac:d820 +29 ADS Tech Instant TV DVB-T PCI 1421:0334 +30 TerraTec Cinergy 1400 DVB-T 153b:1166 +31 DViCO FusionHDTV 5 Gold 18ac:d500 +32 AverMedia UltraTV Media Center PCI 550 1461:8011 +33 Kworld V-Stream Xpert DVD +34 ATI HDTV Wonder 1002:a101 +35 WinFast DTV1000-T 107d:665f +36 AVerTV 303 (M126) 1461:000a +37 Hauppauge Nova-S-Plus DVB-S 0070:9201, 0070:9202 +38 Hauppauge Nova-SE2 DVB-S 0070:9200 +39 KWorld DVB-S 100 17de:08b2, 1421:0341 +40 Hauppauge WinTV-HVR1100 DVB-T/Hybrid 0070:9400, 0070:9402 +41 Hauppauge WinTV-HVR1100 DVB-T/Hybrid (Low Profile) 0070:9800, 0070:9802 +42 digitalnow DNTV Live! DVB-T Pro 1822:0025, 1822:0019 +43 KWorld/VStream XPert DVB-T with cx22702 17de:08a1, 12ab:2300 +44 DViCO FusionHDTV DVB-T Dual Digital 18ac:db50, 18ac:db54 +45 KWorld HardwareMpegTV XPert 17de:0840, 1421:0305 +46 DViCO FusionHDTV DVB-T Hybrid 18ac:db40, 18ac:db44 +47 pcHDTV HD5500 HDTV 7063:5500 +48 Kworld MCE 200 Deluxe 17de:0841 +49 PixelView PlayTV P7000 1554:4813 +50 NPG Tech Real TV FM Top 10 14f1:0842 +51 WinFast DTV2000 H 107d:665e +52 Geniatech DVB-S 14f1:0084 +53 Hauppauge WinTV-HVR3000 TriMode Analog/DVB-S/DVB-T 0070:1404, 0070:1400, 0070:1401, 0070:1402 +54 Norwood Micro TV Tuner +55 Shenzhen Tungsten Ages Tech TE-DTV-250 / Swann OEM c180:c980 +56 Hauppauge WinTV-HVR1300 DVB-T/Hybrid MPEG Encoder 0070:9600, 0070:9601, 0070:9602 +57 ADS Tech Instant Video PCI 1421:0390 +58 Pinnacle PCTV HD 800i 11bd:0051 +59 DViCO FusionHDTV 5 PCI nano 18ac:d530 +60 Pinnacle Hybrid PCTV 12ab:1788 +61 Leadtek TV2000 XP Global 107d:6f18, 107d:6618, 107d:6619 +62 PowerColor RA330 14f1:ea3d +63 Geniatech X8000-MT DVBT 14f1:8852 +64 DViCO FusionHDTV DVB-T PRO 18ac:db30 +65 DViCO FusionHDTV 7 Gold 18ac:d610 +66 Prolink Pixelview MPEG 8000GT 1554:4935 +67 Kworld PlusTV HD PCI 120 (ATSC 120) 17de:08c1 +68 Hauppauge WinTV-HVR4000 DVB-S/S2/T/Hybrid 0070:6900, 0070:6904, 0070:6902 +69 Hauppauge WinTV-HVR4000(Lite) DVB-S/S2 0070:6905, 0070:6906 +70 TeVii S460 DVB-S/S2 d460:9022 +71 Omicom SS4 DVB-S/S2 PCI A044:2011 +72 TBS 8920 DVB-S/S2 8920:8888 +73 TeVii S420 DVB-S d420:9022 +74 Prolink Pixelview Global Extreme 1554:4976 +75 PROF 7300 DVB-S/S2 B033:3033 +76 SATTRADE ST4200 DVB-S/S2 b200:4200 +77 TBS 8910 DVB-S 8910:8888 +78 Prof 6200 DVB-S b022:3022 +79 Terratec Cinergy HT PCI MKII 153b:1177 +80 Hauppauge WinTV-IR Only 0070:9290 +81 Leadtek WinFast DTV1800 Hybrid 107d:6654 +82 WinFast DTV2000 H rev. J 107d:6f2b +83 Prof 7301 DVB-S/S2 b034:3034 +84 Samsung SMT 7020 DVB-S 18ac:dc00, 18ac:dccd +85 Twinhan VP-1027 DVB-S 1822:0023 +86 TeVii S464 DVB-S/S2 d464:9022 +87 Leadtek WinFast DTV2000 H PLUS 107d:6f42 +88 Leadtek WinFast DTV1800 H (XC4000) 107d:6f38 +89 Leadtek TV2000 XP Global (SC4100) 107d:6f36 +90 Leadtek TV2000 XP Global (XC4100) 107d:6f43 +=========== =================================================== ====================================================================================== diff --git a/Documentation/media/v4l-drivers/em28xx-cardlist.rst b/Documentation/media/v4l-drivers/em28xx-cardlist.rst index e72f2e5c0898..76b1d301754c 100644 --- a/Documentation/media/v4l-drivers/em28xx-cardlist.rst +++ b/Documentation/media/v4l-drivers/em28xx-cardlist.rst @@ -1,105 +1,107 @@ EM28xx cards list ================= -.. code-block:: none - - 0 -> Unknown EM2800 video grabber (em2800) [eb1a:2800] - 1 -> Unknown EM2750/28xx video grabber (em2820/em2840) [eb1a:2710,eb1a:2820,eb1a:2821,eb1a:2860,eb1a:2861,eb1a:2862,eb1a:2863,eb1a:2870,eb1a:2881,eb1a:2883,eb1a:2868,eb1a:2875] - 2 -> Terratec Cinergy 250 USB (em2820/em2840) [0ccd:0036] - 3 -> Pinnacle PCTV USB 2 (em2820/em2840) [2304:0208] - 4 -> Hauppauge WinTV USB 2 (em2820/em2840) [2040:4200,2040:4201] - 5 -> MSI VOX USB 2.0 (em2820/em2840) - 6 -> Terratec Cinergy 200 USB (em2800) - 7 -> Leadtek Winfast USB II (em2800) [0413:6023] - 8 -> Kworld USB2800 (em2800) - 9 -> Pinnacle Dazzle DVC 90/100/101/107 / Kaiser Baas Video to DVD maker (em2820/em2840) [1b80:e302,1b80:e304,2304:0207,2304:021a,093b:a003] - 10 -> Hauppauge WinTV HVR 900 (em2880) [2040:6500] - 11 -> Terratec Hybrid XS (em2880) - 12 -> Kworld PVR TV 2800 RF (em2820/em2840) - 13 -> Terratec Prodigy XS (em2880) - 14 -> SIIG AVTuner-PVR / Pixelview Prolink PlayTV USB 2.0 (em2820/em2840) - 15 -> V-Gear PocketTV (em2800) - 16 -> Hauppauge WinTV HVR 950 (em2883) [2040:6513,2040:6517,2040:651b] - 17 -> Pinnacle PCTV HD Pro Stick (em2880) [2304:0227] - 18 -> Hauppauge WinTV HVR 900 (R2) (em2880) [2040:6502] - 19 -> EM2860/SAA711X Reference Design (em2860) - 20 -> AMD ATI TV Wonder HD 600 (em2880) [0438:b002] - 21 -> eMPIA Technology, Inc. GrabBeeX+ Video Encoder (em2800) [eb1a:2801] - 22 -> EM2710/EM2750/EM2751 webcam grabber (em2750) [eb1a:2750,eb1a:2751] - 23 -> Huaqi DLCW-130 (em2750) - 24 -> D-Link DUB-T210 TV Tuner (em2820/em2840) [2001:f112] - 25 -> Gadmei UTV310 (em2820/em2840) - 26 -> Hercules Smart TV USB 2.0 (em2820/em2840) - 27 -> Pinnacle PCTV USB 2 (Philips FM1216ME) (em2820/em2840) - 28 -> Leadtek Winfast USB II Deluxe (em2820/em2840) - 29 -> EM2860/TVP5150 Reference Design (em2860) - 30 -> Videology 20K14XUSB USB2.0 (em2820/em2840) - 31 -> Usbgear VD204v9 (em2821) - 32 -> Supercomp USB 2.0 TV (em2821) - 33 -> Elgato Video Capture (em2860) [0fd9:0033] - 34 -> Terratec Cinergy A Hybrid XS (em2860) [0ccd:004f] - 35 -> Typhoon DVD Maker (em2860) - 36 -> NetGMBH Cam (em2860) - 37 -> Gadmei UTV330 (em2860) [eb1a:50a6] - 38 -> Yakumo MovieMixer (em2861) - 39 -> KWorld PVRTV 300U (em2861) [eb1a:e300] - 40 -> Plextor ConvertX PX-TV100U (em2861) [093b:a005] - 41 -> Kworld 350 U DVB-T (em2870) [eb1a:e350] - 42 -> Kworld 355 U DVB-T (em2870) [eb1a:e355,eb1a:e357,eb1a:e359] - 43 -> Terratec Cinergy T XS (em2870) - 44 -> Terratec Cinergy T XS (MT2060) (em2870) [0ccd:0043] - 45 -> Pinnacle PCTV DVB-T (em2870) - 46 -> Compro, VideoMate U3 (em2870) [185b:2870] - 47 -> KWorld DVB-T 305U (em2880) [eb1a:e305] - 48 -> KWorld DVB-T 310U (em2880) - 49 -> MSI DigiVox A/D (em2880) [eb1a:e310] - 50 -> MSI DigiVox A/D II (em2880) [eb1a:e320] - 51 -> Terratec Hybrid XS Secam (em2880) [0ccd:004c] - 52 -> DNT DA2 Hybrid (em2881) - 53 -> Pinnacle Hybrid Pro (em2881) - 54 -> Kworld VS-DVB-T 323UR (em2882) [eb1a:e323] - 55 -> Terratec Cinnergy Hybrid T USB XS (em2882) (em2882) [0ccd:005e,0ccd:0042] - 56 -> Pinnacle Hybrid Pro (330e) (em2882) [2304:0226] - 57 -> Kworld PlusTV HD Hybrid 330 (em2883) [eb1a:a316] - 58 -> Compro VideoMate ForYou/Stereo (em2820/em2840) [185b:2041] - 59 -> Pinnacle PCTV HD Mini (em2874) [2304:023f] - 60 -> Hauppauge WinTV HVR 850 (em2883) [2040:651f] - 61 -> Pixelview PlayTV Box 4 USB 2.0 (em2820/em2840) - 62 -> Gadmei TVR200 (em2820/em2840) - 63 -> Kaiomy TVnPC U2 (em2860) [eb1a:e303] - 64 -> Easy Cap Capture DC-60 (em2860) [1b80:e309] - 65 -> IO-DATA GV-MVP/SZ (em2820/em2840) [04bb:0515] - 66 -> Empire dual TV (em2880) - 67 -> Terratec Grabby (em2860) [0ccd:0096,0ccd:10AF] - 68 -> Terratec AV350 (em2860) [0ccd:0084] - 69 -> KWorld ATSC 315U HDTV TV Box (em2882) [eb1a:a313] - 70 -> Evga inDtube (em2882) - 71 -> Silvercrest Webcam 1.3mpix (em2820/em2840) - 72 -> Gadmei UTV330+ (em2861) - 73 -> Reddo DVB-C USB TV Box (em2870) - 74 -> Actionmaster/LinXcel/Digitus VC211A (em2800) - 75 -> Dikom DK300 (em2882) - 76 -> KWorld PlusTV 340U or UB435-Q (ATSC) (em2870) [1b80:a340] - 77 -> EM2874 Leadership ISDBT (em2874) - 78 -> PCTV nanoStick T2 290e (em28174) [2013:024f] - 79 -> Terratec Cinergy H5 (em2884) [eb1a:2885,0ccd:10a2,0ccd:10ad,0ccd:10b6] - 80 -> PCTV DVB-S2 Stick (460e) (em28174) [2013:024c] - 81 -> Hauppauge WinTV HVR 930C (em2884) [2040:1605] - 82 -> Terratec Cinergy HTC Stick (em2884) [0ccd:00b2] - 83 -> Honestech Vidbox NW03 (em2860) [eb1a:5006] - 84 -> MaxMedia UB425-TC (em2874) [1b80:e425] - 85 -> PCTV QuatroStick (510e) (em2884) [2304:0242] - 86 -> PCTV QuatroStick nano (520e) (em2884) [2013:0251] - 87 -> Terratec Cinergy HTC USB XS (em2884) [0ccd:008e,0ccd:00ac] - 88 -> C3 Tech Digital Duo HDTV/SDTV USB (em2884) [1b80:e755] - 89 -> Delock 61959 (em2874) [1b80:e1cc] - 90 -> KWorld USB ATSC TV Stick UB435-Q V2 (em2874) [1b80:e346] - 91 -> SpeedLink Vicious And Devine Laplace webcam (em2765) [1ae7:9003,1ae7:9004] - 92 -> PCTV DVB-S2 Stick (461e) (em28178) [2013:0258] - 93 -> KWorld USB ATSC TV Stick UB435-Q V3 (em2874) [1b80:e34c] - 94 -> PCTV tripleStick (292e) (em28178) [2013:025f,2040:0264] - 95 -> Leadtek VC100 (em2861) [0413:6f07] - 96 -> Terratec Cinergy T2 Stick HD (em28178) [eb1a:8179] - 97 -> Elgato EyeTV Hybrid 2008 INT (em2884) [0fd9:0018] - 98 -> PLEX PX-BCUD (em28178) [3275:0085] - 99 -> Hauppauge WinTV-dualHD DVB (em28174) [2040:0265] +=========== ==================================================================== ================ ================================================================================================================================== +Card number Card name Empia Chip USB IDs +=========== ==================================================================== ================ ================================================================================================================================== +0 Unknown EM2800 video grabber em2800 eb1a:2800 +1 Unknown EM2750/28xx video grabber em2820 or em2840 eb1a:2710, eb1a:2820, eb1a:2821, eb1a:2860, eb1a:2861, eb1a:2862, eb1a:2863, eb1a:2870, eb1a:2881, eb1a:2883, eb1a:2868, eb1a:2875 +2 Terratec Cinergy 250 USB em2820 or em2840 0ccd:0036 +3 Pinnacle PCTV USB 2 em2820 or em2840 2304:0208 +4 Hauppauge WinTV USB 2 em2820 or em2840 2040:4200, 2040:4201 +5 MSI VOX USB 2.0 em2820 or em2840 +6 Terratec Cinergy 200 USB em2800 +7 Leadtek Winfast USB II em2800 0413:6023 +8 Kworld USB2800 em2800 +9 Pinnacle Dazzle DVC 90/100/101/107 / Kaiser Baas Video to DVD maker em2820 or em2840 1b80:e302, 1b80:e304, 2304:0207, 2304:021a, 093b:a003 +10 Hauppauge WinTV HVR 900 em2880 2040:6500 +11 Terratec Hybrid XS em2880 +12 Kworld PVR TV 2800 RF em2820 or em2840 +13 Terratec Prodigy XS em2880 +14 SIIG AVTuner-PVR / Pixelview Prolink PlayTV USB 2.0 em2820 or em2840 +15 V-Gear PocketTV em2800 +16 Hauppauge WinTV HVR 950 em2883 2040:6513, 2040:6517, 2040:651b +17 Pinnacle PCTV HD Pro Stick em2880 2304:0227 +18 Hauppauge WinTV HVR 900 (R2) em2880 2040:6502 +19 EM2860/SAA711X Reference Design em2860 +20 AMD ATI TV Wonder HD 600 em2880 0438:b002 +21 eMPIA Technology, Inc. GrabBeeX+ Video Encoder em2800 eb1a:2801 +22 EM2710/EM2750/EM2751 webcam grabber em2750 eb1a:2750, eb1a:2751 +23 Huaqi DLCW-130 em2750 +24 D-Link DUB-T210 TV Tuner em2820 or em2840 2001:f112 +25 Gadmei UTV310 em2820 or em2840 +26 Hercules Smart TV USB 2.0 em2820 or em2840 +27 Pinnacle PCTV USB 2 (Philips FM1216ME) em2820 or em2840 +28 Leadtek Winfast USB II Deluxe em2820 or em2840 +29 EM2860/TVP5150 Reference Design em2860 +30 Videology 20K14XUSB USB2.0 em2820 or em2840 +31 Usbgear VD204v9 em2821 +32 Supercomp USB 2.0 TV em2821 +33 Elgato Video Capture em2860 0fd9:0033 +34 Terratec Cinergy A Hybrid XS em2860 0ccd:004f +35 Typhoon DVD Maker em2860 +36 NetGMBH Cam em2860 +37 Gadmei UTV330 em2860 eb1a:50a6 +38 Yakumo MovieMixer em2861 +39 KWorld PVRTV 300U em2861 eb1a:e300 +40 Plextor ConvertX PX-TV100U em2861 093b:a005 +41 Kworld 350 U DVB-T em2870 eb1a:e350 +42 Kworld 355 U DVB-T em2870 eb1a:e355, eb1a:e357, eb1a:e359 +43 Terratec Cinergy T XS em2870 +44 Terratec Cinergy T XS (MT2060) em2870 0ccd:0043 +45 Pinnacle PCTV DVB-T em2870 +46 Compro, VideoMate U3 em2870 185b:2870 +47 KWorld DVB-T 305U em2880 eb1a:e305 +48 KWorld DVB-T 310U em2880 +49 MSI DigiVox A/D em2880 eb1a:e310 +50 MSI DigiVox A/D II em2880 eb1a:e320 +51 Terratec Hybrid XS Secam em2880 0ccd:004c +52 DNT DA2 Hybrid em2881 +53 Pinnacle Hybrid Pro em2881 +54 Kworld VS-DVB-T 323UR em2882 eb1a:e323 +55 Terratec Cinnergy Hybrid T USB XS (em2882) em2882 0ccd:005e, 0ccd:0042 +56 Pinnacle Hybrid Pro (330e) em2882 2304:0226 +57 Kworld PlusTV HD Hybrid 330 em2883 eb1a:a316 +58 Compro VideoMate ForYou/Stereo em2820 or em2840 185b:2041 +59 Pinnacle PCTV HD Mini em2874 2304:023f +60 Hauppauge WinTV HVR 850 em2883 2040:651f +61 Pixelview PlayTV Box 4 USB 2.0 em2820 or em2840 +62 Gadmei TVR200 em2820 or em2840 +63 Kaiomy TVnPC U2 em2860 eb1a:e303 +64 Easy Cap Capture DC-60 em2860 1b80:e309 +65 IO-DATA GV-MVP/SZ em2820 or em2840 04bb:0515 +66 Empire dual TV em2880 +67 Terratec Grabby em2860 0ccd:0096, 0ccd:10AF +68 Terratec AV350 em2860 0ccd:0084 +69 KWorld ATSC 315U HDTV TV Box em2882 eb1a:a313 +70 Evga inDtube em2882 +71 Silvercrest Webcam 1.3mpix em2820 or em2840 +72 Gadmei UTV330+ em2861 +73 Reddo DVB-C USB TV Box em2870 +74 Actionmaster/LinXcel/Digitus VC211A em2800 +75 Dikom DK300 em2882 +76 KWorld PlusTV 340U or UB435-Q (ATSC) em2870 1b80:a340 +77 EM2874 Leadership ISDBT em2874 +78 PCTV nanoStick T2 290e em28174 2013:024f +79 Terratec Cinergy H5 em2884 eb1a:2885, 0ccd:10a2, 0ccd:10ad, 0ccd:10b6 +80 PCTV DVB-S2 Stick (460e) em28174 2013:024c +81 Hauppauge WinTV HVR 930C em2884 2040:1605 +82 Terratec Cinergy HTC Stick em2884 0ccd:00b2 +83 Honestech Vidbox NW03 em2860 eb1a:5006 +84 MaxMedia UB425-TC em2874 1b80:e425 +85 PCTV QuatroStick (510e) em2884 2304:0242 +86 PCTV QuatroStick nano (520e) em2884 2013:0251 +87 Terratec Cinergy HTC USB XS em2884 0ccd:008e, 0ccd:00ac +88 C3 Tech Digital Duo HDTV/SDTV USB em2884 1b80:e755 +89 Delock 61959 em2874 1b80:e1cc +90 KWorld USB ATSC TV Stick UB435-Q V2 em2874 1b80:e346 +91 SpeedLink Vicious And Devine Laplace webcam em2765 1ae7:9003, 1ae7:9004 +92 PCTV DVB-S2 Stick (461e) em28178 2013:0258 +93 KWorld USB ATSC TV Stick UB435-Q V3 em2874 1b80:e34c +94 PCTV tripleStick (292e) em28178 2013:025f, 2040:0264 +95 Leadtek VC100 em2861 0413:6f07 +96 Terratec Cinergy T2 Stick HD em28178 eb1a:8179 +97 Elgato EyeTV Hybrid 2008 INT em2884 0fd9:0018 +98 PLEX PX-BCUD em28178 3275:0085 +99 Hauppauge WinTV-dualHD DVB em28174 2040:0265 +=========== ==================================================================== ================ ================================================================================================================================== diff --git a/Documentation/media/v4l-drivers/gspca-cardlist.rst b/Documentation/media/v4l-drivers/gspca-cardlist.rst index 33a8ac7d73ab..e18d87e80d78 100644 --- a/Documentation/media/v4l-drivers/gspca-cardlist.rst +++ b/Documentation/media/v4l-drivers/gspca-cardlist.rst @@ -6,407 +6,444 @@ The modules for the gspca webcam drivers are: - gspca_main: main driver - gspca\_\ *driver*: subdriver module with *driver* as follows -========= ========= ==================================================================== +========= ========= =================================================================== *driver* vend:prod Device -========= ========= ==================================================================== -spca501 0000:0000 MystFromOri Unknown Camera -spca508 0130:0130 Clone Digital Webcam 11043 -zc3xx 03f0:1b07 HP Premium Starter Cam -m5602 0402:5602 ALi Video Camera Controller -spca501 040a:0002 Kodak DVC-325 -spca500 040a:0300 Kodak EZ200 -zc3xx 041e:041e Creative WebCam Live! -ov519 041e:4003 Video Blaster WebCam Go Plus -spca500 041e:400a Creative PC-CAM 300 -sunplus 041e:400b Creative PC-CAM 600 -sunplus 041e:4012 PC-Cam350 -sunplus 041e:4013 Creative Pccam750 -zc3xx 041e:4017 Creative Webcam Mobile PD1090 -spca508 041e:4018 Creative Webcam Vista (PD1100) -spca561 041e:401a Creative Webcam Vista (PD1100) -zc3xx 041e:401c Creative NX -spca505 041e:401d Creative Webcam NX ULTRA -zc3xx 041e:401e Creative Nx Pro -zc3xx 041e:401f Creative Webcam Notebook PD1171 -pac207 041e:4028 Creative Webcam Vista Plus -zc3xx 041e:4029 Creative WebCam Vista Pro -zc3xx 041e:4034 Creative Instant P0620 -zc3xx 041e:4035 Creative Instant P0620D -zc3xx 041e:4036 Creative Live ! -sq930x 041e:4038 Creative Joy-IT -zc3xx 041e:403a Creative Nx Pro 2 -spca561 041e:403b Creative Webcam Vista (VF0010) -sq930x 041e:403c Creative Live! Ultra -sq930x 041e:403d Creative Live! Ultra for Notebooks -sq930x 041e:4041 Creative Live! Motion -zc3xx 041e:4051 Creative Live!Cam Notebook Pro (VF0250) -ov519 041e:4052 Creative Live! VISTA IM -zc3xx 041e:4053 Creative Live!Cam Video IM -vc032x 041e:405b Creative Live! Cam Notebook Ultra (VC0130) -ov519 041e:405f Creative Live! VISTA VF0330 -ov519 041e:4060 Creative Live! VISTA VF0350 -ov519 041e:4061 Creative Live! VISTA VF0400 -ov519 041e:4064 Creative Live! VISTA VF0420 -ov519 041e:4067 Creative Live! Cam Video IM (VF0350) -ov519 041e:4068 Creative Live! VISTA VF0470 -spca561 0458:7004 Genius VideoCAM Express V2 -sn9c2028 0458:7005 Genius Smart 300, version 2 -sunplus 0458:7006 Genius Dsc 1.3 Smart -zc3xx 0458:7007 Genius VideoCam V2 -zc3xx 0458:700c Genius VideoCam V3 -zc3xx 0458:700f Genius VideoCam Web V2 -sonixj 0458:7025 Genius Eye 311Q -sn9c20x 0458:7029 Genius Look 320s -sonixj 0458:702e Genius Slim 310 NB -sn9c20x 0458:7045 Genius Look 1320 V2 -sn9c20x 0458:704a Genius Slim 1320 -sn9c20x 0458:704c Genius i-Look 1321 -sn9c20x 045e:00f4 LifeCam VX-6000 (SN9C20x + OV9650) -sonixj 045e:00f5 MicroSoft VX3000 -sonixj 045e:00f7 MicroSoft VX1000 -ov519 045e:028c Micro$oft xbox cam -spca508 0461:0815 Micro Innovation IC200 -sunplus 0461:0821 Fujifilm MV-1 -zc3xx 0461:0a00 MicroInnovation WebCam320 -stv06xx 046d:0840 QuickCam Express -stv06xx 046d:0850 LEGO cam / QuickCam Web -stv06xx 046d:0870 Dexxa WebCam USB -spca500 046d:0890 Logitech QuickCam traveler -vc032x 046d:0892 Logitech Orbicam -vc032x 046d:0896 Logitech Orbicam -vc032x 046d:0897 Logitech QuickCam for Dell notebooks -zc3xx 046d:089d Logitech QuickCam E2500 -zc3xx 046d:08a0 Logitech QC IM -zc3xx 046d:08a1 Logitech QC IM 0x08A1 +sound -zc3xx 046d:08a2 Labtec Webcam Pro -zc3xx 046d:08a3 Logitech QC Chat -zc3xx 046d:08a6 Logitech QCim -zc3xx 046d:08a7 Logitech QuickCam Image -zc3xx 046d:08a9 Logitech Notebook Deluxe -zc3xx 046d:08aa Labtec Webcam Notebook -zc3xx 046d:08ac Logitech QuickCam Cool -zc3xx 046d:08ad Logitech QCCommunicate STX -zc3xx 046d:08ae Logitech QuickCam for Notebooks -zc3xx 046d:08af Logitech QuickCam Cool -zc3xx 046d:08b9 Logitech QuickCam Express -zc3xx 046d:08d7 Logitech QCam STX -zc3xx 046d:08d9 Logitech QuickCam IM/Connect -zc3xx 046d:08d8 Logitech Notebook Deluxe -zc3xx 046d:08da Logitech QuickCam Messenger -zc3xx 046d:08dd Logitech QuickCam for Notebooks -spca500 046d:0900 Logitech Inc. ClickSmart 310 -spca500 046d:0901 Logitech Inc. ClickSmart 510 -sunplus 046d:0905 Logitech ClickSmart 820 -tv8532 046d:0920 Logitech QuickCam Express -tv8532 046d:0921 Labtec Webcam -spca561 046d:0928 Logitech QC Express Etch2 -spca561 046d:0929 Labtec Webcam Elch2 -spca561 046d:092a Logitech QC for Notebook -spca561 046d:092b Labtec Webcam Plus -spca561 046d:092c Logitech QC chat Elch2 -spca561 046d:092d Logitech QC Elch2 -spca561 046d:092e Logitech QC Elch2 -spca561 046d:092f Logitech QuickCam Express Plus -sunplus 046d:0960 Logitech ClickSmart 420 -nw80x 046d:d001 Logitech QuickCam Pro (dark focus ring) -sunplus 0471:0322 Philips DMVC1300K -zc3xx 0471:0325 Philips SPC 200 NC -zc3xx 0471:0326 Philips SPC 300 NC -sonixj 0471:0327 Philips SPC 600 NC -sonixj 0471:0328 Philips SPC 700 NC -zc3xx 0471:032d Philips SPC 210 NC -zc3xx 0471:032e Philips SPC 315 NC -sonixj 0471:0330 Philips SPC 710 NC -spca501 0497:c001 Smile International -sunplus 04a5:3003 Benq DC 1300 -sunplus 04a5:3008 Benq DC 1500 -sunplus 04a5:300a Benq DC 3410 -spca500 04a5:300c Benq DC 1016 -benq 04a5:3035 Benq DC E300 -finepix 04cb:0104 Fujifilm FinePix 4800 -finepix 04cb:0109 Fujifilm FinePix A202 -finepix 04cb:010b Fujifilm FinePix A203 -finepix 04cb:010f Fujifilm FinePix A204 -finepix 04cb:0111 Fujifilm FinePix A205 -finepix 04cb:0113 Fujifilm FinePix A210 -finepix 04cb:0115 Fujifilm FinePix A303 -finepix 04cb:0117 Fujifilm FinePix A310 -finepix 04cb:0119 Fujifilm FinePix F401 -finepix 04cb:011b Fujifilm FinePix F402 -finepix 04cb:011d Fujifilm FinePix F410 -finepix 04cb:0121 Fujifilm FinePix F601 -finepix 04cb:0123 Fujifilm FinePix F700 -finepix 04cb:0125 Fujifilm FinePix M603 -finepix 04cb:0127 Fujifilm FinePix S300 -finepix 04cb:0129 Fujifilm FinePix S304 -finepix 04cb:012b Fujifilm FinePix S500 -finepix 04cb:012d Fujifilm FinePix S602 -finepix 04cb:012f Fujifilm FinePix S700 -finepix 04cb:0131 Fujifilm FinePix unknown model -finepix 04cb:013b Fujifilm FinePix unknown model -finepix 04cb:013d Fujifilm FinePix unknown model -finepix 04cb:013f Fujifilm FinePix F420 -sunplus 04f1:1001 JVC GC A50 -spca561 04fc:0561 Flexcam 100 -spca1528 04fc:1528 Sunplus MD80 clone -sunplus 04fc:500c Sunplus CA500C -sunplus 04fc:504a Aiptek Mini PenCam 1.3 -sunplus 04fc:504b Maxell MaxPocket LE 1.3 -sunplus 04fc:5330 Digitrex 2110 -sunplus 04fc:5360 Sunplus Generic -spca500 04fc:7333 PalmPixDC85 -sunplus 04fc:ffff Pure DigitalDakota -nw80x 0502:d001 DVC V6 -spca501 0506:00df 3Com HomeConnect Lite -sunplus 052b:1507 Megapixel 5 Pretec DC-1007 -sunplus 052b:1513 Megapix V4 -sunplus 052b:1803 MegaImage VI -nw80x 052b:d001 EZCam Pro p35u -tv8532 0545:808b Veo Stingray -tv8532 0545:8333 Veo Stingray -sunplus 0546:3155 Polaroid PDC3070 -sunplus 0546:3191 Polaroid Ion 80 -sunplus 0546:3273 Polaroid PDC2030 -ov519 054c:0154 Sonny toy4 -ov519 054c:0155 Sonny toy5 -cpia1 0553:0002 CPIA CPiA (version1) based cameras -zc3xx 055f:c005 Mustek Wcam300A -spca500 055f:c200 Mustek Gsmart 300 -sunplus 055f:c211 Kowa Bs888e Microcamera -spca500 055f:c220 Gsmart Mini -sunplus 055f:c230 Mustek Digicam 330K -sunplus 055f:c232 Mustek MDC3500 -sunplus 055f:c360 Mustek DV4000 Mpeg4 -sunplus 055f:c420 Mustek gSmart Mini 2 -sunplus 055f:c430 Mustek Gsmart LCD 2 -sunplus 055f:c440 Mustek DV 3000 -sunplus 055f:c520 Mustek gSmart Mini 3 -sunplus 055f:c530 Mustek Gsmart LCD 3 -sunplus 055f:c540 Gsmart D30 -sunplus 055f:c630 Mustek MDC4000 -sunplus 055f:c650 Mustek MDC5500Z -nw80x 055f:d001 Mustek Wcam 300 mini -zc3xx 055f:d003 Mustek WCam300A -zc3xx 055f:d004 Mustek WCam300 AN -conex 0572:0041 Creative Notebook cx11646 -ov519 05a9:0511 Video Blaster WebCam 3/WebCam Plus, D-Link USB Digital Video Camera -ov519 05a9:0518 Creative WebCam -ov519 05a9:0519 OV519 Microphone -ov519 05a9:0530 OmniVision -ov534_9 05a9:1550 OmniVision VEHO Filmscanner -ov519 05a9:2800 OmniVision SuperCAM -ov519 05a9:4519 Webcam Classic -ov534_9 05a9:8065 OmniVision test kit ov538+ov9712 -ov519 05a9:8519 OmniVision -ov519 05a9:a511 D-Link USB Digital Video Camera -ov519 05a9:a518 D-Link DSB-C310 Webcam -sunplus 05da:1018 Digital Dream Enigma 1.3 -stk014 05e1:0893 Syntek DV4000 -gl860 05e3:0503 Genesys Logic PC Camera -gl860 05e3:f191 Genesys Logic PC Camera -spca561 060b:a001 Maxell Compact Pc PM3 -zc3xx 0698:2003 CTX M730V built in -topro 06a2:0003 TP6800 PC Camera, CmoX CX0342 webcam -topro 06a2:6810 Creative Qmax -nw80x 06a5:0000 Typhoon Webcam 100 USB -nw80x 06a5:d001 Divio based webcams -nw80x 06a5:d800 Divio Chicony TwinkleCam, Trust SpaceCam -spca500 06bd:0404 Agfa CL20 -spca500 06be:0800 Optimedia -nw80x 06be:d001 EZCam Pro p35u -sunplus 06d6:0031 Trust 610 LCD PowerC@m Zoom -spca506 06e1:a190 ADS Instant VCD -ov534 06f8:3002 Hercules Blog Webcam -ov534_9 06f8:3003 Hercules Dualpix HD Weblog -sonixj 06f8:3004 Hercules Classic Silver -sonixj 06f8:3008 Hercules Deluxe Optical Glass -pac7302 06f8:3009 Hercules Classic Link -pac7302 06f8:301b Hercules Link -nw80x 0728:d001 AVerMedia Camguard -spca508 0733:0110 ViewQuest VQ110 -spca501 0733:0401 Intel Create and Share -spca501 0733:0402 ViewQuest M318B -spca505 0733:0430 Intel PC Camera Pro -sunplus 0733:1311 Digital Dream Epsilon 1.3 -sunplus 0733:1314 Mercury 2.1MEG Deluxe Classic Cam -sunplus 0733:2211 Jenoptik jdc 21 LCD -sunplus 0733:2221 Mercury Digital Pro 3.1p -sunplus 0733:3261 Concord 3045 spca536a -sunplus 0733:3281 Cyberpix S550V -spca506 0734:043b 3DeMon USB Capture aka -cpia1 0813:0001 QX3 camera -ov519 0813:0002 Dual Mode USB Camera Plus -spca500 084d:0003 D-Link DSC-350 -spca500 08ca:0103 Aiptek PocketDV -sunplus 08ca:0104 Aiptek PocketDVII 1.3 -sunplus 08ca:0106 Aiptek Pocket DV3100+ -mr97310a 08ca:0110 Trust Spyc@m 100 -mr97310a 08ca:0111 Aiptek PenCam VGA+ -sunplus 08ca:2008 Aiptek Mini PenCam 2 M -sunplus 08ca:2010 Aiptek PocketCam 3M -sunplus 08ca:2016 Aiptek PocketCam 2 Mega -sunplus 08ca:2018 Aiptek Pencam SD 2M -sunplus 08ca:2020 Aiptek Slim 3000F -sunplus 08ca:2022 Aiptek Slim 3200 -sunplus 08ca:2024 Aiptek DV3500 Mpeg4 -sunplus 08ca:2028 Aiptek PocketCam4M -sunplus 08ca:2040 Aiptek PocketDV4100M -sunplus 08ca:2042 Aiptek PocketDV5100 -sunplus 08ca:2050 Medion MD 41437 -sunplus 08ca:2060 Aiptek PocketDV5300 -tv8532 0923:010f ICM532 cams -mars 093a:050f Mars-Semi Pc-Camera -mr97310a 093a:010e All known CIF cams with this ID -mr97310a 093a:010f All known VGA cams with this ID -pac207 093a:2460 Qtec Webcam 100 -pac207 093a:2461 HP Webcam -pac207 093a:2463 Philips SPC 220 NC -pac207 093a:2464 Labtec Webcam 1200 -pac207 093a:2468 Webcam WB-1400T -pac207 093a:2470 Genius GF112 -pac207 093a:2471 Genius VideoCam ge111 -pac207 093a:2472 Genius VideoCam ge110 -pac207 093a:2474 Genius iLook 111 -pac207 093a:2476 Genius e-Messenger 112 -pac7311 093a:2600 PAC7311 Typhoon -pac7311 093a:2601 Philips SPC 610 NC -pac7311 093a:2603 Philips SPC 500 NC -pac7311 093a:2608 Trust WB-3300p -pac7311 093a:260e Gigaware VGA PC Camera, Trust WB-3350p, SIGMA cam 2350 -pac7311 093a:260f SnakeCam -pac7302 093a:2620 Apollo AC-905 -pac7302 093a:2621 PAC731x -pac7302 093a:2622 Genius Eye 312 -pac7302 093a:2624 PAC7302 -pac7302 093a:2625 Genius iSlim 310 -pac7302 093a:2626 Labtec 2200 -pac7302 093a:2627 Genius FaceCam 300 -pac7302 093a:2628 Genius iLook 300 -pac7302 093a:2629 Genious iSlim 300 -pac7302 093a:262a Webcam 300k -pac7302 093a:262c Philips SPC 230 NC -jl2005bcd 0979:0227 Various brands, 19 known cameras supported -jeilinj 0979:0280 Sakar 57379 -jeilinj 0979:0280 Sportscam DV15 -zc3xx 0ac8:0302 Z-star Vimicro zc0302 -vc032x 0ac8:0321 Vimicro generic vc0321 -vc032x 0ac8:0323 Vimicro Vc0323 -vc032x 0ac8:0328 A4Tech PK-130MG -zc3xx 0ac8:301b Z-Star zc301b -zc3xx 0ac8:303b Vimicro 0x303b -zc3xx 0ac8:305b Z-star Vimicro zc0305b -zc3xx 0ac8:307b PC Camera (ZS0211) -vc032x 0ac8:c001 Sony embedded vimicro -vc032x 0ac8:c002 Sony embedded vimicro -vc032x 0ac8:c301 Samsung Q1 Ultra Premium -spca508 0af9:0010 Hama USB Sightcam 100 -spca508 0af9:0011 Hama USB Sightcam 100 -ov519 0b62:0059 iBOT2 Webcam -sonixb 0c45:6001 Genius VideoCAM NB -sonixb 0c45:6005 Microdia Sweex Mini Webcam -sonixb 0c45:6007 Sonix sn9c101 + Tas5110D -sonixb 0c45:6009 spcaCam@120 -sonixb 0c45:600d spcaCam@120 -sonixb 0c45:6011 Microdia PC Camera (SN9C102) -sonixb 0c45:6019 Generic Sonix OV7630 -sonixb 0c45:6024 Generic Sonix Tas5130c -sonixb 0c45:6025 Xcam Shanga -sonixb 0c45:6028 Sonix Btc Pc380 -sonixb 0c45:6029 spcaCam@150 -sonixb 0c45:602c Generic Sonix OV7630 -sonixb 0c45:602d LIC-200 LG -sonixb 0c45:602e Genius VideoCam Messenger -sonixj 0c45:6040 Speed NVC 350K -sonixj 0c45:607c Sonix sn9c102p Hv7131R -sonixj 0c45:60c0 Sangha Sn535 -sonixj 0c45:60ce USB-PC-Camera-168 (TALK-5067) -sonixj 0c45:60ec SN9C105+MO4000 -sonixj 0c45:60fb Surfer NoName -sonixj 0c45:60fc LG-LIC300 -sonixj 0c45:60fe Microdia Audio -sonixj 0c45:6100 PC Camera (SN9C128) -sonixj 0c45:6102 PC Camera (SN9C128) -sonixj 0c45:610a PC Camera (SN9C128) -sonixj 0c45:610b PC Camera (SN9C128) -sonixj 0c45:610c PC Camera (SN9C128) -sonixj 0c45:610e PC Camera (SN9C128) -sonixj 0c45:6128 Microdia/Sonix SNP325 -sonixj 0c45:612a Avant Camera -sonixj 0c45:612b Speed-Link REFLECT2 -sonixj 0c45:612c Typhoon Rasy Cam 1.3MPix -sonixj 0c45:6130 Sonix Pccam -sonixj 0c45:6138 Sn9c120 Mo4000 -sonixj 0c45:613a Microdia Sonix PC Camera -sonixj 0c45:613b Surfer SN-206 -sonixj 0c45:613c Sonix Pccam168 -sonixj 0c45:6142 Hama PC-Webcam AC-150 -sonixj 0c45:6143 Sonix Pccam168 -sonixj 0c45:6148 Digitus DA-70811/ZSMC USB PC Camera ZS211/Microdia -sonixj 0c45:614a Frontech E-Ccam (JIL-2225) -sn9c20x 0c45:6240 PC Camera (SN9C201 + MT9M001) -sn9c20x 0c45:6242 PC Camera (SN9C201 + MT9M111) -sn9c20x 0c45:6248 PC Camera (SN9C201 + OV9655) -sn9c20x 0c45:624c PC Camera (SN9C201 + MT9M112) -sn9c20x 0c45:624e PC Camera (SN9C201 + SOI968) -sn9c20x 0c45:624f PC Camera (SN9C201 + OV9650) -sn9c20x 0c45:6251 PC Camera (SN9C201 + OV9650) -sn9c20x 0c45:6253 PC Camera (SN9C201 + OV9650) -sn9c20x 0c45:6260 PC Camera (SN9C201 + OV7670) -sn9c20x 0c45:6270 PC Camera (SN9C201 + MT9V011/MT9V111/MT9V112) -sn9c20x 0c45:627b PC Camera (SN9C201 + OV7660) -sn9c20x 0c45:627c PC Camera (SN9C201 + HV7131R) -sn9c20x 0c45:627f PC Camera (SN9C201 + OV9650) -sn9c20x 0c45:6280 PC Camera (SN9C202 + MT9M001) -sn9c20x 0c45:6282 PC Camera (SN9C202 + MT9M111) -sn9c20x 0c45:6288 PC Camera (SN9C202 + OV9655) -sn9c20x 0c45:628c PC Camera (SN9C201 + MT9M112) -sn9c20x 0c45:628e PC Camera (SN9C202 + SOI968) -sn9c20x 0c45:628f PC Camera (SN9C202 + OV9650) -sn9c20x 0c45:62a0 PC Camera (SN9C202 + OV7670) -sn9c20x 0c45:62b0 PC Camera (SN9C202 + MT9V011/MT9V111/MT9V112) -sn9c20x 0c45:62b3 PC Camera (SN9C202 + OV9655) -sn9c20x 0c45:62bb PC Camera (SN9C202 + OV7660) -sn9c20x 0c45:62bc PC Camera (SN9C202 + HV7131R) -sn9c2028 0c45:8001 Wild Planet Digital Spy Camera -sn9c2028 0c45:8003 Sakar #11199, #6637x, #67480 keychain cams -sn9c2028 0c45:8008 Mini-Shotz ms-350 -sn9c2028 0c45:800a Vivitar Vivicam 3350B -sunplus 0d64:0303 Sunplus FashionCam DXG -ov519 0e96:c001 TRUST 380 USB2 SPACEC@M -etoms 102c:6151 Qcam Sangha CIF -etoms 102c:6251 Qcam xxxxxx VGA -ov519 1046:9967 W9967CF/W9968CF WebCam IC, Video Blaster WebCam Go -zc3xx 10fd:0128 Typhoon Webshot II USB 300k 0x0128 -spca561 10fd:7e50 FlyCam Usb 100 -zc3xx 10fd:8050 Typhoon Webshot II USB 300k -ov534 1415:2000 Sony HD Eye for PS3 (SLEH 00201) -pac207 145f:013a Trust WB-1300N -sn9c20x 145f:013d Trust WB-3600R -vc032x 15b8:6001 HP 2.0 Megapixel -vc032x 15b8:6002 HP 2.0 Megapixel rz406aa -spca501 1776:501c Arowana 300K CMOS Camera -t613 17a1:0128 TASCORP JPEG Webcam, NGS Cyclops -vc032x 17ef:4802 Lenovo Vc0323+MI1310_SOC -pac207 2001:f115 D-Link DSB-C120 -sq905c 2770:9050 Disney pix micro (CIF) -sq905c 2770:9051 Lego Bionicle -sq905c 2770:9052 Disney pix micro 2 (VGA) -sq905c 2770:905c All 11 known cameras with this ID -sq905 2770:9120 All 24 known cameras with this ID -sq905c 2770:913d All 4 known cameras with this ID -sq930x 2770:930b Sweex Motion Tracking / I-Tec iCam Tracer -sq930x 2770:930c Trust WB-3500T / NSG Robbie 2.0 -spca500 2899:012c Toptro Industrial -ov519 8020:ef04 ov519 -spca508 8086:0110 Intel Easy PC Camera -spca500 8086:0630 Intel Pocket PC Camera -spca506 99fa:8988 Grandtec V.cap -sn9c20x a168:0610 Dino-Lite Digital Microscope (SN9C201 + HV7131R) -sn9c20x a168:0611 Dino-Lite Digital Microscope (SN9C201 + HV7131R) -sn9c20x a168:0613 Dino-Lite Digital Microscope (SN9C201 + HV7131R) -sn9c20x a168:0618 Dino-Lite Digital Microscope (SN9C201 + HV7131R) -sn9c20x a168:0614 Dino-Lite Digital Microscope (SN9C201 + MT9M111) -sn9c20x a168:0615 Dino-Lite Digital Microscope (SN9C201 + MT9M111) -sn9c20x a168:0617 Dino-Lite Digital Microscope (SN9C201 + MT9M111) -spca561 abcd:cdee Petcam -========= ========= ==================================================================== +========= ========= =================================================================== +spca501 0000:0000 MystFromOri Unknown Camera +spca508 0130:0130 Clone Digital Webcam 11043 +se401 03e8:0004 Endpoints/AoxSE401 +zc3xx 03f0:1b07 HP Premium Starter Cam +m5602 0402:5602 ALi Video Camera Controller +spca501 040a:0002 Kodak DVC-325 +spca500 040a:0300 Kodak EZ200 +zc3xx 041e:041e Creative WebCam Live! +ov519 041e:4003 Video Blaster WebCam Go Plus +stv0680 041e:4007 Go Mini +spca500 041e:400a Creative PC-CAM 300 +sunplus 041e:400b Creative PC-CAM 600 +sunplus 041e:4012 PC-Cam350 +sunplus 041e:4013 Creative Pccam750 +zc3xx 041e:4017 Creative Webcam Mobile PD1090 +spca508 041e:4018 Creative Webcam Vista (PD1100) +spca561 041e:401a Creative Webcam Vista (PD1100) +zc3xx 041e:401c Creative NX +spca505 041e:401d Creative Webcam NX ULTRA +zc3xx 041e:401e Creative Nx Pro +zc3xx 041e:401f Creative Webcam Notebook PD1171 +zc3xx 041e:4022 Webcam NX Pro +pac207 041e:4028 Creative Webcam Vista Plus +zc3xx 041e:4029 Creative WebCam Vista Pro +zc3xx 041e:4034 Creative Instant P0620 +zc3xx 041e:4035 Creative Instant P0620D +zc3xx 041e:4036 Creative Live ! +sq930x 041e:4038 Creative Joy-IT +zc3xx 041e:403a Creative Nx Pro 2 +spca561 041e:403b Creative Webcam Vista (VF0010) +sq930x 041e:403c Creative Live! Ultra +sq930x 041e:403d Creative Live! Ultra for Notebooks +sq930x 041e:4041 Creative Live! Motion +zc3xx 041e:4051 Creative Live!Cam Notebook Pro (VF0250) +ov519 041e:4052 Creative Live! VISTA IM +zc3xx 041e:4053 Creative Live!Cam Video IM +vc032x 041e:405b Creative Live! Cam Notebook Ultra (VC0130) +ov519 041e:405f Creative Live! VISTA VF0330 +ov519 041e:4060 Creative Live! VISTA VF0350 +ov519 041e:4061 Creative Live! VISTA VF0400 +ov519 041e:4064 Creative Live! VISTA VF0420 +ov519 041e:4067 Creative Live! Cam Video IM (VF0350) +ov519 041e:4068 Creative Live! VISTA VF0470 +sn9c2028 0458:7003 GeniusVideocam Live v2 +spca561 0458:7004 Genius VideoCAM Express V2 +sn9c2028 0458:7005 Genius Smart 300, version 2 +sunplus 0458:7006 Genius Dsc 1.3 Smart +zc3xx 0458:7007 Genius VideoCam V2 +zc3xx 0458:700c Genius VideoCam V3 +zc3xx 0458:700f Genius VideoCam Web V2 +sonixj 0458:7025 Genius Eye 311Q +sn9c20x 0458:7029 Genius Look 320s +sonixj 0458:702e Genius Slim 310 NB +sn9c20x 0458:7045 Genius Look 1320 V2 +sn9c20x 0458:704a Genius Slim 1320 +sn9c20x 0458:704c Genius i-Look 1321 +sn9c20x 045e:00f4 LifeCam VX-6000 (SN9C20x + OV9650) +sonixj 045e:00f5 MicroSoft VX3000 +sonixj 045e:00f7 MicroSoft VX1000 +ov519 045e:028c Micro$oft xbox cam +kinect 045e:02ae Xbox NUI Camera +kinect 045e:02bf Kinect for Windows NUI Camera +spca561 0461:0815 Micro Innovations IC200 Webcam +sunplus 0461:0821 Fujifilm MV-1 +zc3xx 0461:0a00 MicroInnovation WebCam320 +stv06xx 046D:08F0 QuickCamMessenger +stv06xx 046D:08F5 QuickCamCommunicate +stv06xx 046D:08F6 QuickCamMessenger (new) +stv06xx 046d:0840 QuickCamExpress +stv06xx 046d:0850 LEGOcam / QuickCam Web +stv06xx 046d:0870 DexxaWebCam USB +spca500 046d:0890 Logitech QuickCam traveler +vc032x 046d:0892 Logitech Orbicam +vc032x 046d:0896 Logitech Orbicam +vc032x 046d:0897 Logitech QuickCam for Dell notebooks +zc3xx 046d:089d Logitech QuickCam E2500 +zc3xx 046d:08a0 Logitech QC IM +zc3xx 046d:08a1 Logitech QC IM 0x08A1 +sound +zc3xx 046d:08a2 Labtec Webcam Pro +zc3xx 046d:08a3 Logitech QC Chat +zc3xx 046d:08a6 Logitech QCim +zc3xx 046d:08a7 Logitech QuickCam Image +zc3xx 046d:08a9 Logitech Notebook Deluxe +zc3xx 046d:08aa Labtec Webcam Notebook +zc3xx 046d:08ac Logitech QuickCam Cool +zc3xx 046d:08ad Logitech QCCommunicate STX +zc3xx 046d:08ae Logitech QuickCam for Notebooks +zc3xx 046d:08af Logitech QuickCam Cool +zc3xx 046d:08b9 Logitech QuickCam Express +zc3xx 046d:08d7 Logitech QCam STX +zc3xx 046d:08d8 Logitech Notebook Deluxe +zc3xx 046d:08d9 Logitech QuickCam IM/Connect +zc3xx 046d:08da Logitech QuickCam Messenger +zc3xx 046d:08dd Logitech QuickCam for Notebooks +spca500 046d:0900 Logitech Inc. ClickSmart 310 +spca500 046d:0901 Logitech Inc. ClickSmart 510 +sunplus 046d:0905 Logitech ClickSmart 820 +tv8532 046d:0920 Logitech QuickCam Express +tv8532 046d:0921 Labtec Webcam +spca561 046d:0928 Logitech QC Express Etch2 +spca561 046d:0929 Labtec Webcam Elch2 +spca561 046d:092a Logitech QC for Notebook +spca561 046d:092b Labtec Webcam Plus +spca561 046d:092c Logitech QC chat Elch2 +spca561 046d:092d Logitech QC Elch2 +spca561 046d:092e Logitech QC Elch2 +spca561 046d:092f Logitech QuickCam Express Plus +sunplus 046d:0960 Logitech ClickSmart 420 +nw80x 046d:d001 Logitech QuickCam Pro (dark focus ring) +se401 0471:030b PhilipsPCVC665K +sunplus 0471:0322 Philips DMVC1300K +zc3xx 0471:0325 Philips SPC 200 NC +zc3xx 0471:0326 Philips SPC 300 NC +sonixj 0471:0327 Philips SPC 600 NC +sonixj 0471:0328 Philips SPC 700 NC +zc3xx 0471:032d Philips SPC 210 NC +zc3xx 0471:032e Philips SPC 315 NC +sonixj 0471:0330 Philips SPC 710 NC +se401 047d:5001 Kensington67014 +se401 047d:5002 Kensington6701(5/7) +se401 047d:5003 Kensington67016 +spca501 0497:c001 Smile International +sunplus 04a5:3003 Benq DC 1300 +sunplus 04a5:3008 Benq DC 1500 +sunplus 04a5:300a Benq DC 3410 +spca500 04a5:300c Benq DC 1016 +benq 04a5:3035 Benq DC E300 +vicam 04c1:009d HomeConnect Webcam [vicam] +konica 04c8:0720 IntelYC 76 +finepix 04cb:0104 Fujifilm FinePix 4800 +finepix 04cb:0109 Fujifilm FinePix A202 +finepix 04cb:010b Fujifilm FinePix A203 +finepix 04cb:010f Fujifilm FinePix A204 +finepix 04cb:0111 Fujifilm FinePix A205 +finepix 04cb:0113 Fujifilm FinePix A210 +finepix 04cb:0115 Fujifilm FinePix A303 +finepix 04cb:0117 Fujifilm FinePix A310 +finepix 04cb:0119 Fujifilm FinePix F401 +finepix 04cb:011b Fujifilm FinePix F402 +finepix 04cb:011d Fujifilm FinePix F410 +finepix 04cb:0121 Fujifilm FinePix F601 +finepix 04cb:0123 Fujifilm FinePix F700 +finepix 04cb:0125 Fujifilm FinePix M603 +finepix 04cb:0127 Fujifilm FinePix S300 +finepix 04cb:0129 Fujifilm FinePix S304 +finepix 04cb:012b Fujifilm FinePix S500 +finepix 04cb:012d Fujifilm FinePix S602 +finepix 04cb:012f Fujifilm FinePix S700 +finepix 04cb:0131 Fujifilm FinePix unknown model +finepix 04cb:013b Fujifilm FinePix unknown model +finepix 04cb:013d Fujifilm FinePix unknown model +finepix 04cb:013f Fujifilm FinePix F420 +sunplus 04f1:1001 JVC GC A50 +spca561 04fc:0561 Flexcam 100 +spca1528 04fc:1528 Sunplus MD80 clone +sunplus 04fc:500c Sunplus CA500C +sunplus 04fc:504a Aiptek Mini PenCam 1.3 +sunplus 04fc:504b Maxell MaxPocket LE 1.3 +sunplus 04fc:5330 Digitrex 2110 +sunplus 04fc:5360 Sunplus Generic +spca500 04fc:7333 PalmPixDC85 +sunplus 04fc:ffff Pure DigitalDakota +nw80x 0502:d001 DVC V6 +spca501 0506:00df 3Com HomeConnect Lite +sunplus 052b:1507 Megapixel 5 Pretec DC-1007 +sunplus 052b:1513 Megapix V4 +sunplus 052b:1803 MegaImage VI +nw80x 052b:d001 EZCam Pro p35u +tv8532 0545:808b Veo Stingray +tv8532 0545:8333 Veo Stingray +sunplus 0546:3155 Polaroid PDC3070 +sunplus 0546:3191 Polaroid Ion 80 +sunplus 0546:3273 Polaroid PDC2030 +touptek 0547:6801 TTUCMOS08000KPB, AS MU800 +dtcs033 0547:7303 Anchor Chips, Inc +ov519 054c:0154 Sonny toy4 +ov519 054c:0155 Sonny toy5 +cpia1 0553:0002 CPIA CPiA (version1) based cameras +stv0680 0553:0202 STV0680 Camera +zc3xx 055f:c005 Mustek Wcam300A +spca500 055f:c200 Mustek Gsmart 300 +sunplus 055f:c211 Kowa Bs888e Microcamera +spca500 055f:c220 Gsmart Mini +sunplus 055f:c230 Mustek Digicam 330K +sunplus 055f:c232 Mustek MDC3500 +sunplus 055f:c360 Mustek DV4000 Mpeg4 +sunplus 055f:c420 Mustek gSmart Mini 2 +sunplus 055f:c430 Mustek Gsmart LCD 2 +sunplus 055f:c440 Mustek DV 3000 +sunplus 055f:c520 Mustek gSmart Mini 3 +sunplus 055f:c530 Mustek Gsmart LCD 3 +sunplus 055f:c540 Gsmart D30 +sunplus 055f:c630 Mustek MDC4000 +sunplus 055f:c650 Mustek MDC5500Z +nw80x 055f:d001 Mustek Wcam 300 mini +zc3xx 055f:d003 Mustek WCam300A +zc3xx 055f:d004 Mustek WCam300 AN +conex 0572:0041 Creative Notebook cx11646 +ov519 05a9:0511 Video Blaster WebCam 3/WebCam Plus, D-Link USB Digital Video Camera +ov519 05a9:0518 Creative WebCam +ov519 05a9:0519 OV519 Microphone +ov519 05a9:0530 OmniVision +ov534_9 05a9:1550 OmniVision VEHO Filmscanner +ov519 05a9:2800 OmniVision SuperCAM +ov519 05a9:4519 Webcam Classic +ov534_9 05a9:8065 OmniVision test kit ov538+ov9712 +ov519 05a9:8519 OmniVision +ov519 05a9:a511 D-Link USB Digital Video Camera +ov519 05a9:a518 D-Link DSB-C310 Webcam +sunplus 05da:1018 Digital Dream Enigma 1.3 +stk014 05e1:0893 Syntek DV4000 +gl860 05e3:0503 Genesys Logic PC Camera +gl860 05e3:f191 Genesys Logic PC Camera +vicam 0602:1001 ViCam Webcam +spca561 060b:a001 Maxell Compact Pc PM3 +zc3xx 0698:2003 CTX M730V built in +topro 06a2:0003 TP6800 PC Camera, CmoX CX0342 webcam +topro 06a2:6810 Creative Qmax +nw80x 06a5:0000 Typhoon Webcam 100 USB +nw80x 06a5:d001 Divio based webcams +nw80x 06a5:d800 Divio Chicony TwinkleCam, Trust SpaceCam +spca500 06bd:0404 Agfa CL20 +spca500 06be:0800 Optimedia +nw80x 06be:d001 EZCam Pro p35u +sunplus 06d6:0031 Trust 610 LCD PowerC@m Zoom +sunplus 06d6:0041 Aashima Technology B.V. +spca506 06e1:a190 ADS Instant VCD +ov534 06f8:3002 Hercules Blog Webcam +ov534_9 06f8:3003 Hercules Dualpix HD Weblog +sonixj 06f8:3004 Hercules Classic Silver +sonixj 06f8:3008 Hercules Deluxe Optical Glass +pac7302 06f8:3009 Hercules Classic Link +pac7302 06f8:301b Hercules Link +nw80x 0728:d001 AVerMedia Camguard +spca508 0733:0110 ViewQuest VQ110 +spca501 0733:0401 Intel Create and Share +spca501 0733:0402 ViewQuest M318B +spca505 0733:0430 Intel PC Camera Pro +sunplus 0733:1311 Digital Dream Epsilon 1.3 +sunplus 0733:1314 Mercury 2.1MEG Deluxe Classic Cam +sunplus 0733:2211 Jenoptik jdc 21 LCD +sunplus 0733:2221 Mercury Digital Pro 3.1p +sunplus 0733:3261 Concord 3045 spca536a +sunplus 0733:3281 Cyberpix S550V +spca506 0734:043b 3DeMon USB Capture aka +cpia1 0813:0001 QX3 camera +ov519 0813:0002 Dual Mode USB Camera Plus +spca500 084d:0003 D-Link DSC-350 +spca500 08ca:0103 Aiptek PocketDV +sunplus 08ca:0104 Aiptek PocketDVII 1.3 +sunplus 08ca:0106 Aiptek Pocket DV3100+ +mr97310a 08ca:0110 Trust Spyc@m 100 +mr97310a 08ca:0111 Aiptek PenCam VGA+ +sunplus 08ca:2008 Aiptek Mini PenCam 2 M +sunplus 08ca:2010 Aiptek PocketCam 3M +sunplus 08ca:2016 Aiptek PocketCam 2 Mega +sunplus 08ca:2018 Aiptek Pencam SD 2M +sunplus 08ca:2020 Aiptek Slim 3000F +sunplus 08ca:2022 Aiptek Slim 3200 +sunplus 08ca:2024 Aiptek DV3500 Mpeg4 +sunplus 08ca:2028 Aiptek PocketCam4M +sunplus 08ca:2040 Aiptek PocketDV4100M +sunplus 08ca:2042 Aiptek PocketDV5100 +sunplus 08ca:2050 Medion MD 41437 +sunplus 08ca:2060 Aiptek PocketDV5300 +tv8532 0923:010f ICM532 cams +mr97310a 093a:010e All known CIF cams with this ID +mr97310a 093a:010f All known VGA cams with this ID +mars 093a:050f Mars-Semi Pc-Camera +pac207 093a:2460 Qtec Webcam 100 +pac207 093a:2461 HP Webcam +pac207 093a:2463 Philips SPC 220 NC +pac207 093a:2464 Labtec Webcam 1200 +pac207 093a:2468 Webcam WB-1400T +pac207 093a:2470 Genius GF112 +pac207 093a:2471 Genius VideoCam ge111 +pac207 093a:2472 Genius VideoCam ge110 +pac207 093a:2474 Genius iLook 111 +pac207 093a:2476 Genius e-Messenger 112 +pac7311 093a:2600 PAC7311 Typhoon +pac7311 093a:2601 Philips SPC 610 NC +pac7311 093a:2603 Philips SPC 500 NC +pac7311 093a:2608 Trust WB-3300p +pac7311 093a:260e Gigaware VGA PC Camera, Trust WB-3350p, SIGMA cam 2350 +pac7311 093a:260f SnakeCam +pac7302 093a:2620 Apollo AC-905 +pac7302 093a:2621 PAC731x +pac7302 093a:2622 Genius Eye 312 +pac7302 093a:2623 Pixart Imaging, Inc. +pac7302 093a:2624 PAC7302 +pac7302 093a:2625 Genius iSlim 310 +pac7302 093a:2626 Labtec 2200 +pac7302 093a:2627 Genius FaceCam 300 +pac7302 093a:2628 Genius iLook 300 +pac7302 093a:2629 Genious iSlim 300 +pac7302 093a:262a Webcam 300k +pac7302 093a:262c Philips SPC 230 NC +jl2005bcd 0979:0227 Various brands, 19 known cameras supported +jeilinj 0979:0270 Sakar 57379 +jeilinj 0979:0280 Sportscam DV15, Sakar 57379 +zc3xx 0ac8:0301 Web Camera +zc3xx 0ac8:0302 Z-star Vimicro zc0302 +vc032x 0ac8:0321 Vimicro generic vc0321 +vc032x 0ac8:0323 Vimicro Vc0323 +vc032x 0ac8:0328 A4Tech PK-130MG +zc3xx 0ac8:301b Z-Star zc301b +zc3xx 0ac8:303b Vimicro 0x303b +zc3xx 0ac8:305b Z-star Vimicro zc0305b +zc3xx 0ac8:307b PC Camera (ZS0211) +vc032x 0ac8:c001 Sony embedded vimicro +vc032x 0ac8:c002 Sony embedded vimicro +vc032x 0ac8:c301 Samsung Q1 Ultra Premium +spca508 0af9:0010 Hama USB Sightcam 100 +spca508 0af9:0011 Hama USB Sightcam 100 +ov519 0b62:0059 iBOT2 Webcam +sonixb 0c45:6001 Genius VideoCAM NB +sonixb 0c45:6005 Microdia Sweex Mini Webcam +sonixb 0c45:6007 Sonix sn9c101 + Tas5110D +sonixb 0c45:6009 spcaCam@120 +sonixb 0c45:600d spcaCam@120 +sonixb 0c45:6011 Microdia PC Camera (SN9C102) +sonixb 0c45:6019 Generic Sonix OV7630 +sonixb 0c45:6024 Generic Sonix Tas5130c +sonixb 0c45:6025 Xcam Shanga +sonixb 0c45:6027 GeniusEye 310 +sonixb 0c45:6028 Sonix Btc Pc380 +sonixb 0c45:6029 spcaCam@150 +sonixb 0c45:602a Meade ETX-105EC Camera +sonixb 0c45:602c Generic Sonix OV7630 +sonixb 0c45:602d LIC-200 LG +sonixb 0c45:602e Genius VideoCam Messenger +sonixj 0c45:6040 Speed NVC 350K +sonixj 0c45:607c Sonix sn9c102p Hv7131R +sonixb 0c45:6083 VideoCAM Look +sonixb 0c45:608c VideoCAM Look +sonixb 0c45:608f PC Camera (SN9C103 + OV7630) +sonixb 0c45:60a8 VideoCAM Look +sonixb 0c45:60aa VideoCAM Look +sonixb 0c45:60af VideoCAM Look +sonixb 0c45:60b0 Genius VideoCam Look +sonixj 0c45:60c0 Sangha Sn535 +sonixj 0c45:60ce USB-PC-Camera-168 (TALK-5067) +sonixj 0c45:60ec SN9C105+MO4000 +sonixj 0c45:60fb Surfer NoName +sonixj 0c45:60fc LG-LIC300 +sonixj 0c45:60fe Microdia Audio +sonixj 0c45:6100 PC Camera (SN9C128) +sonixj 0c45:6102 PC Camera (SN9C128) +sonixj 0c45:610a PC Camera (SN9C128) +sonixj 0c45:610b PC Camera (SN9C128) +sonixj 0c45:610c PC Camera (SN9C128) +sonixj 0c45:610e PC Camera (SN9C128) +sonixj 0c45:6128 Microdia/Sonix SNP325 +sonixj 0c45:612a Avant Camera +sonixj 0c45:612b Speed-Link REFLECT2 +sonixj 0c45:612c Typhoon Rasy Cam 1.3MPix +sonixj 0c45:612e PC Camera (SN9C110) +sonixj 0c45:6130 Sonix Pccam +sonixj 0c45:6138 Sn9c120 Mo4000 +sonixj 0c45:613a Microdia Sonix PC Camera +sonixj 0c45:613b Surfer SN-206 +sonixj 0c45:613c Sonix Pccam168 +sonixj 0c45:613e PC Camera (SN9C120) +sonixj 0c45:6142 Hama PC-Webcam AC-150 +sonixj 0c45:6143 Sonix Pccam168 +sonixj 0c45:6148 Digitus DA-70811/ZSMC USB PC Camera ZS211/Microdia +sonixj 0c45:614a Frontech E-Ccam (JIL-2225) +sn9c20x 0c45:6240 PC Camera (SN9C201 + MT9M001) +sn9c20x 0c45:6242 PC Camera (SN9C201 + MT9M111) +sn9c20x 0c45:6248 PC Camera (SN9C201 + OV9655) +sn9c20x 0c45:624c PC Camera (SN9C201 + MT9M112) +sn9c20x 0c45:624e PC Camera (SN9C201 + SOI968) +sn9c20x 0c45:624f PC Camera (SN9C201 + OV9650) +sn9c20x 0c45:6251 PC Camera (SN9C201 + OV9650) +sn9c20x 0c45:6253 PC Camera (SN9C201 + OV9650) +sn9c20x 0c45:6260 PC Camera (SN9C201 + OV7670) +sn9c20x 0c45:6270 PC Camera (SN9C201 + MT9V011/MT9V111/MT9V112) +sn9c20x 0c45:627b PC Camera (SN9C201 + OV7660) +sn9c20x 0c45:627c PC Camera (SN9C201 + HV7131R) +sn9c20x 0c45:627f PC Camera (SN9C201 + OV9650) +sn9c20x 0c45:6280 PC Camera (SN9C202 + MT9M001) +sn9c20x 0c45:6282 PC Camera (SN9C202 + MT9M111) +sn9c20x 0c45:6288 PC Camera (SN9C202 + OV9655) +sn9c20x 0c45:628c PC Camera (SN9C201 + MT9M112) +sn9c20x 0c45:628e PC Camera (SN9C202 + SOI968) +sn9c20x 0c45:628f PC Camera (SN9C202 + OV9650) +sn9c20x 0c45:62a0 PC Camera (SN9C202 + OV7670) +sn9c20x 0c45:62b0 PC Camera (SN9C202 + MT9V011/MT9V111/MT9V112) +sn9c20x 0c45:62b3 PC Camera (SN9C202 + OV9655) +sn9c20x 0c45:62bb PC Camera (SN9C202 + OV7660) +sn9c20x 0c45:62bc PC Camera (SN9C202 + HV7131R) +sn9c2028 0c45:8001 Wild Planet Digital Spy Camera +sn9c2028 0c45:8003 Sakar #11199, #6637x, #67480 keychain cams +sn9c2028 0c45:8008 Mini-Shotz ms-350 +sn9c2028 0c45:800a Vivitar Vivicam 3350B +sunplus 0d64:0303 Sunplus FashionCam DXG +ov519 0e96:c001 TRUST 380 USB2 SPACEC@M +etoms 102c:6151 Qcam Sangha CIF +etoms 102c:6251 Qcam xxxxxx VGA +ov519 1046:9967 W9967CF/W9968CF WebCam IC, Video Blaster WebCam Go +zc3xx 10fd:0128 Typhoon Webshot II USB 300k 0x0128 +spca561 10fd:7e50 FlyCam Usb 100 +zc3xx 10fd:804d Typhoon Webshot II Webcam [zc0301] +zc3xx 10fd:8050 Typhoon Webshot II USB 300k +ov534 1415:2000 Sony HD Eye for PS3 (SLEH 00201) +pac207 145f:013a Trust WB-1300N +pac7302 145f:013c Trust +sn9c20x 145f:013d Trust WB-3600R +vc032x 15b8:6001 HP 2.0 Megapixel +vc032x 15b8:6002 HP 2.0 Megapixel rz406aa +stk1135 174f:6a31 ASUSlaptop, MT9M112 sensor +spca501 1776:501c Arowana 300K CMOS Camera +t613 17a1:0128 TASCORP JPEG Webcam, NGS Cyclops +vc032x 17ef:4802 Lenovo Vc0323+MI1310_SOC +pac7302 1ae7:2001 SpeedLinkSnappy Mic SL-6825-SBK +pac207 2001:f115 D-Link DSB-C120 +sq905c 2770:9050 Disney pix micro (CIF) +sq905c 2770:9051 Lego Bionicle +sq905c 2770:9052 Disney pix micro 2 (VGA) +sq905c 2770:905c All 11 known cameras with this ID +sq905 2770:9120 All 24 known cameras with this ID +sq905c 2770:913d All 4 known cameras with this ID +sq930x 2770:930b Sweex Motion Tracking / I-Tec iCam Tracer +sq930x 2770:930c Trust WB-3500T / NSG Robbie 2.0 +spca500 2899:012c Toptro Industrial +ov519 8020:ef04 ov519 +spca508 8086:0110 Intel Easy PC Camera +spca500 8086:0630 Intel Pocket PC Camera +spca506 99fa:8988 Grandtec V.cap +sn9c20x a168:0610 Dino-Lite Digital Microscope (SN9C201 + HV7131R) +sn9c20x a168:0611 Dino-Lite Digital Microscope (SN9C201 + HV7131R) +sn9c20x a168:0613 Dino-Lite Digital Microscope (SN9C201 + HV7131R) +sn9c20x a168:0614 Dino-Lite Digital Microscope (SN9C201 + MT9M111) +sn9c20x a168:0615 Dino-Lite Digital Microscope (SN9C201 + MT9M111) +sn9c20x a168:0617 Dino-Lite Digital Microscope (SN9C201 + MT9M111) +sn9c20x a168:0618 Dino-Lite Digital Microscope (SN9C201 + HV7131R) +spca561 abcd:cdee Petcam +========= ========= =================================================================== diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index aac566f88833..a606d1cdac13 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -2,6 +2,8 @@ .. include:: <isonum.txt> +.. _v4l-drivers: + ################################################ Video4Linux (V4L) driver-specific documentation ################################################ @@ -46,6 +48,7 @@ For more details see the file COPYING in the source distribution of Linux. pvrusb2 pxa_camera radiotrack + rcar-fdp1 saa7134 sh_mobile_ceu_camera si470x diff --git a/Documentation/media/v4l-drivers/ivtv-cardlist.rst b/Documentation/media/v4l-drivers/ivtv-cardlist.rst index cd7e79d2963e..754ffa820b4c 100644 --- a/Documentation/media/v4l-drivers/ivtv-cardlist.rst +++ b/Documentation/media/v4l-drivers/ivtv-cardlist.rst @@ -1,29 +1,38 @@ IVTV cards list =============== -.. code-block:: none - - 1 -> Hauppauge WinTV PVR-250 - 2 -> Hauppauge WinTV PVR-350 - 3 -> Hauppauge WinTV PVR-150 or PVR-500 - 4 -> AVerMedia M179 [1461:a3ce,1461:a3cf] - 5 -> Yuan MPG600/Kuroutoshikou iTVC16-STVLP [12ab:fff3,12ab:ffff] - 6 -> Yuan MPG160/Kuroutoshikou iTVC15-STVLP [12ab:0000,10fc:40a0] - 7 -> Yuan PG600/DiamondMM PVR-550 [ff92:0070,ffab:0600] - 8 -> Adaptec AVC-2410 [9005:0093] - 9 -> Adaptec AVC-2010 [9005:0092] - 10 -> NAGASE TRANSGEAR 5000TV [1461:bfff] - 11 -> AOpen VA2000MAX-STN6 [0000:ff5f] - 12 -> YUAN MPG600GR/Kuroutoshikou CX23416GYC-STVLP [12ab:0600,fbab:0600,1154:0523] - 13 -> I/O Data GV-MVP/RX [10fc:d01e,10fc:d038,10fc:d039] - 14 -> I/O Data GV-MVP/RX2E [10fc:d025] - 15 -> GOTVIEW PCI DVD (partial support only) [12ab:0600] - 16 -> GOTVIEW PCI DVD2 Deluxe [ffac:0600] - 17 -> Yuan MPC622 [ff01:d998] - 18 -> Digital Cowboy DCT-MTVP1 [1461:bfff] - 19 -> Yuan PG600V2/GotView PCI DVD Lite [ffab:0600,ffad:0600] - 20 -> Club3D ZAP-TV1x01 [ffab:0600] - 21 -> AverTV MCE 116 Plus [1461:c439] - 22 -> ASUS Falcon2 [1043:4b66,1043:462e,1043:4b2e] - 23 -> AverMedia PVR-150 Plus [1461:c035] - 24 -> AverMedia EZMaker PCI Deluxe [1461:c03f] +=========== ============================================================= ==================================================== +Card number Card name PCI IDs +=========== ============================================================= ==================================================== +0 Hauppauge WinTV PVR-250 IVTV16 104d:813d +1 Hauppauge WinTV PVR-350 IVTV16 104d:813d +2 Hauppauge WinTV PVR-150 IVTV16 104d:813d +3 AVerMedia M179 IVTV15 1461:a3cf, IVTV15 1461:a3ce +4 Yuan MPG600, Kuroutoshikou ITVC16-STVLP IVTV16 12ab:fff3, IVTV16 12ab:ffff +5 YUAN MPG160, Kuroutoshikou ITVC15-STVLP, I/O Data GV-M2TV/PCI IVTV15 10fc:40a0 +6 Yuan PG600, Diamond PVR-550 IVTV16 ff92:0070, IVTV16 ffab:0600 +7 Adaptec VideOh! AVC-2410 IVTV16 9005:0093 +8 Adaptec VideOh! AVC-2010 IVTV16 9005:0092 +9 Nagase Transgear 5000TV IVTV16 1461:bfff +10 AOpen VA2000MAX-SNT6 IVTV16 0000:ff5f +11 Yuan MPG600GR, Kuroutoshikou CX23416GYC-STVLP IVTV16 12ab:0600, IVTV16 fbab:0600, IVTV16 1154:0523 +12 I/O Data GV-MVP/RX, GV-MVP/RX2W (dual tuner) IVTV16 10fc:d01e, IVTV16 10fc:d038, IVTV16 10fc:d039 +13 I/O Data GV-MVP/RX2E IVTV16 10fc:d025 +14 GotView PCI DVD IVTV16 12ab:0600 +15 GotView PCI DVD2 Deluxe IVTV16 ffac:0600 +16 Yuan MPC622 IVTV16 ff01:d998 +17 Digital Cowboy DCT-MTVP1 IVTV16 1461:bfff +18 Yuan PG600-2, GotView PCI DVD Lite IVTV16 ffab:0600, IVTV16 ffad:0600 +19 Club3D ZAP-TV1x01 IVTV16 ffab:0600 +20 AVerTV MCE 116 Plus IVTV16 1461:c439 +21 ASUS Falcon2 IVTV16 1043:4b66, IVTV16 1043:462e, IVTV16 1043:4b2e +22 AVerMedia PVR-150 Plus / AVerTV M113 Partsnic (Daewoo) Tuner IVTV16 1461:c034, IVTV16 1461:c035 +23 AVerMedia EZMaker PCI Deluxe IVTV16 1461:c03f +24 AVerMedia M104 IVTV16 1461:c136 +25 Buffalo PC-MV5L/PCI IVTV16 1154:052b +26 AVerMedia UltraTV 1500 MCE / AVerTV M113 Philips Tuner IVTV16 1461:c019, IVTV16 1461:c01b +27 Sony VAIO Giga Pocket (ENX Kikyou) IVTV16 104d:813d +28 Hauppauge WinTV PVR-350 (V1) IVTV16 104d:813d +29 Yuan MPG600GR, Kuroutoshikou CX23416GYC-STVLP (no GR) IVTV16 104d:813d +30 Yuan MPG600GR, Kuroutoshikou CX23416GYC-STVLP (no GR/YCS) IVTV16 104d:813d +=========== ============================================================= ==================================================== diff --git a/Documentation/media/v4l-drivers/rcar-fdp1.rst b/Documentation/media/v4l-drivers/rcar-fdp1.rst new file mode 100644 index 000000000000..a59b1e8e3e9c --- /dev/null +++ b/Documentation/media/v4l-drivers/rcar-fdp1.rst @@ -0,0 +1,37 @@ +Renesas R-Car Fine Display Processor (FDP1) Driver +================================================== + +The R-Car FDP1 driver implements driver-specific controls as follows. + +``V4L2_CID_DEINTERLACING_MODE (menu)`` + The video deinterlacing mode (such as Bob, Weave, ...). The R-Car FDP1 + driver implements the following modes. + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + :widths: 1 4 + + * - ``"Progressive" (0)`` + - The input image video stream is progressive (not interlaced). No + deinterlacing is performed. Apart from (optional) format and encoding + conversion output frames are identical to the input frames. + * - ``"Adaptive 2D/3D" (1)`` + - Motion adaptive version of 2D and 3D deinterlacing. Use 3D deinterlacing + in the presence of fast motion and 2D deinterlacing with diagonal + interpolation otherwise. + * - ``"Fixed 2D" (2)`` + - The current field is scaled vertically by averaging adjacent lines to + recover missing lines. This method is also known as blending or Line + Averaging (LAV). + * - ``"Fixed 3D" (3)`` + - The previous and next fields are averaged to recover lines missing from + the current field. This method is also known as Field Averaging (FAV). + * - ``"Previous field" (4)`` + - The current field is weaved with the previous field, i.e. the previous + field is used to fill missing lines from the current field. This method + is also known as weave deinterlacing. + * - ``"Next field" (5)`` + - The current field is weaved with the next field, i.e. the next field is + used to fill missing lines from the current field. This method is also + known as weave deinterlacing. diff --git a/Documentation/media/v4l-drivers/saa7134-cardlist.rst b/Documentation/media/v4l-drivers/saa7134-cardlist.rst index 22c1510d9fa6..a5efa8f4b8e4 100644 --- a/Documentation/media/v4l-drivers/saa7134-cardlist.rst +++ b/Documentation/media/v4l-drivers/saa7134-cardlist.rst @@ -1,202 +1,204 @@ SAA7134 cards list ================== -.. code-block:: none - - 0 -> UNKNOWN/GENERIC - 1 -> Proteus Pro [philips reference design] [1131:2001,1131:2001] - 2 -> LifeView FlyVIDEO3000 [5168:0138,4e42:0138] - 3 -> LifeView/Typhoon FlyVIDEO2000 [5168:0138,4e42:0138] - 4 -> EMPRESS [1131:6752] - 5 -> SKNet Monster TV [1131:4e85] - 6 -> Tevion MD 9717 - 7 -> KNC One TV-Station RDS / Typhoon TV Tuner RDS [1131:fe01,1894:fe01] - 8 -> Terratec Cinergy 400 TV [153b:1142] - 9 -> Medion 5044 - 10 -> Kworld/KuroutoShikou SAA7130-TVPCI - 11 -> Terratec Cinergy 600 TV [153b:1143] - 12 -> Medion 7134 [16be:0003,16be:5000] - 13 -> Typhoon TV+Radio 90031 - 14 -> ELSA EX-VISION 300TV [1048:226b] - 15 -> ELSA EX-VISION 500TV [1048:226a] - 16 -> ASUS TV-FM 7134 [1043:4842,1043:4830,1043:4840] - 17 -> AOPEN VA1000 POWER [1131:7133] - 18 -> BMK MPEX No Tuner - 19 -> Compro VideoMate TV [185b:c100] - 20 -> Matrox CronosPlus [102B:48d0] - 21 -> 10MOONS PCI TV CAPTURE CARD [1131:2001] - 22 -> AverMedia M156 / Medion 2819 [1461:a70b] - 23 -> BMK MPEX Tuner - 24 -> KNC One TV-Station DVR [1894:a006] - 25 -> ASUS TV-FM 7133 [1043:4843] - 26 -> Pinnacle PCTV Stereo (saa7134) [11bd:002b] - 27 -> Manli MuchTV M-TV002 - 28 -> Manli MuchTV M-TV001 - 29 -> Nagase Sangyo TransGear 3000TV [1461:050c] - 30 -> Elitegroup ECS TVP3XP FM1216 Tuner Card(PAL-BG,FM) [1019:4cb4] - 31 -> Elitegroup ECS TVP3XP FM1236 Tuner Card (NTSC,FM) [1019:4cb5] - 32 -> AVACS SmartTV - 33 -> AVerMedia DVD EZMaker [1461:10ff] - 34 -> Noval Prime TV 7133 - 35 -> AverMedia AverTV Studio 305 [1461:2115] - 36 -> UPMOST PURPLE TV [12ab:0800] - 37 -> Items MuchTV Plus / IT-005 - 38 -> Terratec Cinergy 200 TV [153b:1152] - 39 -> LifeView FlyTV Platinum Mini [5168:0212,4e42:0212,5169:1502] - 40 -> Compro VideoMate TV PVR/FM [185b:c100] - 41 -> Compro VideoMate TV Gold+ [185b:c100] - 42 -> Sabrent SBT-TVFM (saa7130) - 43 -> :Zolid Xpert TV7134 - 44 -> Empire PCI TV-Radio LE - 45 -> Avermedia AVerTV Studio 307 [1461:9715] - 46 -> AVerMedia Cardbus TV/Radio (E500) [1461:d6ee] - 47 -> Terratec Cinergy 400 mobile [153b:1162] - 48 -> Terratec Cinergy 600 TV MK3 [153b:1158] - 49 -> Compro VideoMate Gold+ Pal [185b:c200] - 50 -> Pinnacle PCTV 300i DVB-T + PAL [11bd:002d] - 51 -> ProVideo PV952 [1540:9524] - 52 -> AverMedia AverTV/305 [1461:2108] - 53 -> ASUS TV-FM 7135 [1043:4845] - 54 -> LifeView FlyTV Platinum FM / Gold [5168:0214,5168:5214,1489:0214,5168:0304] - 55 -> LifeView FlyDVB-T DUO / MSI TV@nywhere Duo [5168:0306,4E42:0306] - 56 -> Avermedia AVerTV 307 [1461:a70a] - 57 -> Avermedia AVerTV GO 007 FM [1461:f31f] - 58 -> ADS Tech Instant TV (saa7135) [1421:0350,1421:0351,1421:0370,1421:1370] - 59 -> Kworld/Tevion V-Stream Xpert TV PVR7134 - 60 -> LifeView/Typhoon/Genius FlyDVB-T Duo Cardbus [5168:0502,4e42:0502,1489:0502] - 61 -> Philips TOUGH DVB-T reference design [1131:2004] - 62 -> Compro VideoMate TV Gold+II - 63 -> Kworld Xpert TV PVR7134 - 64 -> FlyTV mini Asus Digimatrix [1043:0210] - 65 -> V-Stream Studio TV Terminator - 66 -> Yuan TUN-900 (saa7135) - 67 -> Beholder BeholdTV 409 FM [0000:4091] - 68 -> GoTView 7135 PCI [5456:7135] - 69 -> Philips EUROPA V3 reference design [1131:2004] - 70 -> Compro Videomate DVB-T300 [185b:c900] - 71 -> Compro Videomate DVB-T200 [185b:c901] - 72 -> RTD Embedded Technologies VFG7350 [1435:7350] - 73 -> RTD Embedded Technologies VFG7330 [1435:7330] - 74 -> LifeView FlyTV Platinum Mini2 [14c0:1212] - 75 -> AVerMedia AVerTVHD MCE A180 [1461:1044] - 76 -> SKNet MonsterTV Mobile [1131:4ee9] - 77 -> Pinnacle PCTV 40i/50i/110i (saa7133) [11bd:002e] - 78 -> ASUSTeK P7131 Dual [1043:4862] - 79 -> Sedna/MuchTV PC TV Cardbus TV/Radio (ITO25 Rev:2B) - 80 -> ASUS Digimatrix TV [1043:0210] - 81 -> Philips Tiger reference design [1131:2018] - 82 -> MSI TV@Anywhere plus [1462:6231,1462:8624] - 83 -> Terratec Cinergy 250 PCI TV [153b:1160] - 84 -> LifeView FlyDVB Trio [5168:0319] - 85 -> AverTV DVB-T 777 [1461:2c05,1461:2c05] - 86 -> LifeView FlyDVB-T / Genius VideoWonder DVB-T [5168:0301,1489:0301] - 87 -> ADS Instant TV Duo Cardbus PTV331 [0331:1421] - 88 -> Tevion/KWorld DVB-T 220RF [17de:7201] - 89 -> ELSA EX-VISION 700TV [1048:226c] - 90 -> Kworld ATSC110/115 [17de:7350,17de:7352] - 91 -> AVerMedia A169 B [1461:7360] - 92 -> AVerMedia A169 B1 [1461:6360] - 93 -> Medion 7134 Bridge #2 [16be:0005] - 94 -> LifeView FlyDVB-T Hybrid Cardbus/MSI TV @nywhere A/D NB [5168:3306,5168:3502,5168:3307,4e42:3502] - 95 -> LifeView FlyVIDEO3000 (NTSC) [5169:0138] - 96 -> Medion Md8800 Quadro [16be:0007,16be:0008,16be:000d] - 97 -> LifeView FlyDVB-S /Acorp TV134DS [5168:0300,4e42:0300] - 98 -> Proteus Pro 2309 [0919:2003] - 99 -> AVerMedia TV Hybrid A16AR [1461:2c00] - 100 -> Asus Europa2 OEM [1043:4860] - 101 -> Pinnacle PCTV 310i [11bd:002f] - 102 -> Avermedia AVerTV Studio 507 [1461:9715] - 103 -> Compro Videomate DVB-T200A - 104 -> Hauppauge WinTV-HVR1110 DVB-T/Hybrid [0070:6700,0070:6701,0070:6702,0070:6703,0070:6704,0070:6705] - 105 -> Terratec Cinergy HT PCMCIA [153b:1172] - 106 -> Encore ENLTV [1131:2342,1131:2341,3016:2344] - 107 -> Encore ENLTV-FM [1131:230f] - 108 -> Terratec Cinergy HT PCI [153b:1175] - 109 -> Philips Tiger - S Reference design - 110 -> Avermedia M102 [1461:f31e] - 111 -> ASUS P7131 4871 [1043:4871] - 112 -> ASUSTeK P7131 Hybrid [1043:4876] - 113 -> Elitegroup ECS TVP3XP FM1246 Tuner Card (PAL,FM) [1019:4cb6] - 114 -> KWorld DVB-T 210 [17de:7250] - 115 -> Sabrent PCMCIA TV-PCB05 [0919:2003] - 116 -> 10MOONS TM300 TV Card [1131:2304] - 117 -> Avermedia Super 007 [1461:f01d] - 118 -> Beholder BeholdTV 401 [0000:4016] - 119 -> Beholder BeholdTV 403 [0000:4036] - 120 -> Beholder BeholdTV 403 FM [0000:4037] - 121 -> Beholder BeholdTV 405 [0000:4050] - 122 -> Beholder BeholdTV 405 FM [0000:4051] - 123 -> Beholder BeholdTV 407 [0000:4070] - 124 -> Beholder BeholdTV 407 FM [0000:4071] - 125 -> Beholder BeholdTV 409 [0000:4090] - 126 -> Beholder BeholdTV 505 FM [5ace:5050] - 127 -> Beholder BeholdTV 507 FM / BeholdTV 509 FM [5ace:5070,5ace:5090] - 128 -> Beholder BeholdTV Columbus TV/FM [0000:5201] - 129 -> Beholder BeholdTV 607 FM [5ace:6070] - 130 -> Beholder BeholdTV M6 [5ace:6190] - 131 -> Twinhan Hybrid DTV-DVB 3056 PCI [1822:0022] - 132 -> Genius TVGO AM11MCE - 133 -> NXP Snake DVB-S reference design - 134 -> Medion/Creatix CTX953 Hybrid [16be:0010] - 135 -> MSI TV@nywhere A/D v1.1 [1462:8625] - 136 -> AVerMedia Cardbus TV/Radio (E506R) [1461:f436] - 137 -> AVerMedia Hybrid TV/Radio (A16D) [1461:f936] - 138 -> Avermedia M115 [1461:a836] - 139 -> Compro VideoMate T750 [185b:c900] - 140 -> Avermedia DVB-S Pro A700 [1461:a7a1] - 141 -> Avermedia DVB-S Hybrid+FM A700 [1461:a7a2] - 142 -> Beholder BeholdTV H6 [5ace:6290] - 143 -> Beholder BeholdTV M63 [5ace:6191] - 144 -> Beholder BeholdTV M6 Extra [5ace:6193] - 145 -> AVerMedia MiniPCI DVB-T Hybrid M103 [1461:f636,1461:f736] - 146 -> ASUSTeK P7131 Analog - 147 -> Asus Tiger 3in1 [1043:4878] - 148 -> Encore ENLTV-FM v5.3 [1a7f:2008] - 149 -> Avermedia PCI pure analog (M135A) [1461:f11d] - 150 -> Zogis Real Angel 220 - 151 -> ADS Tech Instant HDTV [1421:0380] - 152 -> Asus Tiger Rev:1.00 [1043:4857] - 153 -> Kworld Plus TV Analog Lite PCI [17de:7128] - 154 -> Avermedia AVerTV GO 007 FM Plus [1461:f31d] - 155 -> Hauppauge WinTV-HVR1150 ATSC/QAM-Hybrid [0070:6706,0070:6708] - 156 -> Hauppauge WinTV-HVR1120 DVB-T/Hybrid [0070:6707,0070:6709,0070:670a] - 157 -> Avermedia AVerTV Studio 507UA [1461:a11b] - 158 -> AVerMedia Cardbus TV/Radio (E501R) [1461:b7e9] - 159 -> Beholder BeholdTV 505 RDS [0000:505B] - 160 -> Beholder BeholdTV 507 RDS [0000:5071] - 161 -> Beholder BeholdTV 507 RDS [0000:507B] - 162 -> Beholder BeholdTV 607 FM [5ace:6071] - 163 -> Beholder BeholdTV 609 FM [5ace:6090] - 164 -> Beholder BeholdTV 609 FM [5ace:6091] - 165 -> Beholder BeholdTV 607 RDS [5ace:6072] - 166 -> Beholder BeholdTV 607 RDS [5ace:6073] - 167 -> Beholder BeholdTV 609 RDS [5ace:6092] - 168 -> Beholder BeholdTV 609 RDS [5ace:6093] - 169 -> Compro VideoMate S350/S300 [185b:c900] - 170 -> AverMedia AverTV Studio 505 [1461:a115] - 171 -> Beholder BeholdTV X7 [5ace:7595] - 172 -> RoverMedia TV Link Pro FM [19d1:0138] - 173 -> Zolid Hybrid TV Tuner PCI [1131:2004] - 174 -> Asus Europa Hybrid OEM [1043:4847] - 175 -> Leadtek Winfast DTV1000S [107d:6655] - 176 -> Beholder BeholdTV 505 RDS [0000:5051] - 177 -> Hawell HW-404M7 - 178 -> Beholder BeholdTV H7 [5ace:7190] - 179 -> Beholder BeholdTV A7 [5ace:7090] - 180 -> Avermedia PCI M733A [1461:4155,1461:4255] - 181 -> TechoTrend TT-budget T-3000 [13c2:2804] - 182 -> Kworld PCI SBTVD/ISDB-T Full-Seg Hybrid [17de:b136] - 183 -> Compro VideoMate Vista M1F [185b:c900] - 184 -> Encore ENLTV-FM 3 [1a7f:2108] - 185 -> MagicPro ProHDTV Pro2 DMB-TH/Hybrid [17de:d136] - 186 -> Beholder BeholdTV 501 [5ace:5010] - 187 -> Beholder BeholdTV 503 FM [5ace:5030] - 188 -> Sensoray 811/911 [6000:0811,6000:0911] - 189 -> Kworld PC150-U [17de:a134] - 190 -> Asus My Cinema PS3-100 [1043:48cd] - 191 -> Hawell HW-9004V1 - 192 -> AverMedia AverTV Satellite Hybrid+FM A706 [1461:2055] - 193 -> WIS Voyager or compatible [1905:7007] - 194 -> AverMedia AverTV/505 [1461:a10a] - 195 -> Leadtek Winfast TV2100 FM [107d:6f3a] - 196 -> SnaZio* TVPVR PRO [1779:13cf] +=========== ======================================================= ================================================================ +Card number Card name PCI IDs +=========== ======================================================= ================================================================ +0 UNKNOWN/GENERIC +1 Proteus Pro [philips reference design] 1131:2001, 1131:2001 +2 LifeView FlyVIDEO3000 5168:0138, 4e42:0138 +3 LifeView/Typhoon FlyVIDEO2000 5168:0138, 4e42:0138 +4 EMPRESS 1131:6752 +5 SKNet Monster TV 1131:4e85 +6 Tevion MD 9717 +7 KNC One TV-Station RDS / Typhoon TV Tuner RDS 1131:fe01, 1894:fe01 +8 Terratec Cinergy 400 TV 153b:1142 +9 Medion 5044 +10 Kworld/KuroutoShikou SAA7130-TVPCI +11 Terratec Cinergy 600 TV 153b:1143 +12 Medion 7134 16be:0003, 16be:5000 +13 Typhoon TV+Radio 90031 +14 ELSA EX-VISION 300TV 1048:226b +15 ELSA EX-VISION 500TV 1048:226a +16 ASUS TV-FM 7134 1043:4842, 1043:4830, 1043:4840 +17 AOPEN VA1000 POWER 1131:7133 +18 BMK MPEX No Tuner +19 Compro VideoMate TV 185b:c100 +20 Matrox CronosPlus 102B:48d0 +21 10MOONS PCI TV CAPTURE CARD 1131:2001 +22 AverMedia M156 / Medion 2819 1461:a70b +23 BMK MPEX Tuner +24 KNC One TV-Station DVR 1894:a006 +25 ASUS TV-FM 7133 1043:4843 +26 Pinnacle PCTV Stereo (saa7134) 11bd:002b +27 Manli MuchTV M-TV002 +28 Manli MuchTV M-TV001 +29 Nagase Sangyo TransGear 3000TV 1461:050c +30 Elitegroup ECS TVP3XP FM1216 Tuner Card(PAL-BG,FM) 1019:4cb4 +31 Elitegroup ECS TVP3XP FM1236 Tuner Card (NTSC,FM) 1019:4cb5 +32 AVACS SmartTV +33 AVerMedia DVD EZMaker 1461:10ff +34 Noval Prime TV 7133 +35 AverMedia AverTV Studio 305 1461:2115 +36 UPMOST PURPLE TV 12ab:0800 +37 Items MuchTV Plus / IT-005 +38 Terratec Cinergy 200 TV 153b:1152 +39 LifeView FlyTV Platinum Mini 5168:0212, 4e42:0212, 5169:1502 +40 Compro VideoMate TV PVR/FM 185b:c100 +41 Compro VideoMate TV Gold+ 185b:c100 +42 Sabrent SBT-TVFM (saa7130) +43 :Zolid Xpert TV7134 +44 Empire PCI TV-Radio LE +45 Avermedia AVerTV Studio 307 1461:9715 +46 AVerMedia Cardbus TV/Radio (E500) 1461:d6ee +47 Terratec Cinergy 400 mobile 153b:1162 +48 Terratec Cinergy 600 TV MK3 153b:1158 +49 Compro VideoMate Gold+ Pal 185b:c200 +50 Pinnacle PCTV 300i DVB-T + PAL 11bd:002d +51 ProVideo PV952 1540:9524 +52 AverMedia AverTV/305 1461:2108 +53 ASUS TV-FM 7135 1043:4845 +54 LifeView FlyTV Platinum FM / Gold 5168:0214, 5168:5214, 1489:0214, 5168:0304 +55 LifeView FlyDVB-T DUO / MSI TV@nywhere Duo 5168:0306, 4E42:0306 +56 Avermedia AVerTV 307 1461:a70a +57 Avermedia AVerTV GO 007 FM 1461:f31f +58 ADS Tech Instant TV (saa7135) 1421:0350, 1421:0351, 1421:0370, 1421:1370 +59 Kworld/Tevion V-Stream Xpert TV PVR7134 +60 LifeView/Typhoon/Genius FlyDVB-T Duo Cardbus 5168:0502, 4e42:0502, 1489:0502 +61 Philips TOUGH DVB-T reference design 1131:2004 +62 Compro VideoMate TV Gold+II +63 Kworld Xpert TV PVR7134 +64 FlyTV mini Asus Digimatrix 1043:0210 +65 V-Stream Studio TV Terminator +66 Yuan TUN-900 (saa7135) +67 Beholder BeholdTV 409 FM 0000:4091 +68 GoTView 7135 PCI 5456:7135 +69 Philips EUROPA V3 reference design 1131:2004 +70 Compro Videomate DVB-T300 185b:c900 +71 Compro Videomate DVB-T200 185b:c901 +72 RTD Embedded Technologies VFG7350 1435:7350 +73 RTD Embedded Technologies VFG7330 1435:7330 +74 LifeView FlyTV Platinum Mini2 14c0:1212 +75 AVerMedia AVerTVHD MCE A180 1461:1044 +76 SKNet MonsterTV Mobile 1131:4ee9 +77 Pinnacle PCTV 40i/50i/110i (saa7133) 11bd:002e +78 ASUSTeK P7131 Dual 1043:4862 +79 Sedna/MuchTV PC TV Cardbus TV/Radio (ITO25 Rev:2B) +80 ASUS Digimatrix TV 1043:0210 +81 Philips Tiger reference design 1131:2018 +82 MSI TV@Anywhere plus 1462:6231, 1462:8624 +83 Terratec Cinergy 250 PCI TV 153b:1160 +84 LifeView FlyDVB Trio 5168:0319 +85 AverTV DVB-T 777 1461:2c05, 1461:2c05 +86 LifeView FlyDVB-T / Genius VideoWonder DVB-T 5168:0301, 1489:0301 +87 ADS Instant TV Duo Cardbus PTV331 0331:1421 +88 Tevion/KWorld DVB-T 220RF 17de:7201 +89 ELSA EX-VISION 700TV 1048:226c +90 Kworld ATSC110/115 17de:7350, 17de:7352 +91 AVerMedia A169 B 1461:7360 +92 AVerMedia A169 B1 1461:6360 +93 Medion 7134 Bridge #2 16be:0005 +94 LifeView FlyDVB-T Hybrid Cardbus/MSI TV @nywhere A/D NB 5168:3306, 5168:3502, 5168:3307, 4e42:3502 +95 LifeView FlyVIDEO3000 (NTSC) 5169:0138 +96 Medion Md8800 Quadro 16be:0007, 16be:0008, 16be:000d +97 LifeView FlyDVB-S /Acorp TV134DS 5168:0300, 4e42:0300 +98 Proteus Pro 2309 0919:2003 +99 AVerMedia TV Hybrid A16AR 1461:2c00 +100 Asus Europa2 OEM 1043:4860 +101 Pinnacle PCTV 310i 11bd:002f +102 Avermedia AVerTV Studio 507 1461:9715 +103 Compro Videomate DVB-T200A +104 Hauppauge WinTV-HVR1110 DVB-T/Hybrid 0070:6700, 0070:6701, 0070:6702, 0070:6703, 0070:6704, 0070:6705 +105 Terratec Cinergy HT PCMCIA 153b:1172 +106 Encore ENLTV 1131:2342, 1131:2341, 3016:2344 +107 Encore ENLTV-FM 1131:230f +108 Terratec Cinergy HT PCI 153b:1175 +109 Philips Tiger - S Reference design +110 Avermedia M102 1461:f31e +111 ASUS P7131 4871 1043:4871 +112 ASUSTeK P7131 Hybrid 1043:4876 +113 Elitegroup ECS TVP3XP FM1246 Tuner Card (PAL,FM) 1019:4cb6 +114 KWorld DVB-T 210 17de:7250 +115 Sabrent PCMCIA TV-PCB05 0919:2003 +116 10MOONS TM300 TV Card 1131:2304 +117 Avermedia Super 007 1461:f01d +118 Beholder BeholdTV 401 0000:4016 +119 Beholder BeholdTV 403 0000:4036 +120 Beholder BeholdTV 403 FM 0000:4037 +121 Beholder BeholdTV 405 0000:4050 +122 Beholder BeholdTV 405 FM 0000:4051 +123 Beholder BeholdTV 407 0000:4070 +124 Beholder BeholdTV 407 FM 0000:4071 +125 Beholder BeholdTV 409 0000:4090 +126 Beholder BeholdTV 505 FM 5ace:5050 +127 Beholder BeholdTV 507 FM / BeholdTV 509 FM 5ace:5070, 5ace:5090 +128 Beholder BeholdTV Columbus TV/FM 0000:5201 +129 Beholder BeholdTV 607 FM 5ace:6070 +130 Beholder BeholdTV M6 5ace:6190 +131 Twinhan Hybrid DTV-DVB 3056 PCI 1822:0022 +132 Genius TVGO AM11MCE +133 NXP Snake DVB-S reference design +134 Medion/Creatix CTX953 Hybrid 16be:0010 +135 MSI TV@nywhere A/D v1.1 1462:8625 +136 AVerMedia Cardbus TV/Radio (E506R) 1461:f436 +137 AVerMedia Hybrid TV/Radio (A16D) 1461:f936 +138 Avermedia M115 1461:a836 +139 Compro VideoMate T750 185b:c900 +140 Avermedia DVB-S Pro A700 1461:a7a1 +141 Avermedia DVB-S Hybrid+FM A700 1461:a7a2 +142 Beholder BeholdTV H6 5ace:6290 +143 Beholder BeholdTV M63 5ace:6191 +144 Beholder BeholdTV M6 Extra 5ace:6193 +145 AVerMedia MiniPCI DVB-T Hybrid M103 1461:f636, 1461:f736 +146 ASUSTeK P7131 Analog +147 Asus Tiger 3in1 1043:4878 +148 Encore ENLTV-FM v5.3 1a7f:2008 +149 Avermedia PCI pure analog (M135A) 1461:f11d +150 Zogis Real Angel 220 +151 ADS Tech Instant HDTV 1421:0380 +152 Asus Tiger Rev:1.00 1043:4857 +153 Kworld Plus TV Analog Lite PCI 17de:7128 +154 Avermedia AVerTV GO 007 FM Plus 1461:f31d +155 Hauppauge WinTV-HVR1150 ATSC/QAM-Hybrid 0070:6706, 0070:6708 +156 Hauppauge WinTV-HVR1120 DVB-T/Hybrid 0070:6707, 0070:6709, 0070:670a +157 Avermedia AVerTV Studio 507UA 1461:a11b +158 AVerMedia Cardbus TV/Radio (E501R) 1461:b7e9 +159 Beholder BeholdTV 505 RDS 0000:505B +160 Beholder BeholdTV 507 RDS 0000:5071 +161 Beholder BeholdTV 507 RDS 0000:507B +162 Beholder BeholdTV 607 FM 5ace:6071 +163 Beholder BeholdTV 609 FM 5ace:6090 +164 Beholder BeholdTV 609 FM 5ace:6091 +165 Beholder BeholdTV 607 RDS 5ace:6072 +166 Beholder BeholdTV 607 RDS 5ace:6073 +167 Beholder BeholdTV 609 RDS 5ace:6092 +168 Beholder BeholdTV 609 RDS 5ace:6093 +169 Compro VideoMate S350/S300 185b:c900 +170 AverMedia AverTV Studio 505 1461:a115 +171 Beholder BeholdTV X7 5ace:7595 +172 RoverMedia TV Link Pro FM 19d1:0138 +173 Zolid Hybrid TV Tuner PCI 1131:2004 +174 Asus Europa Hybrid OEM 1043:4847 +175 Leadtek Winfast DTV1000S 107d:6655 +176 Beholder BeholdTV 505 RDS 0000:5051 +177 Hawell HW-404M7 +178 Beholder BeholdTV H7 5ace:7190 +179 Beholder BeholdTV A7 5ace:7090 +180 Avermedia PCI M733A 1461:4155, 1461:4255 +181 TechoTrend TT-budget T-3000 13c2:2804 +182 Kworld PCI SBTVD/ISDB-T Full-Seg Hybrid 17de:b136 +183 Compro VideoMate Vista M1F 185b:c900 +184 Encore ENLTV-FM 3 1a7f:2108 +185 MagicPro ProHDTV Pro2 DMB-TH/Hybrid 17de:d136 +186 Beholder BeholdTV 501 5ace:5010 +187 Beholder BeholdTV 503 FM 5ace:5030 +188 Sensoray 811/911 6000:0811, 6000:0911 +189 Kworld PC150-U 17de:a134 +190 Asus My Cinema PS3-100 1043:48cd +191 Hawell HW-9004V1 +192 AverMedia AverTV Satellite Hybrid+FM A706 1461:2055 +193 WIS Voyager or compatible 1905:7007 +194 AverMedia AverTV/505 1461:a10a +195 Leadtek Winfast TV2100 FM 107d:6f3a +196 SnaZio* TVPVR PRO 1779:13cf +=========== ======================================================= ================================================================ diff --git a/Documentation/media/v4l-drivers/saa7164-cardlist.rst b/Documentation/media/v4l-drivers/saa7164-cardlist.rst index b937836cd54c..7d17d38df3bc 100644 --- a/Documentation/media/v4l-drivers/saa7164-cardlist.rst +++ b/Documentation/media/v4l-drivers/saa7164-cardlist.rst @@ -1,19 +1,21 @@ -SAA7134 cards list +SAA7164 cards list ================== -.. code-block:: none - - 0 -> Unknown - 1 -> Generic Rev2 - 2 -> Generic Rev3 - 3 -> Hauppauge WinTV-HVR2250 [0070:8880,0070:8810] - 4 -> Hauppauge WinTV-HVR2200 [0070:8980] - 5 -> Hauppauge WinTV-HVR2200 [0070:8900] - 6 -> Hauppauge WinTV-HVR2200 [0070:8901] - 7 -> Hauppauge WinTV-HVR2250 [0070:8891,0070:8851] - 8 -> Hauppauge WinTV-HVR2250 [0070:88A1] - 9 -> Hauppauge WinTV-HVR2200 [0070:8940] - 10 -> Hauppauge WinTV-HVR2200 [0070:8953] - 11 -> Hauppauge WinTV-HVR2255(proto) - 12 -> Hauppauge WinTV-HVR2255 [0070:f111] - 13 -> Hauppauge WinTV-HVR2205 [0070:f123,0070:f120] +=========== ==================================== ==================== +Card number Card name PCI IDs +=========== ==================================== ==================== +0 Unknown +1 Generic Rev2 +2 Generic Rev3 +3 Hauppauge WinTV-HVR2250 0070:8880, 0070:8810 +4 Hauppauge WinTV-HVR2200 0070:8980 +5 Hauppauge WinTV-HVR2200 0070:8900 +6 Hauppauge WinTV-HVR2200 0070:8901 +7 Hauppauge WinTV-HVR2250 0070:8891, 0070:8851 +8 Hauppauge WinTV-HVR2250 0070:88A1 +9 Hauppauge WinTV-HVR2200 0070:8940 +10 Hauppauge WinTV-HVR2200 0070:8953 +11 Hauppauge WinTV-HVR2255(proto) 0070:f111 +12 Hauppauge WinTV-HVR2255 0070:f111 +13 Hauppauge WinTV-HVR2205 0070:f123, 0070:f120 +=========== ==================================== ==================== diff --git a/Documentation/media/v4l-drivers/tm6000-cardlist.rst b/Documentation/media/v4l-drivers/tm6000-cardlist.rst index 2fbd3886b5f0..ae2952683ccf 100644 --- a/Documentation/media/v4l-drivers/tm6000-cardlist.rst +++ b/Documentation/media/v4l-drivers/tm6000-cardlist.rst @@ -1,21 +1,24 @@ TM6000 cards list ================= -.. code-block:: none - - 1 -> Generic tm5600 board (tm5600) [6000:0001] - 2 -> Generic tm6000 board (tm6000) [6000:0001] - 3 -> Generic tm6010 board (tm6010) [6000:0002] - 4 -> 10Moons UT821 (tm5600) [6000:0001] - 5 -> 10Moons UT330 (tm5600) - 6 -> ADSTech Dual TV (tm6000) [06e1:f332] - 7 -> FreeCom and similar (tm6000) [14aa:0620] - 8 -> ADSTech Mini Dual TV (tm6000) [06e1:b339] - 9 -> Hauppauge WinTV HVR-900H/USB2 Stick (tm6010) [2040:6600,2040:6601,2040:6610,2040:6611] - 10 -> Beholder Wander (tm6010) [6000:dec0] - 11 -> Beholder Voyager (tm6010) [6000:dec1] - 12 -> TerraTec Cinergy Hybrid XE/Cinergy Hybrid Stick (tm6010) [0ccd:0086,0ccd:00a5] - 13 -> TwinHan TU501 (tm6010) [13d3:3240,13d3:3241,13d3:3243,13d3:3264] - 14 -> Beholder Wander Lite (tm6010) [6000:dec2] - 15 -> Beholder Voyager Lite (tm6010) [6000:dec3] - +=========== ================================================= ========================================== +Card number Card name USB IDs +=========== ================================================= ========================================== +0 Unknown tm6000 video grabber +1 Generic tm5600 board 6000:0001 +2 Generic tm6000 board +3 Generic tm6010 board 6000:0002 +4 10Moons UT 821 +5 10Moons UT 330 +6 ADSTECH Dual TV USB 06e1:f332 +7 Freecom Hybrid Stick / Moka DVB-T Receiver Dual 14aa:0620 +8 ADSTECH Mini Dual TV USB 06e1:b339 +9 Hauppauge WinTV HVR-900H / WinTV USB2-Stick 2040:6600, 2040:6601, 2040:6610, 2040:6611 +10 Beholder Wander DVB-T/TV/FM USB2.0 6000:dec0 +11 Beholder Voyager TV/FM USB2.0 6000:dec1 +12 Terratec Cinergy Hybrid XE / Cinergy Hybrid-Stick 0ccd:0086, 0ccd:00A5 +13 Twinhan TU501(704D1) 13d3:3240, 13d3:3241, 13d3:3243, 13d3:3264 +14 Beholder Wander Lite DVB-T/TV/FM USB2.0 6000:dec2 +15 Beholder Voyager Lite TV/FM USB2.0 6000:dec3 +16 Terratec Grabster AV 150/250 MX 0ccd:0079 +=========== ================================================= ========================================== diff --git a/Documentation/media/v4l-drivers/tuner-cardlist.rst b/Documentation/media/v4l-drivers/tuner-cardlist.rst index 2f1e1029c04e..276dd90e0c59 100644 --- a/Documentation/media/v4l-drivers/tuner-cardlist.rst +++ b/Documentation/media/v4l-drivers/tuner-cardlist.rst @@ -1,96 +1,98 @@ Tuner cards list ================ -.. code-block:: none - - tuner=0 - Temic PAL (4002 FH5) - tuner=1 - Philips PAL_I (FI1246 and compatibles) - tuner=2 - Philips NTSC (FI1236,FM1236 and compatibles) - tuner=3 - Philips (SECAM+PAL_BG) (FI1216MF, FM1216MF, FR1216MF) - tuner=4 - NoTuner - tuner=5 - Philips PAL_BG (FI1216 and compatibles) - tuner=6 - Temic NTSC (4032 FY5) - tuner=7 - Temic PAL_I (4062 FY5) - tuner=8 - Temic NTSC (4036 FY5) - tuner=9 - Alps HSBH1 - tuner=10 - Alps TSBE1 - tuner=11 - Alps TSBB5 - tuner=12 - Alps TSBE5 - tuner=13 - Alps TSBC5 - tuner=14 - Temic PAL_BG (4006FH5) - tuner=15 - Alps TSCH6 - tuner=16 - Temic PAL_DK (4016 FY5) - tuner=17 - Philips NTSC_M (MK2) - tuner=18 - Temic PAL_I (4066 FY5) - tuner=19 - Temic PAL* auto (4006 FN5) - tuner=20 - Temic PAL_BG (4009 FR5) or PAL_I (4069 FR5) - tuner=21 - Temic NTSC (4039 FR5) - tuner=22 - Temic PAL/SECAM multi (4046 FM5) - tuner=23 - Philips PAL_DK (FI1256 and compatibles) - tuner=24 - Philips PAL/SECAM multi (FQ1216ME) - tuner=25 - LG PAL_I+FM (TAPC-I001D) - tuner=26 - LG PAL_I (TAPC-I701D) - tuner=27 - LG NTSC+FM (TPI8NSR01F) - tuner=28 - LG PAL_BG+FM (TPI8PSB01D) - tuner=29 - LG PAL_BG (TPI8PSB11D) - tuner=30 - Temic PAL* auto + FM (4009 FN5) - tuner=31 - SHARP NTSC_JP (2U5JF5540) - tuner=32 - Samsung PAL TCPM9091PD27 - tuner=33 - MT20xx universal - tuner=34 - Temic PAL_BG (4106 FH5) - tuner=35 - Temic PAL_DK/SECAM_L (4012 FY5) - tuner=36 - Temic NTSC (4136 FY5) - tuner=37 - LG PAL (newer TAPC series) - tuner=38 - Philips PAL/SECAM multi (FM1216ME MK3) - tuner=39 - LG NTSC (newer TAPC series) - tuner=40 - HITACHI V7-J180AT - tuner=41 - Philips PAL_MK (FI1216 MK) - tuner=42 - Philips FCV1236D ATSC/NTSC dual in - tuner=43 - Philips NTSC MK3 (FM1236MK3 or FM1236/F) - tuner=44 - Philips 4 in 1 (ATI TV Wonder Pro/Conexant) - tuner=45 - Microtune 4049 FM5 - tuner=46 - Panasonic VP27s/ENGE4324D - tuner=47 - LG NTSC (TAPE series) - tuner=48 - Tenna TNF 8831 BGFF) - tuner=49 - Microtune 4042 FI5 ATSC/NTSC dual in - tuner=50 - TCL 2002N - tuner=51 - Philips PAL/SECAM_D (FM 1256 I-H3) - tuner=52 - Thomson DTT 7610 (ATSC/NTSC) - tuner=53 - Philips FQ1286 - tuner=54 - Philips/NXP TDA 8290/8295 + 8275/8275A/18271 - tuner=55 - TCL 2002MB - tuner=56 - Philips PAL/SECAM multi (FQ1216AME MK4) - tuner=57 - Philips FQ1236A MK4 - tuner=58 - Ymec TVision TVF-8531MF/8831MF/8731MF - tuner=59 - Ymec TVision TVF-5533MF - tuner=60 - Thomson DTT 761X (ATSC/NTSC) - tuner=61 - Tena TNF9533-D/IF/TNF9533-B/DF - tuner=62 - Philips TEA5767HN FM Radio - tuner=63 - Philips FMD1216ME MK3 Hybrid Tuner - tuner=64 - LG TDVS-H06xF - tuner=65 - Ymec TVF66T5-B/DFF - tuner=66 - LG TALN series - tuner=67 - Philips TD1316 Hybrid Tuner - tuner=68 - Philips TUV1236D ATSC/NTSC dual in - tuner=69 - Tena TNF 5335 and similar models - tuner=70 - Samsung TCPN 2121P30A - tuner=71 - Xceive xc2028/xc3028 tuner - tuner=72 - Thomson FE6600 - tuner=73 - Samsung TCPG 6121P30A - tuner=75 - Philips TEA5761 FM Radio - tuner=76 - Xceive 5000 tuner - tuner=77 - TCL tuner MF02GIP-5N-E - tuner=78 - Philips FMD1216MEX MK3 Hybrid Tuner - tuner=79 - Philips PAL/SECAM multi (FM1216 MK5) - tuner=80 - Philips FQ1216LME MK3 PAL/SECAM w/active loopthrough - tuner=81 - Partsnic (Daewoo) PTI-5NF05 - tuner=82 - Philips CU1216L - tuner=83 - NXP TDA18271 - tuner=84 - Sony BTF-Pxn01Z - tuner=85 - Philips FQ1236 MK5 - tuner=86 - Tena TNF5337 MFD - tuner=87 - Xceive 4000 tuner - tuner=88 - Xceive 5000C tuner - tuner=89 - Sony BTF-PG472Z PAL/SECAM - tuner=90 - Sony BTF-PK467Z NTSC-M-JP - tuner=91 - Sony BTF-PB463Z NTSC-M +============ ===================================================== +Tuner number Card name +============ ===================================================== +0 Temic PAL (4002 FH5) +1 Philips PAL_I (FI1246 and compatibles) +2 Philips NTSC (FI1236,FM1236 and compatibles) +3 Philips (SECAM+PAL_BG) (FI1216MF, FM1216MF, FR1216MF) +4 NoTuner +5 Philips PAL_BG (FI1216 and compatibles) +6 Temic NTSC (4032 FY5) +7 Temic PAL_I (4062 FY5) +8 Temic NTSC (4036 FY5) +9 Alps HSBH1 +10 Alps TSBE1 +11 Alps TSBB5 +12 Alps TSBE5 +13 Alps TSBC5 +14 Temic PAL_BG (4006FH5) +15 Alps TSCH6 +16 Temic PAL_DK (4016 FY5) +17 Philips NTSC_M (MK2) +18 Temic PAL_I (4066 FY5) +19 Temic PAL* auto (4006 FN5) +20 Temic PAL_BG (4009 FR5) or PAL_I (4069 FR5) +21 Temic NTSC (4039 FR5) +22 Temic PAL/SECAM multi (4046 FM5) +23 Philips PAL_DK (FI1256 and compatibles) +24 Philips PAL/SECAM multi (FQ1216ME) +25 LG PAL_I+FM (TAPC-I001D) +26 LG PAL_I (TAPC-I701D) +27 LG NTSC+FM (TPI8NSR01F) +28 LG PAL_BG+FM (TPI8PSB01D) +29 LG PAL_BG (TPI8PSB11D) +30 Temic PAL* auto + FM (4009 FN5) +31 SHARP NTSC_JP (2U5JF5540) +32 Samsung PAL TCPM9091PD27 +33 MT20xx universal +34 Temic PAL_BG (4106 FH5) +35 Temic PAL_DK/SECAM_L (4012 FY5) +36 Temic NTSC (4136 FY5) +37 LG PAL (newer TAPC series) +38 Philips PAL/SECAM multi (FM1216ME MK3) +39 LG NTSC (newer TAPC series) +40 HITACHI V7-J180AT +41 Philips PAL_MK (FI1216 MK) +42 Philips FCV1236D ATSC/NTSC dual in +43 Philips NTSC MK3 (FM1236MK3 or FM1236/F) +44 Philips 4 in 1 (ATI TV Wonder Pro/Conexant) +45 Microtune 4049 FM5 +46 Panasonic VP27s/ENGE4324D +47 LG NTSC (TAPE series) +48 Tenna TNF 8831 BGFF) +49 Microtune 4042 FI5 ATSC/NTSC dual in +50 TCL 2002N +51 Philips PAL/SECAM_D (FM 1256 I-H3) +52 Thomson DTT 7610 (ATSC/NTSC) +53 Philips FQ1286 +54 Philips/NXP TDA 8290/8295 + 8275/8275A/18271 +55 TCL 2002MB +56 Philips PAL/SECAM multi (FQ1216AME MK4) +57 Philips FQ1236A MK4 +58 Ymec TVision TVF-8531MF/8831MF/8731MF +59 Ymec TVision TVF-5533MF +60 Thomson DTT 761X (ATSC/NTSC) +61 Tena TNF9533-D/IF/TNF9533-B/DF +62 Philips TEA5767HN FM Radio +63 Philips FMD1216ME MK3 Hybrid Tuner +64 LG TDVS-H06xF +65 Ymec TVF66T5-B/DFF +66 LG TALN series +67 Philips TD1316 Hybrid Tuner +68 Philips TUV1236D ATSC/NTSC dual in +69 Tena TNF 5335 and similar models +70 Samsung TCPN 2121P30A +71 Xceive xc2028/xc3028 tuner +72 Thomson FE6600 +73 Samsung TCPG 6121P30A +75 Philips TEA5761 FM Radio +76 Xceive 5000 tuner +77 TCL tuner MF02GIP-5N-E +78 Philips FMD1216MEX MK3 Hybrid Tuner +79 Philips PAL/SECAM multi (FM1216 MK5) +80 Philips FQ1216LME MK3 PAL/SECAM w/active loopthrough +81 Partsnic (Daewoo) PTI-5NF05 +82 Philips CU1216L +83 NXP TDA18271 +84 Sony BTF-Pxn01Z +85 Philips FQ1236 MK5 +86 Tena TNF5337 MFD +87 Xceive 4000 tuner +88 Xceive 5000C tuner +89 Sony BTF-PG472Z PAL/SECAM +90 Sony BTF-PK467Z NTSC-M-JP +91 Sony BTF-PB463Z NTSC-M +============ ===================================================== diff --git a/Documentation/media/v4l-drivers/usbvision-cardlist.rst b/Documentation/media/v4l-drivers/usbvision-cardlist.rst index 3d8be9cb1b5a..44d53dff0984 100644 --- a/Documentation/media/v4l-drivers/usbvision-cardlist.rst +++ b/Documentation/media/v4l-drivers/usbvision-cardlist.rst @@ -1,72 +1,74 @@ -Usbvision cards list +USBvision cards list ==================== -.. code-block:: none - - 0 -> Xanboo [0a6f:0400] - 1 -> Belkin USB VideoBus II Adapter [050d:0106] - 2 -> Belkin Components USB VideoBus [050d:0207] - 3 -> Belkin USB VideoBus II [050d:0208] - 4 -> echoFX InterView Lite [0571:0002] - 5 -> USBGear USBG-V1 resp. HAMA USB [0573:0003] - 6 -> D-Link V100 [0573:0400] - 7 -> X10 USB Camera [0573:2000] - 8 -> Hauppauge WinTV USB Live (PAL B/G) [0573:2d00] - 9 -> Hauppauge WinTV USB Live Pro (NTSC M/N) [0573:2d01] - 10 -> Zoran Co. PMD (Nogatech) AV-grabber Manhattan [0573:2101] - 11 -> Nogatech USB-TV (NTSC) FM [0573:4100] - 12 -> PNY USB-TV (NTSC) FM [0573:4110] - 13 -> PixelView PlayTv-USB PRO (PAL) FM [0573:4450] - 14 -> ZTV ZT-721 2.4GHz USB A/V Receiver [0573:4550] - 15 -> Hauppauge WinTV USB (NTSC M/N) [0573:4d00] - 16 -> Hauppauge WinTV USB (PAL B/G) [0573:4d01] - 17 -> Hauppauge WinTV USB (PAL I) [0573:4d02] - 18 -> Hauppauge WinTV USB (PAL/SECAM L) [0573:4d03] - 19 -> Hauppauge WinTV USB (PAL D/K) [0573:4d04] - 20 -> Hauppauge WinTV USB (NTSC FM) [0573:4d10] - 21 -> Hauppauge WinTV USB (PAL B/G FM) [0573:4d11] - 22 -> Hauppauge WinTV USB (PAL I FM) [0573:4d12] - 23 -> Hauppauge WinTV USB (PAL D/K FM) [0573:4d14] - 24 -> Hauppauge WinTV USB Pro (NTSC M/N) [0573:4d2a] - 25 -> Hauppauge WinTV USB Pro (NTSC M/N) V2 [0573:4d2b] - 26 -> Hauppauge WinTV USB Pro (PAL/SECAM B/G/I/D/K/L) [0573:4d2c] - 27 -> Hauppauge WinTV USB Pro (NTSC M/N) V3 [0573:4d20] - 28 -> Hauppauge WinTV USB Pro (PAL B/G) [0573:4d21] - 29 -> Hauppauge WinTV USB Pro (PAL I) [0573:4d22] - 30 -> Hauppauge WinTV USB Pro (PAL/SECAM L) [0573:4d23] - 31 -> Hauppauge WinTV USB Pro (PAL D/K) [0573:4d24] - 32 -> Hauppauge WinTV USB Pro (PAL/SECAM BGDK/I/L) [0573:4d25] - 33 -> Hauppauge WinTV USB Pro (PAL/SECAM BGDK/I/L) V2 [0573:4d26] - 34 -> Hauppauge WinTV USB Pro (PAL B/G) V2 [0573:4d27] - 35 -> Hauppauge WinTV USB Pro (PAL B/G,D/K) [0573:4d28] - 36 -> Hauppauge WinTV USB Pro (PAL I,D/K) [0573:4d29] - 37 -> Hauppauge WinTV USB Pro (NTSC M/N FM) [0573:4d30] - 38 -> Hauppauge WinTV USB Pro (PAL B/G FM) [0573:4d31] - 39 -> Hauppauge WinTV USB Pro (PAL I FM) [0573:4d32] - 40 -> Hauppauge WinTV USB Pro (PAL D/K FM) [0573:4d34] - 41 -> Hauppauge WinTV USB Pro (Temic PAL/SECAM B/G/I/D/K/L FM) [0573:4d35] - 42 -> Hauppauge WinTV USB Pro (Temic PAL B/G FM) [0573:4d36] - 43 -> Hauppauge WinTV USB Pro (PAL/SECAM B/G/I/D/K/L FM) [0573:4d37] - 44 -> Hauppauge WinTV USB Pro (NTSC M/N FM) V2 [0573:4d38] - 45 -> Camtel Technology USB TV Genie Pro FM Model TVB330 [0768:0006] - 46 -> Digital Video Creator I [07d0:0001] - 47 -> Global Village GV-007 (NTSC) [07d0:0002] - 48 -> Dazzle Fusion Model DVC-50 Rev 1 (NTSC) [07d0:0003] - 49 -> Dazzle Fusion Model DVC-80 Rev 1 (PAL) [07d0:0004] - 50 -> Dazzle Fusion Model DVC-90 Rev 1 (SECAM) [07d0:0005] - 51 -> Eskape Labs MyTV2Go [07f8:9104] - 52 -> Pinnacle Studio PCTV USB (PAL) [2304:010d] - 53 -> Pinnacle Studio PCTV USB (SECAM) [2304:0109] - 54 -> Pinnacle Studio PCTV USB (PAL) FM [2304:0110] - 55 -> Miro PCTV USB [2304:0111] - 56 -> Pinnacle Studio PCTV USB (NTSC) FM [2304:0112] - 57 -> Pinnacle Studio PCTV USB (PAL) FM V2 [2304:0210] - 58 -> Pinnacle Studio PCTV USB (NTSC) FM V2 [2304:0212] - 59 -> Pinnacle Studio PCTV USB (PAL) FM V3 [2304:0214] - 60 -> Pinnacle Studio Linx Video input cable (NTSC) [2304:0300] - 61 -> Pinnacle Studio Linx Video input cable (PAL) [2304:0301] - 62 -> Pinnacle PCTV Bungee USB (PAL) FM [2304:0419] - 63 -> Hauppauge WinTv-USB [2400:4200] - 64 -> Pinnacle Studio PCTV USB (NTSC) FM V3 [2304:0113] - 65 -> Nogatech USB MicroCam NTSC (NV3000N) [0573:3000] - 66 -> Nogatech USB MicroCam PAL (NV3001P) [0573:3001] +=========== ======================================================== ========= +Card number Card name USB IDs +=========== ======================================================== ========= +0 Xanboo 0a6f:0400 +1 Belkin USB VideoBus II Adapter 050d:0106 +2 Belkin Components USB VideoBus 050d:0207 +3 Belkin USB VideoBus II 050d:0208 +4 echoFX InterView Lite 0571:0002 +5 USBGear USBG-V1 resp. HAMA USB 0573:0003 +6 D-Link V100 0573:0400 +7 X10 USB Camera 0573:2000 +8 Hauppauge WinTV USB Live (PAL B/G) 0573:2d00 +9 Hauppauge WinTV USB Live Pro (NTSC M/N) 0573:2d01 +10 Zoran Co. PMD (Nogatech) AV-grabber Manhattan 0573:2101 +11 Nogatech USB-TV (NTSC) FM 0573:4100 +12 PNY USB-TV (NTSC) FM 0573:4110 +13 PixelView PlayTv-USB PRO (PAL) FM 0573:4450 +14 ZTV ZT-721 2.4GHz USB A/V Receiver 0573:4550 +15 Hauppauge WinTV USB (NTSC M/N) 0573:4d00 +16 Hauppauge WinTV USB (PAL B/G) 0573:4d01 +17 Hauppauge WinTV USB (PAL I) 0573:4d02 +18 Hauppauge WinTV USB (PAL/SECAM L) 0573:4d03 +19 Hauppauge WinTV USB (PAL D/K) 0573:4d04 +20 Hauppauge WinTV USB (NTSC FM) 0573:4d10 +21 Hauppauge WinTV USB (PAL B/G FM) 0573:4d11 +22 Hauppauge WinTV USB (PAL I FM) 0573:4d12 +23 Hauppauge WinTV USB (PAL D/K FM) 0573:4d14 +24 Hauppauge WinTV USB Pro (NTSC M/N) 0573:4d2a +25 Hauppauge WinTV USB Pro (NTSC M/N) V2 0573:4d2b +26 Hauppauge WinTV USB Pro (PAL/SECAM B/G/I/D/K/L) 0573:4d2c +27 Hauppauge WinTV USB Pro (NTSC M/N) V3 0573:4d20 +28 Hauppauge WinTV USB Pro (PAL B/G) 0573:4d21 +29 Hauppauge WinTV USB Pro (PAL I) 0573:4d22 +30 Hauppauge WinTV USB Pro (PAL/SECAM L) 0573:4d23 +31 Hauppauge WinTV USB Pro (PAL D/K) 0573:4d24 +32 Hauppauge WinTV USB Pro (PAL/SECAM BGDK/I/L) 0573:4d25 +33 Hauppauge WinTV USB Pro (PAL/SECAM BGDK/I/L) V2 0573:4d26 +34 Hauppauge WinTV USB Pro (PAL B/G) V2 0573:4d27 +35 Hauppauge WinTV USB Pro (PAL B/G,D/K) 0573:4d28 +36 Hauppauge WinTV USB Pro (PAL I,D/K) 0573:4d29 +37 Hauppauge WinTV USB Pro (NTSC M/N FM) 0573:4d30 +38 Hauppauge WinTV USB Pro (PAL B/G FM) 0573:4d31 +39 Hauppauge WinTV USB Pro (PAL I FM) 0573:4d32 +40 Hauppauge WinTV USB Pro (PAL D/K FM) 0573:4d34 +41 Hauppauge WinTV USB Pro (Temic PAL/SECAM B/G/I/D/K/L FM) 0573:4d35 +42 Hauppauge WinTV USB Pro (Temic PAL B/G FM) 0573:4d36 +43 Hauppauge WinTV USB Pro (PAL/SECAM B/G/I/D/K/L FM) 0573:4d37 +44 Hauppauge WinTV USB Pro (NTSC M/N FM) V2 0573:4d38 +45 Camtel Technology USB TV Genie Pro FM Model TVB330 0768:0006 +46 Digital Video Creator I 07d0:0001 +47 Global Village GV-007 (NTSC) 07d0:0002 +48 Dazzle Fusion Model DVC-50 Rev 1 (NTSC) 07d0:0003 +49 Dazzle Fusion Model DVC-80 Rev 1 (PAL) 07d0:0004 +50 Dazzle Fusion Model DVC-90 Rev 1 (SECAM) 07d0:0005 +51 Eskape Labs MyTV2Go 07f8:9104 +52 Pinnacle Studio PCTV USB (PAL) 2304:010d +53 Pinnacle Studio PCTV USB (SECAM) 2304:0109 +54 Pinnacle Studio PCTV USB (PAL) FM 2304:0110 +55 Miro PCTV USB 2304:0111 +56 Pinnacle Studio PCTV USB (NTSC) FM 2304:0112 +57 Pinnacle Studio PCTV USB (PAL) FM V2 2304:0210 +58 Pinnacle Studio PCTV USB (NTSC) FM V2 2304:0212 +59 Pinnacle Studio PCTV USB (PAL) FM V3 2304:0214 +60 Pinnacle Studio Linx Video input cable (NTSC) 2304:0300 +61 Pinnacle Studio Linx Video input cable (PAL) 2304:0301 +62 Pinnacle PCTV Bungee USB (PAL) FM 2304:0419 +63 Hauppauge WinTv-USB 2400:4200 +64 Pinnacle Studio PCTV USB (NTSC) FM V3 2304:0113 +65 Nogatech USB MicroCam NTSC (NV3000N) 0573:3000 +66 Nogatech USB MicroCam PAL (NV3001P) 0573:3001 +=========== ======================================================== ========= diff --git a/Documentation/media/videodev2.h.rst.exceptions b/Documentation/media/videodev2.h.rst.exceptions index 1d3f27d922b2..e11a0d0a8931 100644 --- a/Documentation/media/videodev2.h.rst.exceptions +++ b/Documentation/media/videodev2.h.rst.exceptions @@ -87,6 +87,10 @@ replace symbol V4L2_YCBCR_ENC_XV601 :c:type:`v4l2_ycbcr_encoding` replace symbol V4L2_YCBCR_ENC_XV709 :c:type:`v4l2_ycbcr_encoding` replace symbol V4L2_YCBCR_ENC_SMPTE240M :c:type:`v4l2_ycbcr_encoding` +# Documented enum v4l2_hsv_encoding +replace symbol V4L2_HSV_ENC_180 :c:type:`v4l2_hsv_encoding` +replace symbol V4L2_HSV_ENC_256 :c:type:`v4l2_hsv_encoding` + # Documented enum v4l2_quantization replace symbol V4L2_QUANTIZATION_DEFAULT :c:type:`v4l2_quantization` replace symbol V4L2_QUANTIZATION_FULL_RANGE :c:type:`v4l2_quantization` @@ -276,6 +280,9 @@ replace define V4L2_DV_FL_REDUCED_FPS dv-bt-standards replace define V4L2_DV_FL_HALF_LINE dv-bt-standards replace define V4L2_DV_FL_IS_CE_VIDEO dv-bt-standards replace define V4L2_DV_FL_FIRST_FIELD_EXTRA_LINE dv-bt-standards +replace define V4L2_DV_FL_HAS_PICTURE_ASPECT dv-bt-standards +replace define V4L2_DV_FL_HAS_CEA861_VIC dv-bt-standards +replace define V4L2_DV_FL_HAS_HDMI_VIC dv-bt-standards replace define V4L2_DV_BT_656_1120 dv-timing-types diff --git a/Documentation/networking/mpls-sysctl.txt b/Documentation/networking/mpls-sysctl.txt index 9ed15f86c17c..15d8d16934fd 100644 --- a/Documentation/networking/mpls-sysctl.txt +++ b/Documentation/networking/mpls-sysctl.txt @@ -5,8 +5,8 @@ platform_labels - INTEGER possible to configure forwarding for label values equal to or greater than the number of platform labels. - A dense utliziation of the entries in the platform label table - is possible and expected aas the platform labels are locally + A dense utilization of the entries in the platform label table + is possible and expected as the platform labels are locally allocated. If the number of platform label table entries is set to 0 no diff --git a/Documentation/scsi/g_NCR5380.txt b/Documentation/scsi/g_NCR5380.txt index e2c187947e58..37b1967a00a9 100644 --- a/Documentation/scsi/g_NCR5380.txt +++ b/Documentation/scsi/g_NCR5380.txt @@ -6,17 +6,15 @@ NCR53c400 extensions (c) 1994,1995,1996 Kevin Lentin This file documents the NCR53c400 extensions by Kevin Lentin and some enhancements to the NCR5380 core. -This driver supports both NCR5380 and NCR53c400 cards in port or memory -mapped modes. Currently this driver can only support one of those mapping -modes at a time but it does support both of these chips at the same time. -The next release of this driver will support port & memory mapped cards at -the same time. It should be able to handle multiple different cards in the -same machine. +This driver supports NCR5380 and NCR53c400 and compatible cards in port or +memory mapped modes. -The drivers/scsi/Makefile has an override in it for the most common -NCR53c400 card, the Trantor T130B in its default configuration: - Port: 0x350 - IRQ : 5 +Use of an interrupt is recommended, if supported by the board, as this will +allow targets to disconnect and thereby improve SCSI bus utilization. + +If the irq parameter is 254 or is omitted entirely, the driver will probe +for the correct IRQ line automatically. If the irq parameter is 0 or 255 +then no IRQ will be used. The NCR53c400 does not support DMA but it does have Pseudo-DMA which is supported by the driver. @@ -47,22 +45,24 @@ These old-style parameters can support only one card: dtc_3181e=1 to set up for a Domex Technology Corp 3181E board hp_c2502=1 to set up for a Hewlett Packard C2502 board -e.g. -OLD: modprobe g_NCR5380 ncr_irq=5 ncr_addr=0x350 ncr_5380=1 -NEW: modprobe g_NCR5380 irq=5 base=0x350 card=0 - for a port mapped NCR5380 board or - -OLD: modprobe g_NCR5380 ncr_irq=255 ncr_addr=0xc8000 ncr_53c400=1 -NEW: modprobe g_NCR5380 irq=255 base=0xc8000 card=1 - for a memory mapped NCR53C400 board with interrupts disabled or +E.g. Trantor T130B in its default configuration: +modprobe g_NCR5380 irq=5 base=0x350 card=1 +or alternatively, using the old syntax, +modprobe g_NCR5380 ncr_irq=5 ncr_addr=0x350 ncr_53c400=1 -NEW: modprobe g_NCR5380 irq=0,7 base=0x240,0x300 card=3,4 - for two cards: DTC3181 (in non-PnP mode) at 0x240 with no IRQ - and HP C2502 at 0x300 with IRQ 7 +E.g. a port mapped NCR5380 board, driver to probe for IRQ: +modprobe g_NCR5380 base=0x350 card=0 +or alternatively, +modprobe g_NCR5380 ncr_addr=0x350 ncr_5380=1 -(255 should be specified for no or DMA interrupt, 254 to autoprobe for an - IRQ line if overridden on the command line.) +E.g. a memory mapped NCR53C400 board with no IRQ: +modprobe g_NCR5380 irq=255 base=0xc8000 card=1 +or alternatively, +modprobe g_NCR5380 ncr_irq=255 ncr_addr=0xc8000 ncr_53c400=1 +E.g. two cards, DTC3181 (in non-PnP mode) at 0x240 with no IRQ +and HP C2502 at 0x300 with IRQ 7: +modprobe g_NCR5380 irq=0,7 base=0x240,0x300 card=3,4 Kevin Lentin K.Lentin@cs.monash.edu.au diff --git a/Documentation/security/keys-trusted-encrypted.txt b/Documentation/security/keys-trusted-encrypted.txt index 324ddf5223b3..b20a993a32af 100644 --- a/Documentation/security/keys-trusted-encrypted.txt +++ b/Documentation/security/keys-trusted-encrypted.txt @@ -32,8 +32,6 @@ Usage: (40 ascii zeros) blobauth= ascii hex auth for sealed data default 0x00... (40 ascii zeros) - blobauth= ascii hex auth for sealed data default 0x00... - (40 ascii zeros) pcrinfo= ascii hex of PCR_INFO or PCR_INFO_LONG (no default) pcrlock= pcr number to be extended to "lock" blob migratable= 0|1 indicating permission to reseal to new PCR values, diff --git a/Documentation/sphinx/rstFlatTable.py b/Documentation/sphinx/rstFlatTable.py index 55f275793028..25feb0d35e7a 100755 --- a/Documentation/sphinx/rstFlatTable.py +++ b/Documentation/sphinx/rstFlatTable.py @@ -157,6 +157,11 @@ class ListTableBuilder(object): def buildTableNode(self): colwidths = self.directive.get_column_widths(self.max_cols) + if isinstance(colwidths, tuple): + # Since docutils 0.13, get_column_widths returns a (widths, + # colwidths) tuple, where widths is a string (i.e. 'auto'). + # See https://sourceforge.net/p/docutils/patches/120/. + colwidths = colwidths[1] stub_columns = self.directive.options.get('stub-columns', 0) header_rows = self.directive.options.get('header-rows', 0) diff --git a/Documentation/trace/events.txt b/Documentation/trace/events.txt index 08d74d75150d..2cc08d4a326e 100644 --- a/Documentation/trace/events.txt +++ b/Documentation/trace/events.txt @@ -189,16 +189,13 @@ And for string fields they are: ==, !=, ~ -The glob (~) only accepts a wild card character (*) at the start and or -end of the string. For example: +The glob (~) accepts a wild card character (*,?) and character classes +([). For example: prev_comm ~ "*sh" prev_comm ~ "sh*" prev_comm ~ "*sh*" - -But does not allow for it to be within the string: - - prev_comm ~ "ba*sh" <-- is invalid + prev_comm ~ "ba*sh" 5.2 Setting filters ------------------- diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt index 5596e2d71d6d..006f47c7d913 100644 --- a/Documentation/trace/ftrace.txt +++ b/Documentation/trace/ftrace.txt @@ -416,6 +416,12 @@ of ftrace. Here is a list of some of the key files: trace_fd = open("trace_marker", WR_ONLY); + trace_marker_raw: + + This is similar to trace_marker above, but is meant for for binary data + to be written to it, where a tool can be used to parse the data + from trace_pipe_raw. + uprobe_events: Add dynamic tracepoints in programs. @@ -2238,16 +2244,13 @@ hrtimer_interrupt sys_nanosleep -Perhaps this is not enough. The filters also allow simple wild -cards. Only the following are currently available +Perhaps this is not enough. The filters also allow glob(7) matching. <match>* - will match functions that begin with <match> *<match> - will match functions that end with <match> *<match>* - will match functions that have <match> in it - -These are the only wild cards which are supported. - - <match>*<match> will not work. + <match1>*<match2> - will match functions that begin with + <match1> and end with <match2> Note: It is better to use quotes to enclose the wild cards, otherwise the shell may expand the parameters into names diff --git a/Documentation/translations/zh_CN/sparse.txt b/Documentation/translations/zh_CN/sparse.txt index cc144e581515..e41dc940e162 100644 --- a/Documentation/translations/zh_CN/sparse.txt +++ b/Documentation/translations/zh_CN/sparse.txt @@ -92,9 +92,4 @@ DaveJ 把每小时自动生成的 git 源码树 tar 包放在以下地址： 如果你已经编译了内核，用后一种方式可以很快地检查整个源码树。 make 的可选变量 CHECKFLAGS 可以用来向 sparse 工具传递参数。编译系统会自 -动向 sparse 工具传递 -Wbitwise 参数。你可以定义 __CHECK_ENDIAN__ 来进行 -大小尾检查。 - - make C=2 CHECKFLAGS="-D__CHECK_ENDIAN__" - -这些检查默认都是被关闭的，因为他们通常会产生大量的警告。 +动向 sparse 工具传递 -Wbitwise 参数。 diff --git a/Documentation/unaligned-memory-access.txt b/Documentation/unaligned-memory-access.txt index a445da098bc6..3f76c0c37920 100644 --- a/Documentation/unaligned-memory-access.txt +++ b/Documentation/unaligned-memory-access.txt @@ -151,7 +151,7 @@ bool ether_addr_equal(const u8 *addr1, const u8 *addr2) #else const u16 *a = (const u16 *)addr1; const u16 *b = (const u16 *)addr2; - return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0; + return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) == 0; #endif } diff --git a/Documentation/virtual/kvm/locking.txt b/Documentation/virtual/kvm/locking.txt index e5dd9f4d6100..fd013bf4115b 100644 --- a/Documentation/virtual/kvm/locking.txt +++ b/Documentation/virtual/kvm/locking.txt @@ -13,8 +13,12 @@ The acquisition orders for mutexes are as follows: - kvm->slots_lock is taken outside kvm->irq_lock, though acquiring them together is quite rare. -For spinlocks, kvm_lock is taken outside kvm->mmu_lock. Everything -else is a leaf: no other lock is taken inside the critical sections. +On x86, vcpu->mutex is taken outside kvm->arch.hyperv.hv_lock. + +For spinlocks, kvm_lock is taken outside kvm->mmu_lock. + +Everything else is a leaf: no other lock is taken inside the critical +sections. 2: Exception ------------ diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86/intel_rdt_ui.txt new file mode 100644 index 000000000000..d918d268cd72 --- /dev/null +++ b/Documentation/x86/intel_rdt_ui.txt @@ -0,0 +1,214 @@ +User Interface for Resource Allocation in Intel Resource Director Technology + +Copyright (C) 2016 Intel Corporation + +Fenghua Yu <fenghua.yu@intel.com> +Tony Luck <tony.luck@intel.com> + +This feature is enabled by the CONFIG_INTEL_RDT_A Kconfig and the +X86 /proc/cpuinfo flag bits "rdt", "cat_l3" and "cdp_l3". + +To use the feature mount the file system: + + # mount -t resctrl resctrl [-o cdp] /sys/fs/resctrl + +mount options are: + +"cdp": Enable code/data prioritization in L3 cache allocations. + + +Info directory +-------------- + +The 'info' directory contains information about the enabled +resources. Each resource has its own subdirectory. The subdirectory +names reflect the resource names. Each subdirectory contains the +following files: + +"num_closids": The number of CLOSIDs which are valid for this + resource. The kernel uses the smallest number of + CLOSIDs of all enabled resources as limit. + +"cbm_mask": The bitmask which is valid for this resource. This + mask is equivalent to 100%. + +"min_cbm_bits": The minimum number of consecutive bits which must be + set when writing a mask. + + +Resource groups +--------------- +Resource groups are represented as directories in the resctrl file +system. The default group is the root directory. Other groups may be +created as desired by the system administrator using the "mkdir(1)" +command, and removed using "rmdir(1)". + +There are three files associated with each group: + +"tasks": A list of tasks that belongs to this group. Tasks can be + added to a group by writing the task ID to the "tasks" file + (which will automatically remove them from the previous + group to which they belonged). New tasks created by fork(2) + and clone(2) are added to the same group as their parent. + If a pid is not in any sub partition, it is in root partition + (i.e. default partition). + +"cpus": A bitmask of logical CPUs assigned to this group. Writing + a new mask can add/remove CPUs from this group. Added CPUs + are removed from their previous group. Removed ones are + given to the default (root) group. You cannot remove CPUs + from the default group. + +"schemata": A list of all the resources available to this group. + Each resource has its own line and format - see below for + details. + +When a task is running the following rules define which resources +are available to it: + +1) If the task is a member of a non-default group, then the schemata +for that group is used. + +2) Else if the task belongs to the default group, but is running on a +CPU that is assigned to some specific group, then the schemata for +the CPU's group is used. + +3) Otherwise the schemata for the default group is used. + + +Schemata files - general concepts +--------------------------------- +Each line in the file describes one resource. The line starts with +the name of the resource, followed by specific values to be applied +in each of the instances of that resource on the system. + +Cache IDs +--------- +On current generation systems there is one L3 cache per socket and L2 +caches are generally just shared by the hyperthreads on a core, but this +isn't an architectural requirement. We could have multiple separate L3 +caches on a socket, multiple cores could share an L2 cache. So instead +of using "socket" or "core" to define the set of logical cpus sharing +a resource we use a "Cache ID". At a given cache level this will be a +unique number across the whole system (but it isn't guaranteed to be a +contiguous sequence, there may be gaps). To find the ID for each logical +CPU look in /sys/devices/system/cpu/cpu*/cache/index*/id + +Cache Bit Masks (CBM) +--------------------- +For cache resources we describe the portion of the cache that is available +for allocation using a bitmask. The maximum value of the mask is defined +by each cpu model (and may be different for different cache levels). It +is found using CPUID, but is also provided in the "info" directory of +the resctrl file system in "info/{resource}/cbm_mask". X86 hardware +requires that these masks have all the '1' bits in a contiguous block. So +0x3, 0x6 and 0xC are legal 4-bit masks with two bits set, but 0x5, 0x9 +and 0xA are not. On a system with a 20-bit mask each bit represents 5% +of the capacity of the cache. You could partition the cache into four +equal parts with masks: 0x1f, 0x3e0, 0x7c00, 0xf8000. + + +L3 details (code and data prioritization disabled) +-------------------------------------------------- +With CDP disabled the L3 schemata format is: + + L3:<cache_id0>=<cbm>;<cache_id1>=<cbm>;... + +L3 details (CDP enabled via mount option to resctrl) +---------------------------------------------------- +When CDP is enabled L3 control is split into two separate resources +so you can specify independent masks for code and data like this: + + L3data:<cache_id0>=<cbm>;<cache_id1>=<cbm>;... + L3code:<cache_id0>=<cbm>;<cache_id1>=<cbm>;... + +L2 details +---------- +L2 cache does not support code and data prioritization, so the +schemata format is always: + + L2:<cache_id0>=<cbm>;<cache_id1>=<cbm>;... + +Example 1 +--------- +On a two socket machine (one L3 cache per socket) with just four bits +for cache bit masks + +# mount -t resctrl resctrl /sys/fs/resctrl +# cd /sys/fs/resctrl +# mkdir p0 p1 +# echo "L3:0=3;1=c" > /sys/fs/resctrl/p0/schemata +# echo "L3:0=3;1=3" > /sys/fs/resctrl/p1/schemata + +The default resource group is unmodified, so we have access to all parts +of all caches (its schemata file reads "L3:0=f;1=f"). + +Tasks that are under the control of group "p0" may only allocate from the +"lower" 50% on cache ID 0, and the "upper" 50% of cache ID 1. +Tasks in group "p1" use the "lower" 50% of cache on both sockets. + +Example 2 +--------- +Again two sockets, but this time with a more realistic 20-bit mask. + +Two real time tasks pid=1234 running on processor 0 and pid=5678 running on +processor 1 on socket 0 on a 2-socket and dual core machine. To avoid noisy +neighbors, each of the two real-time tasks exclusively occupies one quarter +of L3 cache on socket 0. + +# mount -t resctrl resctrl /sys/fs/resctrl +# cd /sys/fs/resctrl + +First we reset the schemata for the default group so that the "upper" +50% of the L3 cache on socket 0 cannot be used by ordinary tasks: + +# echo "L3:0=3ff;1=fffff" > schemata + +Next we make a resource group for our first real time task and give +it access to the "top" 25% of the cache on socket 0. + +# mkdir p0 +# echo "L3:0=f8000;1=fffff" > p0/schemata + +Finally we move our first real time task into this resource group. We +also use taskset(1) to ensure the task always runs on a dedicated CPU +on socket 0. Most uses of resource groups will also constrain which +processors tasks run on. + +# echo 1234 > p0/tasks +# taskset -cp 1 1234 + +Ditto for the second real time task (with the remaining 25% of cache): + +# mkdir p1 +# echo "L3:0=7c00;1=fffff" > p1/schemata +# echo 5678 > p1/tasks +# taskset -cp 2 5678 + +Example 3 +--------- + +A single socket system which has real-time tasks running on core 4-7 and +non real-time workload assigned to core 0-3. The real-time tasks share text +and data, so a per task association is not required and due to interaction +with the kernel it's desired that the kernel on these cores shares L3 with +the tasks. + +# mount -t resctrl resctrl /sys/fs/resctrl +# cd /sys/fs/resctrl + +First we reset the schemata for the default group so that the "upper" +50% of the L3 cache on socket 0 cannot be used by ordinary tasks: + +# echo "L3:0=3ff" > schemata + +Next we make a resource group for our real time cores and give +it access to the "top" 50% of the cache on socket 0. + +# mkdir p0 +# echo "L3:0=ffc00;" > p0/schemata + +Finally we move core 4-7 over to the new group and make sure that the +kernel and the tasks running there get 50% of the cache. + +# echo C0 > p0/cpus diff --git a/Documentation/x86/topology.txt b/Documentation/x86/topology.txt index 06afac252f5b..f3e9d7e9ed6c 100644 --- a/Documentation/x86/topology.txt +++ b/Documentation/x86/topology.txt @@ -63,6 +63,15 @@ The topology of a system is described in the units of: The maximum possible number of packages in the system. Helpful for per package facilities to preallocate per package information. + - cpu_llc_id: + + A per-CPU variable containing: + - On Intel, the first APIC ID of the list of CPUs sharing the Last Level + Cache + + - On AMD, the Node ID or Core Complex ID containing the Last Level + Cache. In general, it is a number identifying an LLC uniquely on the + system. * Cores: |
