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-rw-r--r--Documentation/00-INDEX2
-rw-r--r--Documentation/ABI/removed/ip_queue9
-rw-r--r--Documentation/ABI/stable/sysfs-driver-usb-usbtmc14
-rw-r--r--Documentation/ABI/testing/debugfs-pfo-nx-crypto45
-rw-r--r--Documentation/ABI/testing/dev-kmsg90
-rw-r--r--Documentation/ABI/testing/sysfs-block-rssd26
-rw-r--r--Documentation/ABI/testing/sysfs-bus-fcoe77
-rw-r--r--Documentation/ABI/testing/sysfs-bus-hsi19
-rw-r--r--Documentation/ABI/testing/sysfs-bus-i2c-devices-lm353315
-rw-r--r--Documentation/ABI/testing/sysfs-bus-iio737
-rw-r--r--Documentation/ABI/testing/sysfs-bus-rbd4
-rw-r--r--Documentation/ABI/testing/sysfs-bus-usb19
-rw-r--r--Documentation/ABI/testing/sysfs-cfq-target-latency8
-rw-r--r--Documentation/ABI/testing/sysfs-class-backlight-driver-lm353348
-rw-r--r--Documentation/ABI/testing/sysfs-class-extcon97
-rw-r--r--Documentation/ABI/testing/sysfs-class-led-driver-lm353365
-rw-r--r--Documentation/ABI/testing/sysfs-class-net-mesh9
-rw-r--r--Documentation/ABI/testing/sysfs-devices-power35
-rw-r--r--Documentation/ABI/testing/sysfs-devices-system-cpu25
-rw-r--r--Documentation/ABI/testing/sysfs-driver-wacom23
-rw-r--r--Documentation/ABI/testing/sysfs-power59
-rw-r--r--Documentation/CodingStyle16
-rw-r--r--Documentation/DMA-attributes.txt18
-rw-r--r--Documentation/DocBook/80211.tmpl2
-rw-r--r--Documentation/DocBook/Makefile2
-rw-r--r--Documentation/DocBook/device-drivers.tmpl17
-rw-r--r--Documentation/DocBook/kernel-api.tmpl13
-rw-r--r--Documentation/DocBook/kernel-hacking.tmpl2
-rw-r--r--Documentation/DocBook/libata.tmpl2
-rw-r--r--Documentation/DocBook/mcabook.tmpl107
-rw-r--r--Documentation/DocBook/media/Makefile4
-rw-r--r--Documentation/DocBook/media/dvb/dvbproperty.xml160
-rw-r--r--Documentation/DocBook/media/v4l/biblio.xml29
-rw-r--r--Documentation/DocBook/media/v4l/common.xml38
-rw-r--r--Documentation/DocBook/media/v4l/compat.xml75
-rw-r--r--Documentation/DocBook/media/v4l/controls.xml714
-rw-r--r--Documentation/DocBook/media/v4l/dev-subdev.xml202
-rw-r--r--Documentation/DocBook/media/v4l/io.xml12
-rw-r--r--Documentation/DocBook/media/v4l/pixfmt-nv12m.xml2
-rw-r--r--Documentation/DocBook/media/v4l/pixfmt-srggb10.xml2
-rw-r--r--Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml29
-rw-r--r--Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml2
-rw-r--r--Documentation/DocBook/media/v4l/pixfmt.xml6
-rw-r--r--Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia614
-rw-r--r--Documentation/DocBook/media/v4l/subdev-image-processing-crop.svg63
-rw-r--r--Documentation/DocBook/media/v4l/subdev-image-processing-full.dia1588
-rw-r--r--Documentation/DocBook/media/v4l/subdev-image-processing-full.svg163
-rw-r--r--Documentation/DocBook/media/v4l/subdev-image-processing-scaling-multi-source.dia1152
-rw-r--r--Documentation/DocBook/media/v4l/subdev-image-processing-scaling-multi-source.svg116
-rw-r--r--Documentation/DocBook/media/v4l/v4l2.xml44
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-create-bufs.xml16
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-cropcap.xml4
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml211
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml4
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml119
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml4
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-enuminput.xml2
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-enumoutput.xml2
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-crop.xml4
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml6
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml130
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml26
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-fmt.xml2
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-frequency.xml6
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-parm.xml5
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml2
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-tuner.xml2
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml6
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml4
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml104
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-queryctrl.xml41
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-reqbufs.xml7
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml5
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml9
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml228
-rw-r--r--Documentation/HOWTO32
-rw-r--r--Documentation/Makefile2
-rw-r--r--Documentation/RCU/torture.txt15
-rw-r--r--Documentation/SubmittingPatches3
-rw-r--r--Documentation/arm/00-INDEX2
-rw-r--r--Documentation/arm/IXP200069
-rw-r--r--Documentation/arm/SPEAr/overview.txt41
-rw-r--r--Documentation/blackfin/bfin-gpio-notes.txt2
-rw-r--r--Documentation/cgroups/cpusets.txt2
-rw-r--r--Documentation/cgroups/memory.txt42
-rw-r--r--Documentation/cgroups/resource_counter.txt12
-rw-r--r--Documentation/cpu-hotplug.txt22
-rw-r--r--Documentation/cris/README62
-rw-r--r--Documentation/devices.txt11
-rw-r--r--Documentation/devicetree/bindings/arm/arch_timer.txt27
-rw-r--r--Documentation/devicetree/bindings/arm/atmel-adc.txt65
-rw-r--r--Documentation/devicetree/bindings/arm/fsl.txt12
-rw-r--r--Documentation/devicetree/bindings/arm/gic.txt35
-rw-r--r--Documentation/devicetree/bindings/arm/lpc32xx-mic.txt38
-rw-r--r--Documentation/devicetree/bindings/arm/lpc32xx.txt8
-rw-r--r--Documentation/devicetree/bindings/arm/mrvl/intc.txt40
-rw-r--r--Documentation/devicetree/bindings/arm/mrvl/mrvl.txt (renamed from Documentation/devicetree/bindings/arm/mrvl.txt)8
-rw-r--r--Documentation/devicetree/bindings/arm/mrvl/timer.txt13
-rw-r--r--Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt52
-rw-r--r--Documentation/devicetree/bindings/arm/spear-timer.txt18
-rw-r--r--Documentation/devicetree/bindings/arm/spear.txt20
-rw-r--r--Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt11
-rw-r--r--Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt16
-rw-r--r--Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt18
-rw-r--r--Documentation/devicetree/bindings/ata/ahci-platform.txt (renamed from Documentation/devicetree/bindings/ata/calxeda-sata.txt)5
-rw-r--r--Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt19
-rw-r--r--Documentation/devicetree/bindings/dma/snps-dma.txt17
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt38
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-mxs.txt87
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-nmk.txt31
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt42
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt43
-rw-r--r--Documentation/devicetree/bindings/gpio/mrvl-gpio.txt18
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-mxs.txt16
-rw-r--r--Documentation/devicetree/bindings/i2c/mrvl-i2c.txt15
-rw-r--r--Documentation/devicetree/bindings/i2c/mux.txt60
-rw-r--r--Documentation/devicetree/bindings/i2c/pnx.txt36
-rw-r--r--Documentation/devicetree/bindings/i2c/samsung-i2c.txt8
-rw-r--r--Documentation/devicetree/bindings/i2c/xiic.txt22
-rw-r--r--Documentation/devicetree/bindings/input/spear-keyboard.txt20
-rw-r--r--Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt16
-rw-r--r--Documentation/devicetree/bindings/input/twl6040-vibra.txt37
-rw-r--r--Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt14
-rw-r--r--Documentation/devicetree/bindings/mfd/da9052-i2c.txt60
-rw-r--r--Documentation/devicetree/bindings/mfd/tps65910.txt133
-rw-r--r--Documentation/devicetree/bindings/mfd/twl6040.txt62
-rw-r--r--Documentation/devicetree/bindings/misc/bmp085.txt20
-rw-r--r--Documentation/devicetree/bindings/mmc/fsl-esdhc.txt6
-rw-r--r--Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt2
-rw-r--r--Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt3
-rw-r--r--Documentation/devicetree/bindings/mmc/mmc.txt27
-rw-r--r--Documentation/devicetree/bindings/mmc/mmci.txt19
-rw-r--r--Documentation/devicetree/bindings/mmc/mxs-mmc.txt25
-rw-r--r--Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt4
-rw-r--r--Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt4
-rw-r--r--Documentation/devicetree/bindings/mtd/atmel-nand.txt10
-rw-r--r--Documentation/devicetree/bindings/mtd/orion-nand.txt50
-rw-r--r--Documentation/devicetree/bindings/net/can/fsl-flexcan.txt2
-rw-r--r--Documentation/devicetree/bindings/net/fsl-fec.txt2
-rw-r--r--Documentation/devicetree/bindings/net/lpc-eth.txt24
-rw-r--r--Documentation/devicetree/bindings/net/mdio-mux-gpio.txt127
-rw-r--r--Documentation/devicetree/bindings/net/mdio-mux.txt136
-rw-r--r--Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt95
-rw-r--r--Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt787
-rw-r--r--Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt1202
-rw-r--r--Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt1628
-rw-r--r--Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt918
-rw-r--r--Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt132
-rw-r--r--Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt132
-rw-r--r--Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt128
-rw-r--r--Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt155
-rw-r--r--Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt5
-rw-r--r--Documentation/devicetree/bindings/regulator/anatop-regulator.txt29
-rw-r--r--Documentation/devicetree/bindings/regulator/fixed-regulator.txt5
-rw-r--r--Documentation/devicetree/bindings/regulator/tps62360-regulator.txt44
-rw-r--r--Documentation/devicetree/bindings/regulator/tps6586x.txt97
-rw-r--r--Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt15
-rw-r--r--Documentation/devicetree/bindings/rtc/spear-rtc.txt17
-rw-r--r--Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt49
-rw-r--r--Documentation/devicetree/bindings/sound/mxs-audio-sgtl5000.txt17
-rw-r--r--Documentation/devicetree/bindings/sound/mxs-saif.txt36
-rw-r--r--Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt32
-rw-r--r--Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt15
-rw-r--r--Documentation/devicetree/bindings/sound/omap-dmic.txt21
-rw-r--r--Documentation/devicetree/bindings/sound/omap-mcpdm.txt21
-rw-r--r--Documentation/devicetree/bindings/sound/sgtl5000.txt2
-rw-r--r--Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt14
-rw-r--r--Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt54
-rw-r--r--Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt16
-rw-r--r--Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt26
-rw-r--r--Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt2
-rw-r--r--Documentation/devicetree/bindings/usb/isp1301.txt25
-rw-r--r--Documentation/devicetree/bindings/usb/lpc32xx-udc.txt28
-rw-r--r--Documentation/devicetree/bindings/usb/ohci-nxp.txt24
-rw-r--r--Documentation/devicetree/bindings/usb/spear-usb.txt39
-rw-r--r--Documentation/devicetree/bindings/usb/tegra-usb.txt3
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt2
-rw-r--r--Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt13
-rw-r--r--Documentation/devicetree/booting-without-of.txt55
-rw-r--r--Documentation/dma-buf-sharing.txt109
-rw-r--r--Documentation/driver-model/devres.txt8
-rwxr-xr-xDocumentation/dvb/get_dvb_firmware20
-rw-r--r--Documentation/dvb/opera-firmware.txt4
-rw-r--r--Documentation/dynamic-debug-howto.txt184
-rw-r--r--Documentation/edac.txt2
-rw-r--r--Documentation/eisa.txt2
-rw-r--r--Documentation/extcon/porting-android-switch-class124
-rw-r--r--Documentation/feature-removal-schedule.txt85
-rw-r--r--Documentation/filesystems/Locking5
-rw-r--r--Documentation/filesystems/ext3.txt6
-rw-r--r--Documentation/filesystems/gfs2-glocks.txt119
-rw-r--r--Documentation/filesystems/gfs2.txt9
-rw-r--r--Documentation/filesystems/nfs/pnfs.txt2
-rw-r--r--Documentation/filesystems/porting16
-rw-r--r--Documentation/filesystems/proc.txt26
-rw-r--r--Documentation/filesystems/qnx6.txt28
-rw-r--r--Documentation/filesystems/vfs.txt19
-rw-r--r--Documentation/gpio.txt3
-rw-r--r--Documentation/hwmon/ina2xx29
-rw-r--r--Documentation/hwmon/it8730
-rw-r--r--Documentation/hwmon/k10temp2
-rw-r--r--Documentation/hwmon/wm831x2
-rw-r--r--Documentation/i2c/functionality9
-rw-r--r--Documentation/i2c/i2c-protocol9
-rw-r--r--Documentation/i2c/muxes/i2c-mux-gpio (renamed from Documentation/i2c/muxes/gpio-i2cmux)12
-rw-r--r--Documentation/initrd.txt4
-rw-r--r--Documentation/ioctl/ioctl-number.txt2
-rw-r--r--Documentation/kbuild/kbuild.txt19
-rw-r--r--Documentation/kbuild/kconfig.txt18
-rw-r--r--Documentation/kernel-parameters.txt151
-rw-r--r--Documentation/leds/ledtrig-transient.txt152
-rw-r--r--Documentation/mca.txt313
-rw-r--r--Documentation/media-framework.txt19
-rw-r--r--Documentation/memory-devices/ti-emif.txt57
-rw-r--r--Documentation/memory-hotplug.txt2
-rw-r--r--Documentation/misc-devices/mei/.gitignore1
-rw-r--r--Documentation/misc-devices/mei/Makefile8
-rw-r--r--Documentation/misc-devices/mei/TODO2
-rw-r--r--Documentation/misc-devices/mei/mei-amt-version.c481
-rw-r--r--Documentation/misc-devices/mei/mei.txt215
-rw-r--r--Documentation/networking/00-INDEX8
-rw-r--r--Documentation/networking/3c359.txt58
-rw-r--r--Documentation/networking/3c509.txt1
-rw-r--r--Documentation/networking/batman-adv.txt22
-rw-r--r--Documentation/networking/can.txt2
-rw-r--r--Documentation/networking/driver.txt31
-rw-r--r--Documentation/networking/fore200e.txt6
-rw-r--r--Documentation/networking/ieee802154.txt75
-rw-r--r--Documentation/networking/ip-sysctl.txt47
-rw-r--r--Documentation/networking/mac80211-auth-assoc-deauth.txt10
-rw-r--r--Documentation/networking/netdevices.txt25
-rw-r--r--Documentation/networking/olympic.txt79
-rw-r--r--Documentation/networking/smctr.txt66
-rw-r--r--Documentation/networking/stmmac.txt29
-rw-r--r--Documentation/networking/tms380tr.txt147
-rw-r--r--Documentation/nfc/nfc-hci.txt180
-rw-r--r--Documentation/parisc/debugging2
-rw-r--r--Documentation/pinctrl.txt94
-rw-r--r--Documentation/power/charger-manager.txt41
-rw-r--r--Documentation/power/freezing-of-tasks.txt37
-rw-r--r--Documentation/power/power_supply_class.txt2
-rw-r--r--Documentation/power/regulator/regulator.txt3
-rw-r--r--Documentation/power/suspend-and-cpuhotplug.txt2
-rw-r--r--Documentation/prctl/seccomp_filter.txt163
-rw-r--r--Documentation/ramoops.txt16
-rw-r--r--Documentation/scheduler/sched-design-CFS.txt6
-rw-r--r--Documentation/scheduler/sched-domains.txt4
-rw-r--r--Documentation/scsi/00-INDEX2
-rw-r--r--Documentation/scsi/ChangeLog.megaraid_sas8
-rw-r--r--Documentation/scsi/ibmmca.txt1402
-rw-r--r--Documentation/scsi/scsi-parameters.txt6
-rw-r--r--Documentation/scsi/scsi_mid_low_api.txt2
-rw-r--r--Documentation/security/Smack.txt204
-rw-r--r--Documentation/security/Yama.txt10
-rw-r--r--Documentation/security/keys.txt31
-rw-r--r--Documentation/serial/stallion.txt22
-rw-r--r--Documentation/sound/alsa/ALSA-Configuration.txt2
-rw-r--r--Documentation/sound/alsa/HD-Audio-Models.txt4
-rw-r--r--Documentation/sound/alsa/compress_offload.txt2
-rw-r--r--Documentation/sound/oss/ALS4
-rw-r--r--Documentation/sparc/README-2.546
-rw-r--r--Documentation/static-keys.txt2
-rw-r--r--Documentation/sysctl/fs.txt7
-rw-r--r--Documentation/sysctl/net.txt7
-rw-r--r--Documentation/trace/uprobetracer.txt113
-rw-r--r--Documentation/usb/URB.txt22
-rw-r--r--Documentation/usb/dwc3.txt2
-rw-r--r--Documentation/usb/functionfs.txt67
-rw-r--r--Documentation/usb/usbmon.txt6
-rw-r--r--Documentation/usb/wusb-cbaf2
-rw-r--r--Documentation/video4linux/4CCs.txt32
-rw-r--r--Documentation/video4linux/README.cpia22
-rw-r--r--Documentation/video4linux/gspca.txt1
-rw-r--r--Documentation/video4linux/v4l2-controls.txt21
-rw-r--r--Documentation/video4linux/v4l2-framework.txt106
-rw-r--r--Documentation/virtual/kvm/api.txt281
-rw-r--r--Documentation/virtual/kvm/cpuid.txt6
-rw-r--r--Documentation/virtual/kvm/msr.txt4
-rw-r--r--Documentation/virtual/virtio-spec.txt1164
-rw-r--r--Documentation/vm/pagemap.txt2
-rw-r--r--Documentation/vm/transhuge.txt62
-rw-r--r--Documentation/vme_api.txt396
-rw-r--r--Documentation/watchdog/src/watchdog-test.c20
-rw-r--r--Documentation/watchdog/watchdog-kernel-api.txt45
-rw-r--r--Documentation/watchdog/watchdog-parameters.txt5
-rw-r--r--Documentation/zh_CN/magic-number.txt2
286 files changed, 19801 insertions, 3195 deletions
diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX
index 2214f123a976..49c051380daf 100644
--- a/Documentation/00-INDEX
+++ b/Documentation/00-INDEX
@@ -218,8 +218,6 @@ m68k/
- directory with info about Linux on Motorola 68k architecture.
magic-number.txt
- list of magic numbers used to mark/protect kernel data structures.
-mca.txt
- - info on supporting Micro Channel Architecture (e.g. PS/2) systems.
md.txt
- info on boot arguments for the multiple devices driver.
memory-barriers.txt
diff --git a/Documentation/ABI/removed/ip_queue b/Documentation/ABI/removed/ip_queue
new file mode 100644
index 000000000000..3243613bc2d2
--- /dev/null
+++ b/Documentation/ABI/removed/ip_queue
@@ -0,0 +1,9 @@
+What: ip_queue
+Date: finally removed in kernel v3.5.0
+Contact: Pablo Neira Ayuso <pablo@netfilter.org>
+Description:
+ ip_queue has been replaced by nfnetlink_queue which provides
+ more advanced queueing mechanism to user-space. The ip_queue
+ module was already announced to become obsolete years ago.
+
+Users:
diff --git a/Documentation/ABI/stable/sysfs-driver-usb-usbtmc b/Documentation/ABI/stable/sysfs-driver-usb-usbtmc
index 2a7f9a00cb0a..e960cd027e1e 100644
--- a/Documentation/ABI/stable/sysfs-driver-usb-usbtmc
+++ b/Documentation/ABI/stable/sysfs-driver-usb-usbtmc
@@ -1,5 +1,5 @@
-What: /sys/bus/usb/drivers/usbtmc/devices/*/interface_capabilities
-What: /sys/bus/usb/drivers/usbtmc/devices/*/device_capabilities
+What: /sys/bus/usb/drivers/usbtmc/*/interface_capabilities
+What: /sys/bus/usb/drivers/usbtmc/*/device_capabilities
Date: August 2008
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Description:
@@ -12,8 +12,8 @@ Description:
The files are read only.
-What: /sys/bus/usb/drivers/usbtmc/devices/*/usb488_interface_capabilities
-What: /sys/bus/usb/drivers/usbtmc/devices/*/usb488_device_capabilities
+What: /sys/bus/usb/drivers/usbtmc/*/usb488_interface_capabilities
+What: /sys/bus/usb/drivers/usbtmc/*/usb488_device_capabilities
Date: August 2008
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Description:
@@ -27,7 +27,7 @@ Description:
The files are read only.
-What: /sys/bus/usb/drivers/usbtmc/devices/*/TermChar
+What: /sys/bus/usb/drivers/usbtmc/*/TermChar
Date: August 2008
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Description:
@@ -40,7 +40,7 @@ Description:
sent to the device or not.
-What: /sys/bus/usb/drivers/usbtmc/devices/*/TermCharEnabled
+What: /sys/bus/usb/drivers/usbtmc/*/TermCharEnabled
Date: August 2008
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Description:
@@ -51,7 +51,7 @@ Description:
published by the USB-IF.
-What: /sys/bus/usb/drivers/usbtmc/devices/*/auto_abort
+What: /sys/bus/usb/drivers/usbtmc/*/auto_abort
Date: August 2008
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Description:
diff --git a/Documentation/ABI/testing/debugfs-pfo-nx-crypto b/Documentation/ABI/testing/debugfs-pfo-nx-crypto
new file mode 100644
index 000000000000..685d5a448423
--- /dev/null
+++ b/Documentation/ABI/testing/debugfs-pfo-nx-crypto
@@ -0,0 +1,45 @@
+What: /sys/kernel/debug/nx-crypto/*
+Date: March 2012
+KernelVersion: 3.4
+Contact: Kent Yoder <key@linux.vnet.ibm.com>
+Description:
+
+ These debugfs interfaces are built by the nx-crypto driver, built in
+arch/powerpc/crypto/nx.
+
+Error Detection
+===============
+
+errors:
+- A u32 providing a total count of errors since the driver was loaded. The
+only errors counted here are those returned from the hcall, H_COP_OP.
+
+last_error:
+- The most recent non-zero return code from the H_COP_OP hcall. -EBUSY is not
+recorded here (the hcall will retry until -EBUSY goes away).
+
+last_error_pid:
+- The process ID of the process who received the most recent error from the
+hcall.
+
+Device Use
+==========
+
+aes_bytes:
+- The total number of bytes encrypted using AES in any of the driver's
+supported modes.
+
+aes_ops:
+- The total number of AES operations submitted to the hardware.
+
+sha256_bytes:
+- The total number of bytes hashed by the hardware using SHA-256.
+
+sha256_ops:
+- The total number of SHA-256 operations submitted to the hardware.
+
+sha512_bytes:
+- The total number of bytes hashed by the hardware using SHA-512.
+
+sha512_ops:
+- The total number of SHA-512 operations submitted to the hardware.
diff --git a/Documentation/ABI/testing/dev-kmsg b/Documentation/ABI/testing/dev-kmsg
new file mode 100644
index 000000000000..281ecc5f9709
--- /dev/null
+++ b/Documentation/ABI/testing/dev-kmsg
@@ -0,0 +1,90 @@
+What: /dev/kmsg
+Date: Mai 2012
+KernelVersion: 3.5
+Contact: Kay Sievers <kay@vrfy.org>
+Description: The /dev/kmsg character device node provides userspace access
+ to the kernel's printk buffer.
+
+ Injecting messages:
+ Every write() to the opened device node places a log entry in
+ the kernel's printk buffer.
+
+ The logged line can be prefixed with a <N> syslog prefix, which
+ carries the syslog priority and facility. The single decimal
+ prefix number is composed of the 3 lowest bits being the syslog
+ priority and the higher bits the syslog facility number.
+
+ If no prefix is given, the priority number is the default kernel
+ log priority and the facility number is set to LOG_USER (1). It
+ is not possible to inject messages from userspace with the
+ facility number LOG_KERN (0), to make sure that the origin of
+ the messages can always be reliably determined.
+
+ Accessing the buffer:
+ Every read() from the opened device node receives one record
+ of the kernel's printk buffer.
+
+ The first read() directly following an open() always returns
+ first message in the buffer; there is no kernel-internal
+ persistent state; many readers can concurrently open the device
+ and read from it, without affecting other readers.
+
+ Every read() will receive the next available record. If no more
+ records are available read() will block, or if O_NONBLOCK is
+ used -EAGAIN returned.
+
+ Messages in the record ring buffer get overwritten as whole,
+ there are never partial messages received by read().
+
+ In case messages get overwritten in the circular buffer while
+ the device is kept open, the next read() will return -EPIPE,
+ and the seek position be updated to the next available record.
+ Subsequent reads() will return available records again.
+
+ Unlike the classic syslog() interface, the 64 bit record
+ sequence numbers allow to calculate the amount of lost
+ messages, in case the buffer gets overwritten. And they allow
+ to reconnect to the buffer and reconstruct the read position
+ if needed, without limiting the interface to a single reader.
+
+ The device supports seek with the following parameters:
+ SEEK_SET, 0
+ seek to the first entry in the buffer
+ SEEK_END, 0
+ seek after the last entry in the buffer
+ SEEK_DATA, 0
+ seek after the last record available at the time
+ the last SYSLOG_ACTION_CLEAR was issued.
+
+ The output format consists of a prefix carrying the syslog
+ prefix including priority and facility, the 64 bit message
+ sequence number and the monotonic timestamp in microseconds.
+ The values are separated by a ','. Future extensions might
+ add more comma separated values before the terminating ';'.
+ Unknown values should be gracefully ignored.
+
+ The human readable text string starts directly after the ';'
+ and is terminated by a '\n'. Untrusted values derived from
+ hardware or other facilities are printed, therefore
+ all non-printable characters in the log message are escaped
+ by "\x00" C-style hex encoding.
+
+ A line starting with ' ', is a continuation line, adding
+ key/value pairs to the log message, which provide the machine
+ readable context of the message, for reliable processing in
+ userspace.
+
+ Example:
+ 7,160,424069;pci_root PNP0A03:00: host bridge window [io 0x0000-0x0cf7] (ignored)
+ SUBSYSTEM=acpi
+ DEVICE=+acpi:PNP0A03:00
+ 6,339,5140900;NET: Registered protocol family 10
+ 30,340,5690716;udevd[80]: starting version 181
+
+ The DEVICE= key uniquely identifies devices the following way:
+ b12:8 - block dev_t
+ c127:3 - char dev_t
+ n8 - netdev ifindex
+ +sound:card0 - subsystem:devname
+
+Users: dmesg(1), userspace kernel log consumers
diff --git a/Documentation/ABI/testing/sysfs-block-rssd b/Documentation/ABI/testing/sysfs-block-rssd
new file mode 100644
index 000000000000..679ce3543122
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-block-rssd
@@ -0,0 +1,26 @@
+What: /sys/block/rssd*/registers
+Date: March 2012
+KernelVersion: 3.3
+Contact: Asai Thambi S P <asamymuthupa@micron.com>
+Description: This is a read-only file. Dumps below driver information and
+ hardware registers.
+ - S ACTive
+ - Command Issue
+ - Completed
+ - PORT IRQ STAT
+ - HOST IRQ STAT
+ - Allocated
+ - Commands in Q
+
+What: /sys/block/rssd*/status
+Date: April 2012
+KernelVersion: 3.4
+Contact: Asai Thambi S P <asamymuthupa@micron.com>
+Description: This is a read-only file. Indicates the status of the device.
+
+What: /sys/block/rssd*/flags
+Date: May 2012
+KernelVersion: 3.5
+Contact: Asai Thambi S P <asamymuthupa@micron.com>
+Description: This is a read-only file. Dumps the flags in port and driver
+ data structure
diff --git a/Documentation/ABI/testing/sysfs-bus-fcoe b/Documentation/ABI/testing/sysfs-bus-fcoe
new file mode 100644
index 000000000000..469d09c02f6b
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-fcoe
@@ -0,0 +1,77 @@
+What: /sys/bus/fcoe/ctlr_X
+Date: March 2012
+KernelVersion: TBD
+Contact: Robert Love <robert.w.love@intel.com>, devel@open-fcoe.org
+Description: 'FCoE Controller' instances on the fcoe bus
+Attributes:
+
+ fcf_dev_loss_tmo: Device loss timeout peroid (see below). Changing
+ this value will change the dev_loss_tmo for all
+ FCFs discovered by this controller.
+
+ lesb_link_fail: Link Error Status Block (LESB) link failure count.
+
+ lesb_vlink_fail: Link Error Status Block (LESB) virtual link
+ failure count.
+
+ lesb_miss_fka: Link Error Status Block (LESB) missed FCoE
+ Initialization Protocol (FIP) Keep-Alives (FKA).
+
+ lesb_symb_err: Link Error Status Block (LESB) symbolic error count.
+
+ lesb_err_block: Link Error Status Block (LESB) block error count.
+
+ lesb_fcs_error: Link Error Status Block (LESB) Fibre Channel
+ Serivces error count.
+
+Notes: ctlr_X (global increment starting at 0)
+
+What: /sys/bus/fcoe/fcf_X
+Date: March 2012
+KernelVersion: TBD
+Contact: Robert Love <robert.w.love@intel.com>, devel@open-fcoe.org
+Description: 'FCoE FCF' instances on the fcoe bus. A FCF is a Fibre Channel
+ Forwarder, which is a FCoE switch that can accept FCoE
+ (Ethernet) packets, unpack them, and forward the embedded
+ Fibre Channel frames into a FC fabric. It can also take
+ outbound FC frames and pack them in Ethernet packets to
+ be sent to their destination on the Ethernet segment.
+Attributes:
+
+ fabric_name: Identifies the fabric that the FCF services.
+
+ switch_name: Identifies the FCF.
+
+ priority: The switch's priority amongst other FCFs on the same
+ fabric.
+
+ selected: 1 indicates that the switch has been selected for use;
+ 0 indicates that the swich will not be used.
+
+ fc_map: The Fibre Channel MAP
+
+ vfid: The Virtual Fabric ID
+
+ mac: The FCF's MAC address
+
+ fka_peroid: The FIP Keep-Alive peroid
+
+ fabric_state: The internal kernel state
+ "Unknown" - Initialization value
+ "Disconnected" - No link to the FCF/fabric
+ "Connected" - Host is connected to the FCF
+ "Deleted" - FCF is being removed from the system
+
+ dev_loss_tmo: The device loss timeout peroid for this FCF.
+
+Notes: A device loss infrastructre similar to the FC Transport's
+ is present in fcoe_sysfs. It is nice to have so that a
+ link flapping adapter doesn't continually advance the count
+ used to identify the discovered FCF. FCFs will exist in a
+ "Disconnected" state until either the timer expires and the
+ FCF becomes "Deleted" or the FCF is rediscovered and becomes
+ "Connected."
+
+
+Users: The first user of this interface will be the fcoeadm application,
+ which is commonly packaged in the fcoe-utils package.
diff --git a/Documentation/ABI/testing/sysfs-bus-hsi b/Documentation/ABI/testing/sysfs-bus-hsi
new file mode 100644
index 000000000000..1b1b282a99e1
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-hsi
@@ -0,0 +1,19 @@
+What: /sys/bus/hsi
+Date: April 2012
+KernelVersion: 3.4
+Contact: Carlos Chinea <carlos.chinea@nokia.com>
+Description:
+ High Speed Synchronous Serial Interface (HSI) is a
+ serial interface mainly used for connecting application
+ engines (APE) with cellular modem engines (CMT) in cellular
+ handsets.
+ The bus will be populated with devices (hsi_clients) representing
+ the protocols available in the system. Bus drivers implement
+ those protocols.
+
+What: /sys/bus/hsi/devices/.../modalias
+Date: April 2012
+KernelVersion: 3.4
+Contact: Carlos Chinea <carlos.chinea@nokia.com>
+Description: Stores the same MODALIAS value emitted by uevent
+ Format: hsi:<hsi_client device name>
diff --git a/Documentation/ABI/testing/sysfs-bus-i2c-devices-lm3533 b/Documentation/ABI/testing/sysfs-bus-i2c-devices-lm3533
new file mode 100644
index 000000000000..1b62230b33b9
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-i2c-devices-lm3533
@@ -0,0 +1,15 @@
+What: /sys/bus/i2c/devices/.../output_hvled[n]
+Date: April 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Set the controlling backlight device for high-voltage current
+ sink HVLED[n] (n = 1, 2) (0, 1).
+
+What: /sys/bus/i2c/devices/.../output_lvled[n]
+Date: April 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Set the controlling led device for low-voltage current sink
+ LVLED[n] (n = 1..5) (0..3).
diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio
new file mode 100644
index 000000000000..5bc8a476c15e
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-iio
@@ -0,0 +1,737 @@
+What: /sys/bus/iio/devices/iio:deviceX
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Hardware chip or device accessed by one communication port.
+ Corresponds to a grouping of sensor channels. X is the IIO
+ index of the device.
+
+What: /sys/bus/iio/devices/triggerX
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ An event driven driver of data capture to an in kernel buffer.
+ May be provided by a device driver that also has an IIO device
+ based on hardware generated events (e.g. data ready) or
+ provided by a separate driver for other hardware (e.g.
+ periodic timer, GPIO or high resolution timer).
+ Contains trigger type specific elements. These do not
+ generalize well and hence are not documented in this file.
+ X is the IIO index of the trigger.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Directory of attributes relating to the buffer for the device.
+
+What: /sys/bus/iio/devices/iio:deviceX/name
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Description of the physical chip / device for device X.
+ Typically a part number.
+
+What: /sys/bus/iio/devices/iio:deviceX/sampling_frequency
+What: /sys/bus/iio/devices/iio:deviceX/buffer/sampling_frequency
+What: /sys/bus/iio/devices/triggerX/sampling_frequency
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Some devices have internal clocks. This parameter sets the
+ resulting sampling frequency. In many devices this
+ parameter has an effect on input filters etc rather than
+ simply controlling when the input is sampled. As this
+ effects datardy triggers, hardware buffers and the sysfs
+ direct access interfaces, it may be found in any of the
+ relevant directories. If it effects all of the above
+ then it is to be found in the base device directory.
+
+What: /sys/bus/iio/devices/iio:deviceX/sampling_frequency_available
+What: /sys/.../iio:deviceX/buffer/sampling_frequency_available
+What: /sys/bus/iio/devices/triggerX/sampling_frequency_available
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ When the internal sampling clock can only take a small
+ discrete set of values, this file lists those available.
+
+What: /sys/bus/iio/devices/iio:deviceX/oversampling_ratio
+KernelVersion: 2.6.38
+Contact: linux-iio@vger.kernel.org
+Description:
+ Hardware dependent ADC oversampling. Controls the sampling ratio
+ of the digital filter if available.
+
+What: /sys/bus/iio/devices/iio:deviceX/oversampling_ratio_available
+KernelVersion: 2.6.38
+Contact: linux-iio@vger.kernel.org
+Description:
+ Hardware dependent values supported by the oversampling filter.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_raw
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Raw (unscaled no bias removal etc) voltage measurement from
+ channel Y. In special cases where the channel does not
+ correspond to externally available input one of the named
+ versions may be used. The number must always be specified and
+ unique to allow association with event codes. Units after
+ application of scale and offset are microvolts.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_raw
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Raw (unscaled) differential voltage measurement equivalent to
+ channel Y - channel Z where these channel numbers apply to the
+ physically equivalent inputs when non differential readings are
+ separately available. In differential only parts, then all that
+ is required is a consistent labeling. Units after application
+ of scale and offset are microvolts.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_capacitanceY_raw
+KernelVersion: 3.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ Raw capacitance measurement from channel Y. Units after
+ application of scale and offset are nanofarads.
+
+What: /sys/.../iio:deviceX/in_capacitanceY-in_capacitanceZ_raw
+KernelVersion: 3.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ Raw differential capacitance measurement equivalent to
+ channel Y - channel Z where these channel numbers apply to the
+ physically equivalent inputs when non differential readings are
+ separately available. In differential only parts, then all that
+ is required is a consistent labeling. Units after application
+ of scale and offset are nanofarads.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_temp_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_tempX_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_temp_x_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_temp_y_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_temp_z_raw
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Raw (unscaled no bias removal etc) temperature measurement.
+ If an axis is specified it generally means that the temperature
+ sensor is associated with one part of a compound device (e.g.
+ a gyroscope axis). Units after application of scale and offset
+ are milli degrees Celsuis.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_tempX_input
+KernelVersion: 2.6.38
+Contact: linux-iio@vger.kernel.org
+Description:
+ Scaled temperature measurement in milli degrees Celsius.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_x_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_y_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_z_raw
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Acceleration in direction x, y or z (may be arbitrarily assigned
+ but should match other such assignments on device).
+ Has all of the equivalent parameters as per voltageY. Units
+ after application of scale and offset are m/s^2.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_raw
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Angular velocity about axis x, y or z (may be arbitrarily
+ assigned) Data converted by application of offset then scale to
+ radians per second. Has all the equivalent parameters as
+ per voltageY. Units after application of scale and offset are
+ radians per second.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_incli_x_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_incli_y_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_incli_z_raw
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Inclination raw reading about axis x, y or z (may be
+ arbitrarily assigned). Data converted by application of offset
+ and scale to Degrees.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_magn_x_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_magn_y_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_magn_z_raw
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Magnetic field along axis x, y or z (may be arbitrarily
+ assigned). Data converted by application of offset
+ then scale to Gauss.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_x_peak_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_y_peak_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_z_peak_raw
+KernelVersion: 2.6.36
+Contact: linux-iio@vger.kernel.org
+Description:
+ Highest value since some reset condition. These
+ attributes allow access to this and are otherwise
+ the direct equivalent of the <type>Y[_name]_raw attributes.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_xyz_squared_peak_raw
+KernelVersion: 2.6.36
+Contact: linux-iio@vger.kernel.org
+Description:
+ A computed peak value based on the sum squared magnitude of
+ the underlying value in the specified directions.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_offset
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_x_offset
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_y_offset
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_z_offset
+What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_offset
+What: /sys/bus/iio/devices/iio:deviceX/in_voltage_offset
+What: /sys/bus/iio/devices/iio:deviceX/in_tempY_offset
+What: /sys/bus/iio/devices/iio:deviceX/in_temp_offset
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ If known for a device, offset to be added to <type>[Y]_raw prior
+ to scaling by <type>[Y]_scale in order to obtain value in the
+ <type> units as specified in <type>[y]_raw documentation.
+ Not present if the offset is always 0 or unknown. If Y or
+ axis <x|y|z> is not present, then the offset applies to all
+ in channels of <type>.
+ May be writable if a variable offset can be applied on the
+ device. Note that this is different to calibbias which
+ is for devices (or drivers) that apply offsets to compensate
+ for variation between different instances of the part, typically
+ adjusted by using some hardware supported calibration procedure.
+ Calibbias is applied internally, offset is applied in userspace
+ to the _raw output.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_voltage_scale
+What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_peak_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_magn_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_magn_x_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_magn_y_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_magn_z_scale
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ If known for a device, scale to be applied to <type>Y[_name]_raw
+ post addition of <type>[Y][_name]_offset in order to obtain the
+ measured value in <type> units as specified in
+ <type>[Y][_name]_raw documentation. If shared across all in
+ channels then Y and <x|y|z> are not present and the value is
+ called <type>[Y][_name]_scale. The peak modifier means this
+ value is applied to <type>Y[_name]_peak_raw values.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_x_calibbias
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_y_calibbias
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_z_calibbias
+What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibbias
+What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibbias
+What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibbias
+What: /sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibbias
+What: /sys/bus/iio/devices/iio:deviceX/in_proximity0_calibbias
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Hardware applied calibration offset. (assumed to fix production
+ inaccuracies).
+
+What /sys/bus/iio/devices/iio:deviceX/in_voltageY_calibscale
+What /sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_calibscale
+What /sys/bus/iio/devices/iio:deviceX/in_voltage_calibscale
+What /sys/bus/iio/devices/iio:deviceX/in_accel_x_calibscale
+What /sys/bus/iio/devices/iio:deviceX/in_accel_y_calibscale
+What /sys/bus/iio/devices/iio:deviceX/in_accel_z_calibscale
+What /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibscale
+What /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibscale
+What /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibscale
+what /sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibscale
+what /sys/bus/iio/devices/iio:deviceX/in_proximity0_calibscale
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Hardware applied calibration scale factor. (assumed to fix
+ production inaccuracies). If shared across all channels,
+ <type>_calibscale is used.
+
+What: /sys/bus/iio/devices/iio:deviceX/in_accel_scale_available
+What: /sys/.../iio:deviceX/in_voltageX_scale_available
+What: /sys/.../iio:deviceX/in_voltage-voltage_scale_available
+What: /sys/.../iio:deviceX/out_voltageX_scale_available
+What: /sys/.../iio:deviceX/in_capacitance_scale_available
+KernelVersion: 2.635
+Contact: linux-iio@vger.kernel.org
+Description:
+ If a discrete set of scale values are available, they
+ are listed in this attribute.
+
+What /sys/bus/iio/devices/iio:deviceX/out_voltageY_hardwaregain
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Hardware applied gain factor. If shared across all channels,
+ <type>_hardwaregain is used.
+
+What: /sys/.../in_accel_filter_low_pass_3db_frequency
+What: /sys/.../in_magn_filter_low_pass_3db_frequency
+What: /sys/.../in_anglvel_filter_low_pass_3db_frequency
+KernelVersion: 3.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ If a known or controllable low pass filter is applied
+ to the underlying data channel, then this parameter
+ gives the 3dB frequency of the filter in Hz.
+
+What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_raw
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Raw (unscaled, no bias etc.) output voltage for
+ channel Y. The number must always be specified and
+ unique if the output corresponds to a single channel.
+
+What: /sys/bus/iio/devices/iio:deviceX/out_voltageY&Z_raw
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Raw (unscaled, no bias etc.) output voltage for an aggregate of
+ channel Y, channel Z, etc. This interface is available in cases
+ where a single output sets the value for multiple channels
+ simultaneously.
+
+What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_powerdown_mode
+What: /sys/bus/iio/devices/iio:deviceX/out_voltage_powerdown_mode
+KernelVersion: 2.6.38
+Contact: linux-iio@vger.kernel.org
+Description:
+ Specifies the output powerdown mode.
+ DAC output stage is disconnected from the amplifier and
+ 1kohm_to_gnd: connected to ground via an 1kOhm resistor
+ 100kohm_to_gnd: connected to ground via an 100kOhm resistor
+ three_state: left floating
+ For a list of available output power down options read
+ outX_powerdown_mode_available. If Y is not present the
+ mode is shared across all outputs.
+
+What: /sys/.../iio:deviceX/out_votlageY_powerdown_mode_available
+What: /sys/.../iio:deviceX/out_voltage_powerdown_mode_available
+KernelVersion: 2.6.38
+Contact: linux-iio@vger.kernel.org
+Description:
+ Lists all available output power down modes.
+ If Y is not present the mode is shared across all outputs.
+
+What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_powerdown
+What: /sys/bus/iio/devices/iio:deviceX/out_voltage_powerdown
+KernelVersion: 2.6.38
+Contact: linux-iio@vger.kernel.org
+Description:
+ Writing 1 causes output Y to enter the power down mode specified
+ by the corresponding outY_powerdown_mode. Clearing returns to
+ normal operation. Y may be suppressed if all outputs are
+ controlled together.
+
+What: /sys/bus/iio/devices/iio:deviceX/events
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Configuration of which hardware generated events are passed up
+ to user-space.
+
+What: /sys/.../iio:deviceX/events/in_accel_x_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_x_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_accel_y_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_y_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_accel_z_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_z_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_anglvel_x_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_anglvel_x_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_anglvel_y_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_anglvel_y_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_anglvel_z_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_anglvel_z_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_magn_x_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_magn_x_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_magn_y_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_magn_y_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_magn_z_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_magn_z_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_voltageY_supply_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_voltageY_supply_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_voltageY_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_voltageY_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_tempY_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_tempY_thresh_falling_en
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Event generated when channel passes a threshold in the specified
+ (_rising|_falling) direction. If the direction is not specified,
+ then either the device will report an event which ever direction
+ a single threshold value is passed in (e.g.
+ <type>[Y][_name]_<raw|input>_thresh_value) or
+ <type>[Y][_name]_<raw|input>_thresh_rising_value and
+ <type>[Y][_name]_<raw|input>_thresh_falling_value may take
+ different values, but the device can only enable both thresholds
+ or neither.
+ Note the driver will assume the last p events requested are
+ to be enabled where p is however many it supports (which may
+ vary depending on the exact set requested. So if you want to be
+ sure you have set what you think you have, check the contents of
+ these attributes after everything is configured. Drivers may
+ have to buffer any parameters so that they are consistent when
+ a given event type is enabled a future point (and not those for
+ whatever event was previously enabled).
+
+What: /sys/.../iio:deviceX/events/in_accel_x_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_x_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_accel_y_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_y_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_accel_z_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_z_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_anglvel_x_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_anglvel_x_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_anglvel_y_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_anglvel_y_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_anglvel_z_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_anglvel_z_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_magn_x_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_magn_x_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_magn_y_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_magn_y_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_magn_z_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_magn_z_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_voltageY_supply_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_voltageY_supply_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_voltageY_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_voltageY_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_tempY_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_tempY_roc_falling_en
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Event generated when channel passes a threshold on the rate of
+ change (1st differential) in the specified (_rising|_falling)
+ direction. If the direction is not specified, then either the
+ device will report an event which ever direction a single
+ threshold value is passed in (e.g.
+ <type>[Y][_name]_<raw|input>_roc_value) or
+ <type>[Y][_name]_<raw|input>_roc_rising_value and
+ <type>[Y][_name]_<raw|input>_roc_falling_value may take
+ different values, but the device can only enable both rate of
+ change thresholds or neither.
+ Note the driver will assume the last p events requested are
+ to be enabled where p is however many it supports (which may
+ vary depending on the exact set requested. So if you want to be
+ sure you have set what you think you have, check the contents of
+ these attributes after everything is configured. Drivers may
+ have to buffer any parameters so that they are consistent when
+ a given event type is enabled a future point (and not those for
+ whatever event was previously enabled).
+
+What: /sys/.../events/in_accel_x_raw_thresh_rising_value
+What: /sys/.../events/in_accel_x_raw_thresh_falling_value
+What: /sys/.../events/in_accel_y_raw_thresh_rising_value
+What: /sys/.../events/in_accel_y_raw_thresh_falling_value
+What: /sys/.../events/in_accel_z_raw_thresh_rising_value
+What: /sys/.../events/in_accel_z_raw_thresh_falling_value
+What: /sys/.../events/in_anglvel_x_raw_thresh_rising_value
+What: /sys/.../events/in_anglvel_x_raw_thresh_falling_value
+What: /sys/.../events/in_anglvel_y_raw_thresh_rising_value
+What: /sys/.../events/in_anglvel_y_raw_thresh_falling_value
+What: /sys/.../events/in_anglvel_z_raw_thresh_rising_value
+What: /sys/.../events/in_anglvel_z_raw_thresh_falling_value
+What: /sys/.../events/in_magn_x_raw_thresh_rising_value
+What: /sys/.../events/in_magn_x_raw_thresh_falling_value
+What: /sys/.../events/in_magn_y_raw_thresh_rising_value
+What: /sys/.../events/in_magn_y_raw_thresh_falling_value
+What: /sys/.../events/in_magn_z_raw_thresh_rising_value
+What: /sys/.../events/in_magn_z_raw_thresh_falling_value
+What: /sys/.../events/in_voltageY_supply_raw_thresh_rising_value
+What: /sys/.../events/in_voltageY_supply_raw_thresh_falling_value
+What: /sys/.../events/in_voltageY_raw_thresh_rising_value
+What: /sys/.../events/in_voltageY_raw_thresh_falling_value
+What: /sys/.../events/in_tempY_raw_thresh_rising_value
+What: /sys/.../events/in_tempY_raw_thresh_falling_value
+What: /sys/.../events/in_illuminance0_thresh_falling_value
+what: /sys/.../events/in_illuminance0_thresh_rising_value
+what: /sys/.../events/in_proximity0_thresh_falling_value
+what: /sys/.../events/in_proximity0_thresh_rising_value
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Specifies the value of threshold that the device is comparing
+ against for the events enabled by
+ <type>Y[_name]_thresh[_rising|falling]_en.
+ If separate attributes exist for the two directions, but
+ direction is not specified for this attribute, then a single
+ threshold value applies to both directions.
+ The raw or input element of the name indicates whether the
+ value is in raw device units or in processed units (as _raw
+ and _input do on sysfs direct channel read attributes).
+
+What: /sys/.../events/in_accel_x_raw_roc_rising_value
+What: /sys/.../events/in_accel_x_raw_roc_falling_value
+What: /sys/.../events/in_accel_y_raw_roc_rising_value
+What: /sys/.../events/in_accel_y_raw_roc_falling_value
+What: /sys/.../events/in_accel_z_raw_roc_rising_value
+What: /sys/.../events/in_accel_z_raw_roc_falling_value
+What: /sys/.../events/in_anglvel_x_raw_roc_rising_value
+What: /sys/.../events/in_anglvel_x_raw_roc_falling_value
+What: /sys/.../events/in_anglvel_y_raw_roc_rising_value
+What: /sys/.../events/in_anglvel_y_raw_roc_falling_value
+What: /sys/.../events/in_anglvel_z_raw_roc_rising_value
+What: /sys/.../events/in_anglvel_z_raw_roc_falling_value
+What: /sys/.../events/in_magn_x_raw_roc_rising_value
+What: /sys/.../events/in_magn_x_raw_roc_falling_value
+What: /sys/.../events/in_magn_y_raw_roc_rising_value
+What: /sys/.../events/in_magn_y_raw_roc_falling_value
+What: /sys/.../events/in_magn_z_raw_roc_rising_value
+What: /sys/.../events/in_magn_z_raw_roc_falling_value
+What: /sys/.../events/in_voltageY_supply_raw_roc_rising_value
+What: /sys/.../events/in_voltageY_supply_raw_roc_falling_value
+What: /sys/.../events/in_voltageY_raw_roc_rising_value
+What: /sys/.../events/in_voltageY_raw_roc_falling_value
+What: /sys/.../events/in_tempY_raw_roc_rising_value
+What: /sys/.../events/in_tempY_raw_roc_falling_value
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Specifies the value of rate of change threshold that the
+ device is comparing against for the events enabled by
+ <type>[Y][_name]_roc[_rising|falling]_en.
+ If separate attributes exist for the two directions,
+ but direction is not specified for this attribute,
+ then a single threshold value applies to both directions.
+ The raw or input element of the name indicates whether the
+ value is in raw device units or in processed units (as _raw
+ and _input do on sysfs direct channel read attributes).
+
+What: /sys/.../events/in_accel_x_thresh_rising_period
+What: /sys/.../events/in_accel_x_thresh_falling_period
+hat: /sys/.../events/in_accel_x_roc_rising_period
+What: /sys/.../events/in_accel_x_roc_falling_period
+What: /sys/.../events/in_accel_y_thresh_rising_period
+What: /sys/.../events/in_accel_y_thresh_falling_period
+What: /sys/.../events/in_accel_y_roc_rising_period
+What: /sys/.../events/in_accel_y_roc_falling_period
+What: /sys/.../events/in_accel_z_thresh_rising_period
+What: /sys/.../events/in_accel_z_thresh_falling_period
+What: /sys/.../events/in_accel_z_roc_rising_period
+What: /sys/.../events/in_accel_z_roc_falling_period
+What: /sys/.../events/in_anglvel_x_thresh_rising_period
+What: /sys/.../events/in_anglvel_x_thresh_falling_period
+What: /sys/.../events/in_anglvel_x_roc_rising_period
+What: /sys/.../events/in_anglvel_x_roc_falling_period
+What: /sys/.../events/in_anglvel_y_thresh_rising_period
+What: /sys/.../events/in_anglvel_y_thresh_falling_period
+What: /sys/.../events/in_anglvel_y_roc_rising_period
+What: /sys/.../events/in_anglvel_y_roc_falling_period
+What: /sys/.../events/in_anglvel_z_thresh_rising_period
+What: /sys/.../events/in_anglvel_z_thresh_falling_period
+What: /sys/.../events/in_anglvel_z_roc_rising_period
+What: /sys/.../events/in_anglvel_z_roc_falling_period
+What: /sys/.../events/in_magn_x_thresh_rising_period
+What: /sys/.../events/in_magn_x_thresh_falling_period
+What: /sys/.../events/in_magn_x_roc_rising_period
+What: /sys/.../events/in_magn_x_roc_falling_period
+What: /sys/.../events/in_magn_y_thresh_rising_period
+What: /sys/.../events/in_magn_y_thresh_falling_period
+What: /sys/.../events/in_magn_y_roc_rising_period
+What: /sys/.../events/in_magn_y_roc_falling_period
+What: /sys/.../events/in_magn_z_thresh_rising_period
+What: /sys/.../events/in_magn_z_thresh_falling_period
+What: /sys/.../events/in_magn_z_roc_rising_period
+What: /sys/.../events/in_magn_z_roc_falling_period
+What: /sys/.../events/in_voltageY_supply_thresh_rising_period
+What: /sys/.../events/in_voltageY_supply_thresh_falling_period
+What: /sys/.../events/in_voltageY_supply_roc_rising_period
+What: /sys/.../events/in_voltageY_supply_roc_falling_period
+What: /sys/.../events/in_voltageY_thresh_rising_period
+What: /sys/.../events/in_voltageY_thresh_falling_period
+What: /sys/.../events/in_voltageY_roc_rising_period
+What: /sys/.../events/in_voltageY_roc_falling_period
+What: /sys/.../events/in_tempY_thresh_rising_period
+What: /sys/.../events/in_tempY_thresh_falling_period
+What: /sys/.../events/in_tempY_roc_rising_period
+What: /sys/.../events/in_tempY_roc_falling_period
+What: /sys/.../events/in_accel_x&y&z_mag_falling_period
+What: /sys/.../events/in_intensity0_thresh_period
+What: /sys/.../events/in_proximity0_thresh_period
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Period of time (in seconds) for which the condition must be
+ met before an event is generated. If direction is not
+ specified then this period applies to both directions.
+
+What: /sys/.../iio:deviceX/events/in_accel_mag_en
+What: /sys/.../iio:deviceX/events/in_accel_mag_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_mag_falling_en
+What: /sys/.../iio:deviceX/events/in_accel_x_mag_en
+What: /sys/.../iio:deviceX/events/in_accel_x_mag_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_x_mag_falling_en
+What: /sys/.../iio:deviceX/events/in_accel_y_mag_en
+What: /sys/.../iio:deviceX/events/in_accel_y_mag_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_y_mag_falling_en
+What: /sys/.../iio:deviceX/events/in_accel_z_mag_en
+What: /sys/.../iio:deviceX/events/in_accel_z_mag_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_z_mag_falling_en
+What: /sys/.../iio:deviceX/events/in_accel_x&y&z_mag_rising_en
+What: /sys/.../iio:deviceX/events/in_accel_x&y&z_mag_falling_en
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Similar to in_accel_x_thresh[_rising|_falling]_en, but here the
+ magnitude of the channel is compared to the threshold, not its
+ signed value.
+
+What: /sys/.../events/in_accel_raw_mag_value
+What: /sys/.../events/in_accel_x_raw_mag_rising_value
+What: /sys/.../events/in_accel_y_raw_mag_rising_value
+What: /sys/.../events/in_accel_z_raw_mag_rising_value
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ The value to which the magnitude of the channel is compared. If
+ number or direction is not specified, applies to all channels of
+ this type.
+
+What: /sys/bus/iio/devices/iio:deviceX/trigger/current_trigger
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ The name of the trigger source being used, as per string given
+ in /sys/class/iio/triggerY/name.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/length
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Number of scans contained by the buffer.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/bytes_per_datum
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Bytes per scan. Due to alignment fun, the scan may be larger
+ than implied directly by the scan_element parameters.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/enable
+KernelVersion: 2.6.35
+Contact: linux-iio@vger.kernel.org
+Description:
+ Actually start the buffer capture up. Will start trigger
+ if first device and appropriate.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/scan_elements
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Directory containing interfaces for elements that will be
+ captured for a single triggered sample set in the buffer.
+
+What: /sys/.../buffer/scan_elements/in_accel_x_en
+What: /sys/.../buffer/scan_elements/in_accel_y_en
+What: /sys/.../buffer/scan_elements/in_accel_z_en
+What: /sys/.../buffer/scan_elements/in_anglvel_x_en
+What: /sys/.../buffer/scan_elements/in_anglvel_y_en
+What: /sys/.../buffer/scan_elements/in_anglvel_z_en
+What: /sys/.../buffer/scan_elements/in_magn_x_en
+What: /sys/.../buffer/scan_elements/in_magn_y_en
+What: /sys/.../buffer/scan_elements/in_magn_z_en
+What: /sys/.../buffer/scan_elements/in_timestamp_en
+What: /sys/.../buffer/scan_elements/in_voltageY_supply_en
+What: /sys/.../buffer/scan_elements/in_voltageY_en
+What: /sys/.../buffer/scan_elements/in_voltageY-voltageZ_en
+What: /sys/.../buffer/scan_elements/in_incli_x_en
+What: /sys/.../buffer/scan_elements/in_incli_y_en
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Scan element control for triggered data capture.
+
+What: /sys/.../buffer/scan_elements/in_accel_type
+What: /sys/.../buffer/scan_elements/in_anglvel_type
+What: /sys/.../buffer/scan_elements/in_magn_type
+What: /sys/.../buffer/scan_elements/in_incli_type
+What: /sys/.../buffer/scan_elements/in_voltageY_type
+What: /sys/.../buffer/scan_elements/in_voltage-in_type
+What: /sys/.../buffer/scan_elements/in_voltageY_supply_type
+What: /sys/.../buffer/scan_elements/in_timestamp_type
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ Description of the scan element data storage within the buffer
+ and hence the form in which it is read from user-space.
+ Form is [be|le]:[s|u]bits/storagebits[>>shift].
+ be or le specifies big or little endian. s or u specifies if
+ signed (2's complement) or unsigned. bits is the number of bits
+ of data and storagebits is the space (after padding) that it
+ occupies in the buffer. shift if specified, is the shift that
+ needs to be applied prior to masking out unused bits. Some
+ devices put their data in the middle of the transferred elements
+ with additional information on both sides. Note that some
+ devices will have additional information in the unused bits
+ so to get a clean value, the bits value must be used to mask
+ the buffer output value appropriately. The storagebits value
+ also specifies the data alignment. So s48/64>>2 will be a
+ signed 48 bit integer stored in a 64 bit location aligned to
+ a a64 bit boundary. To obtain the clean value, shift right 2
+ and apply a mask to zero the top 16 bits of the result.
+ For other storage combinations this attribute will be extended
+ appropriately.
+
+What: /sys/.../buffer/scan_elements/in_accel_type_available
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ If the type parameter can take one of a small set of values,
+ this attribute lists them.
+
+What: /sys/.../buffer/scan_elements/in_voltageY_index
+What: /sys/.../buffer/scan_elements/in_voltageY_supply_index
+What: /sys/.../buffer/scan_elements/in_accel_x_index
+What: /sys/.../buffer/scan_elements/in_accel_y_index
+What: /sys/.../buffer/scan_elements/in_accel_z_index
+What: /sys/.../buffer/scan_elements/in_anglvel_x_index
+What: /sys/.../buffer/scan_elements/in_anglvel_y_index
+What: /sys/.../buffer/scan_elements/in_anglvel_z_index
+What: /sys/.../buffer/scan_elements/in_magn_x_index
+What: /sys/.../buffer/scan_elements/in_magn_y_index
+What: /sys/.../buffer/scan_elements/in_magn_z_index
+What: /sys/.../buffer/scan_elements/in_incli_x_index
+What: /sys/.../buffer/scan_elements/in_incli_y_index
+What: /sys/.../buffer/scan_elements/in_timestamp_index
+KernelVersion: 2.6.37
+Contact: linux-iio@vger.kernel.org
+Description:
+ A single positive integer specifying the position of this
+ scan element in the buffer. Note these are not dependent on
+ what is enabled and may not be contiguous. Thus for user-space
+ to establish the full layout these must be used in conjunction
+ with all _en attributes to establish which channels are present,
+ and the relevant _type attributes to establish the data storage
+ format.
+
+What: /sys/.../iio:deviceX/in_anglvel_z_quadrature_correction_raw
+KernelVersion: 2.6.38
+Contact: linux-iio@vger.kernel.org
+Description:
+ This attribute is used to read the amount of quadrature error
+ present in the device at a given time.
diff --git a/Documentation/ABI/testing/sysfs-bus-rbd b/Documentation/ABI/testing/sysfs-bus-rbd
index dbedafb095e2..bcd88eb7ebcd 100644
--- a/Documentation/ABI/testing/sysfs-bus-rbd
+++ b/Documentation/ABI/testing/sysfs-bus-rbd
@@ -65,11 +65,11 @@ snap_*
Entries under /sys/bus/rbd/devices/<dev-id>/snap_<snap-name>
-------------------------------------------------------------
-id
+snap_id
The rados internal snapshot id assigned for this snapshot
-size
+snap_size
The size of the image when this snapshot was taken.
diff --git a/Documentation/ABI/testing/sysfs-bus-usb b/Documentation/ABI/testing/sysfs-bus-usb
index 7c22a532fdfb..6df4e6f57560 100644
--- a/Documentation/ABI/testing/sysfs-bus-usb
+++ b/Documentation/ABI/testing/sysfs-bus-usb
@@ -135,6 +135,17 @@ Description:
for the device and attempt to bind to it. For example:
# echo "8086 10f5" > /sys/bus/usb/drivers/foo/new_id
+ Reading from this file will list all dynamically added
+ device IDs in the same format, with one entry per
+ line. For example:
+ # cat /sys/bus/usb/drivers/foo/new_id
+ 8086 10f5
+ dead beef 06
+ f00d cafe
+
+ The list will be truncated at PAGE_SIZE bytes due to
+ sysfs restrictions.
+
What: /sys/bus/usb-serial/drivers/.../new_id
Date: October 2011
Contact: linux-usb@vger.kernel.org
@@ -157,6 +168,10 @@ Description:
match the driver to the device. For example:
# echo "046d c315" > /sys/bus/usb/drivers/foo/remove_id
+ Reading from this file will list the dynamically added
+ device IDs, exactly like reading from the entry
+ "/sys/bus/usb/drivers/.../new_id"
+
What: /sys/bus/usb/device/.../avoid_reset_quirk
Date: December 2009
Contact: Oliver Neukum <oliver@neukum.org>
@@ -189,7 +204,7 @@ Contact: Matthew Garrett <mjg@redhat.com>
Description:
Some information about whether a given USB device is
physically fixed to the platform can be inferred from a
- combination of hub decriptor bits and platform-specific data
+ combination of hub descriptor bits and platform-specific data
such as ACPI. This file will read either "removable" or
"fixed" if the information is available, and "unknown"
- otherwise. \ No newline at end of file
+ otherwise.
diff --git a/Documentation/ABI/testing/sysfs-cfq-target-latency b/Documentation/ABI/testing/sysfs-cfq-target-latency
new file mode 100644
index 000000000000..df0f7828c5e3
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-cfq-target-latency
@@ -0,0 +1,8 @@
+What: /sys/block/<device>/iosched/target_latency
+Date: March 2012
+contact: Tao Ma <boyu.mt@taobao.com>
+Description:
+ The /sys/block/<device>/iosched/target_latency only exists
+ when the user sets cfq to /sys/block/<device>/scheduler.
+ It contains an estimated latency time for the cfq. cfq will
+ use it to calculate the time slice used for every task.
diff --git a/Documentation/ABI/testing/sysfs-class-backlight-driver-lm3533 b/Documentation/ABI/testing/sysfs-class-backlight-driver-lm3533
new file mode 100644
index 000000000000..77cf7ac949af
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-backlight-driver-lm3533
@@ -0,0 +1,48 @@
+What: /sys/class/backlight/<backlight>/als_channel
+Date: May 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Get the ALS output channel used as input in
+ ALS-current-control mode (0, 1), where
+
+ 0 - out_current0 (backlight 0)
+ 1 - out_current1 (backlight 1)
+
+What: /sys/class/backlight/<backlight>/als_en
+Date: May 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Enable ALS-current-control mode (0, 1).
+
+What: /sys/class/backlight/<backlight>/id
+Date: April 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Get the id of this backlight (0, 1).
+
+What: /sys/class/backlight/<backlight>/linear
+Date: April 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Set the brightness-mapping mode (0, 1), where
+
+ 0 - exponential mode
+ 1 - linear mode
+
+What: /sys/class/backlight/<backlight>/pwm
+Date: April 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Set the PWM-input control mask (5 bits), where
+
+ bit 5 - PWM-input enabled in Zone 4
+ bit 4 - PWM-input enabled in Zone 3
+ bit 3 - PWM-input enabled in Zone 2
+ bit 2 - PWM-input enabled in Zone 1
+ bit 1 - PWM-input enabled in Zone 0
+ bit 0 - PWM-input enabled
diff --git a/Documentation/ABI/testing/sysfs-class-extcon b/Documentation/ABI/testing/sysfs-class-extcon
new file mode 100644
index 000000000000..20ab361bd8c6
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-extcon
@@ -0,0 +1,97 @@
+What: /sys/class/extcon/.../
+Date: February 2012
+Contact: MyungJoo Ham <myungjoo.ham@samsung.com>
+Description:
+ Provide a place in sysfs for the extcon objects.
+ This allows accessing extcon specific variables.
+ The name of extcon object denoted as ... is the name given
+ with extcon_dev_register.
+
+ One extcon device denotes a single external connector
+ port. An external connector may have multiple cables
+ attached simultaneously. Many of docks, cradles, and
+ accessory cables have such capability. For example,
+ the 30-pin port of Nuri board (/arch/arm/mach-exynos)
+ may have both HDMI and Charger attached, or analog audio,
+ video, and USB cables attached simulteneously.
+
+ If there are cables mutually exclusive with each other,
+ such binary relations may be expressed with extcon_dev's
+ mutually_exclusive array.
+
+What: /sys/class/extcon/.../name
+Date: February 2012
+Contact: MyungJoo Ham <myungjoo.ham@samsung.com>
+Description:
+ The /sys/class/extcon/.../name shows the name of the extcon
+ object. If the extcon object has an optional callback
+ "show_name" defined, the callback will provide the name with
+ this sysfs node.
+
+What: /sys/class/extcon/.../state
+Date: February 2012
+Contact: MyungJoo Ham <myungjoo.ham@samsung.com>
+Description:
+ The /sys/class/extcon/.../state shows and stores the cable
+ attach/detach information of the corresponding extcon object.
+ If the extcon object has an optional callback "show_state"
+ defined, the showing function is overriden with the optional
+ callback.
+
+ If the default callback for showing function is used, the
+ format is like this:
+ # cat state
+ USB_OTG=1
+ HDMI=0
+ TA=1
+ EAR_JACK=0
+ #
+ In this example, the extcon device have USB_OTG and TA
+ cables attached and HDMI and EAR_JACK cables detached.
+
+ In order to update the state of an extcon device, enter a hex
+ state number starting with 0x.
+ echo 0xHEX > state
+
+ This updates the whole state of the extcon dev.
+ Inputs of all the methods are required to meet the
+ mutually_exclusive contidions if they exist.
+
+ It is recommended to use this "global" state interface if
+ you need to enter the value atomically. The later state
+ interface associated with each cable cannot update
+ multiple cable states of an extcon device simultaneously.
+
+What: /sys/class/extcon/.../cable.x/name
+Date: February 2012
+Contact: MyungJoo Ham <myungjoo.ham@samsung.com>
+Description:
+ The /sys/class/extcon/.../cable.x/name shows the name of cable
+ "x" (integer between 0 and 31) of an extcon device.
+
+What: /sys/class/extcon/.../cable.x/state
+Date: February 2012
+Contact: MyungJoo Ham <myungjoo.ham@samsung.com>
+Description:
+ The /sys/class/extcon/.../cable.x/name shows and stores the
+ state of cable "x" (integer between 0 and 31) of an extcon
+ device. The state value is either 0 (detached) or 1
+ (attached).
+
+What: /sys/class/extcon/.../mutually_exclusive/...
+Date: December 2011
+Contact: MyungJoo Ham <myungjoo.ham@samsung.com>
+Description:
+ Shows the relations of mutually exclusiveness. For example,
+ if the mutually_exclusive array of extcon_dev is
+ {0x3, 0x5, 0xC, 0x0}, the, the output is:
+ # ls mutually_exclusive/
+ 0x3
+ 0x5
+ 0xc
+ #
+
+ Note that mutually_exclusive is a sub-directory of the extcon
+ device and the file names under the mutually_exclusive
+ directory show the mutually-exclusive sets, not the contents
+ of the files.
diff --git a/Documentation/ABI/testing/sysfs-class-led-driver-lm3533 b/Documentation/ABI/testing/sysfs-class-led-driver-lm3533
new file mode 100644
index 000000000000..620ebb3b9baa
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-led-driver-lm3533
@@ -0,0 +1,65 @@
+What: /sys/class/leds/<led>/als_channel
+Date: May 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Set the ALS output channel to use as input in
+ ALS-current-control mode (1, 2), where
+
+ 1 - out_current1
+ 2 - out_current2
+
+What: /sys/class/leds/<led>/als_en
+Date: May 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Enable ALS-current-control mode (0, 1).
+
+What: /sys/class/leds/<led>/falltime
+What: /sys/class/leds/<led>/risetime
+Date: April 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Set the pattern generator fall and rise times (0..7), where
+
+ 0 - 2048 us
+ 1 - 262 ms
+ 2 - 524 ms
+ 3 - 1.049 s
+ 4 - 2.097 s
+ 5 - 4.194 s
+ 6 - 8.389 s
+ 7 - 16.78 s
+
+What: /sys/class/leds/<led>/id
+Date: April 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Get the id of this led (0..3).
+
+What: /sys/class/leds/<led>/linear
+Date: April 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Set the brightness-mapping mode (0, 1), where
+
+ 0 - exponential mode
+ 1 - linear mode
+
+What: /sys/class/leds/<led>/pwm
+Date: April 2012
+KernelVersion: 3.5
+Contact: Johan Hovold <jhovold@gmail.com>
+Description:
+ Set the PWM-input control mask (5 bits), where
+
+ bit 5 - PWM-input enabled in Zone 4
+ bit 4 - PWM-input enabled in Zone 3
+ bit 3 - PWM-input enabled in Zone 2
+ bit 2 - PWM-input enabled in Zone 1
+ bit 1 - PWM-input enabled in Zone 0
+ bit 0 - PWM-input enabled
diff --git a/Documentation/ABI/testing/sysfs-class-net-mesh b/Documentation/ABI/testing/sysfs-class-net-mesh
index b218e0f8bdb3..c81fe89c4c46 100644
--- a/Documentation/ABI/testing/sysfs-class-net-mesh
+++ b/Documentation/ABI/testing/sysfs-class-net-mesh
@@ -14,6 +14,15 @@ Description:
mesh will be sent using multiple interfaces at the
same time (if available).
+What: /sys/class/net/<mesh_iface>/mesh/bridge_loop_avoidance
+Date: November 2011
+Contact: Simon Wunderlich <siwu@hrz.tu-chemnitz.de>
+Description:
+ Indicates whether the bridge loop avoidance feature
+ is enabled. This feature detects and avoids loops
+ between the mesh and devices bridged with the soft
+ interface <mesh_iface>.
+
What: /sys/class/net/<mesh_iface>/mesh/fragmentation
Date: October 2010
Contact: Andreas Langer <an.langer@gmx.de>
diff --git a/Documentation/ABI/testing/sysfs-devices-power b/Documentation/ABI/testing/sysfs-devices-power
index 840f7d64d483..45000f0db4d4 100644
--- a/Documentation/ABI/testing/sysfs-devices-power
+++ b/Documentation/ABI/testing/sysfs-devices-power
@@ -96,16 +96,26 @@ Description:
is read-only. If the device is not enabled to wake up the
system from sleep states, this attribute is not present.
-What: /sys/devices/.../power/wakeup_hit_count
-Date: September 2010
+What: /sys/devices/.../power/wakeup_abort_count
+Date: February 2012
Contact: Rafael J. Wysocki <rjw@sisk.pl>
Description:
- The /sys/devices/.../wakeup_hit_count attribute contains the
+ The /sys/devices/.../wakeup_abort_count attribute contains the
number of times the processing of a wakeup event associated with
- the device might prevent the system from entering a sleep state.
- This attribute is read-only. If the device is not enabled to
- wake up the system from sleep states, this attribute is not
- present.
+ the device might have aborted system transition into a sleep
+ state in progress. This attribute is read-only. If the device
+ is not enabled to wake up the system from sleep states, this
+ attribute is not present.
+
+What: /sys/devices/.../power/wakeup_expire_count
+Date: February 2012
+Contact: Rafael J. Wysocki <rjw@sisk.pl>
+Description:
+ The /sys/devices/.../wakeup_expire_count attribute contains the
+ number of times a wakeup event associated with the device has
+ been reported with a timeout that expired. This attribute is
+ read-only. If the device is not enabled to wake up the system
+ from sleep states, this attribute is not present.
What: /sys/devices/.../power/wakeup_active
Date: September 2010
@@ -148,6 +158,17 @@ Description:
not enabled to wake up the system from sleep states, this
attribute is not present.
+What: /sys/devices/.../power/wakeup_prevent_sleep_time_ms
+Date: February 2012
+Contact: Rafael J. Wysocki <rjw@sisk.pl>
+Description:
+ The /sys/devices/.../wakeup_prevent_sleep_time_ms attribute
+ contains the total time the device has been preventing
+ opportunistic transitions to sleep states from occuring.
+ This attribute is read-only. If the device is not enabled to
+ wake up the system from sleep states, this attribute is not
+ present.
+
What: /sys/devices/.../power/autosuspend_delay_ms
Date: September 2010
Contact: Alan Stern <stern@rowland.harvard.edu>
diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
index e7be75b96e4b..5dab36448b44 100644
--- a/Documentation/ABI/testing/sysfs-devices-system-cpu
+++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
@@ -9,31 +9,6 @@ Description:
/sys/devices/system/cpu/cpu#/
-What: /sys/devices/system/cpu/sched_mc_power_savings
- /sys/devices/system/cpu/sched_smt_power_savings
-Date: June 2006
-Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
-Description: Discover and adjust the kernel's multi-core scheduler support.
-
- Possible values are:
-
- 0 - No power saving load balance (default value)
- 1 - Fill one thread/core/package first for long running threads
- 2 - Also bias task wakeups to semi-idle cpu package for power
- savings
-
- sched_mc_power_savings is dependent upon SCHED_MC, which is
- itself architecture dependent.
-
- sched_smt_power_savings is dependent upon SCHED_SMT, which
- is itself architecture dependent.
-
- The two files are independent of each other. It is possible
- that one file may be present without the other.
-
- Introduced by git commit 5c45bf27.
-
-
What: /sys/devices/system/cpu/kernel_max
/sys/devices/system/cpu/offline
/sys/devices/system/cpu/online
diff --git a/Documentation/ABI/testing/sysfs-driver-wacom b/Documentation/ABI/testing/sysfs-driver-wacom
index 0130d6683c14..8d55a83d6921 100644
--- a/Documentation/ABI/testing/sysfs-driver-wacom
+++ b/Documentation/ABI/testing/sysfs-driver-wacom
@@ -9,15 +9,24 @@ Description:
or 0 otherwise. Writing to this file one of these values
switches reporting speed.
+What: /sys/class/leds/0005\:056A\:00BD.0001\:selector\:*/
+Date: May 2012
+Kernel Version: 3.5
+Contact: linux-bluetooth@vger.kernel.org
+Description:
+ LED selector for Intuos4 WL. There are 4 leds, but only one LED
+ can be lit at a time. Max brightness is 127.
+
What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/led
Date: August 2011
Contact: linux-input@vger.kernel.org
Description:
Attribute group for control of the status LEDs and the OLEDs.
This attribute group is only available for Intuos 4 M, L,
- and XL (with LEDs and OLEDs) and Cintiq 21UX2 and Cintiq 24HD
- (LEDs only). Therefore its presence implicitly signifies the
- presence of said LEDs and OLEDs on the tablet device.
+ and XL (with LEDs and OLEDs), Intuos 5 (LEDs only), and Cintiq
+ 21UX2 and Cintiq 24HD (LEDs only). Therefore its presence
+ implicitly signifies the presence of said LEDs and OLEDs on the
+ tablet device.
What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status0_luminance
Date: August 2011
@@ -40,10 +49,10 @@ What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led0
Date: August 2011
Contact: linux-input@vger.kernel.org
Description:
- Writing to this file sets which one of the four (for Intuos 4)
- or of the right four (for Cintiq 21UX2 and Cintiq 24HD) status
- LEDs is active (0..3). The other three LEDs on the same side are
- always inactive.
+ Writing to this file sets which one of the four (for Intuos 4
+ and Intuos 5) or of the right four (for Cintiq 21UX2 and Cintiq
+ 24HD) status LEDs is active (0..3). The other three LEDs on the
+ same side are always inactive.
What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led1_select
Date: September 2011
diff --git a/Documentation/ABI/testing/sysfs-power b/Documentation/ABI/testing/sysfs-power
index b464d12761ba..31725ffeeb3a 100644
--- a/Documentation/ABI/testing/sysfs-power
+++ b/Documentation/ABI/testing/sysfs-power
@@ -172,3 +172,62 @@ Description:
Reading from this file will display the current value, which is
set to 1 MB by default.
+
+What: /sys/power/autosleep
+Date: April 2012
+Contact: Rafael J. Wysocki <rjw@sisk.pl>
+Description:
+ The /sys/power/autosleep file can be written one of the strings
+ returned by reads from /sys/power/state. If that happens, a
+ work item attempting to trigger a transition of the system to
+ the sleep state represented by that string is queued up. This
+ attempt will only succeed if there are no active wakeup sources
+ in the system at that time. After every execution, regardless
+ of whether or not the attempt to put the system to sleep has
+ succeeded, the work item requeues itself until user space
+ writes "off" to /sys/power/autosleep.
+
+ Reading from this file causes the last string successfully
+ written to it to be returned.
+
+What: /sys/power/wake_lock
+Date: February 2012
+Contact: Rafael J. Wysocki <rjw@sisk.pl>
+Description:
+ The /sys/power/wake_lock file allows user space to create
+ wakeup source objects and activate them on demand (if one of
+ those wakeup sources is active, reads from the
+ /sys/power/wakeup_count file block or return false). When a
+ string without white space is written to /sys/power/wake_lock,
+ it will be assumed to represent a wakeup source name. If there
+ is a wakeup source object with that name, it will be activated
+ (unless active already). Otherwise, a new wakeup source object
+ will be registered, assigned the given name and activated.
+ If a string written to /sys/power/wake_lock contains white
+ space, the part of the string preceding the white space will be
+ regarded as a wakeup source name and handled as descrived above.
+ The other part of the string will be regarded as a timeout (in
+ nanoseconds) such that the wakeup source will be automatically
+ deactivated after it has expired. The timeout, if present, is
+ set regardless of the current state of the wakeup source object
+ in question.
+
+ Reads from this file return a string consisting of the names of
+ wakeup sources created with the help of it that are active at
+ the moment, separated with spaces.
+
+
+What: /sys/power/wake_unlock
+Date: February 2012
+Contact: Rafael J. Wysocki <rjw@sisk.pl>
+Description:
+ The /sys/power/wake_unlock file allows user space to deactivate
+ wakeup sources created with the help of /sys/power/wake_lock.
+ When a string is written to /sys/power/wake_unlock, it will be
+ assumed to represent the name of a wakeup source to deactivate.
+ If a wakeup source object of that name exists and is active at
+ the moment, it will be deactivated.
+
+ Reads from this file return a string consisting of the names of
+ wakeup sources created with the help of /sys/power/wake_lock
+ that are inactive at the moment, separated with spaces.
diff --git a/Documentation/CodingStyle b/Documentation/CodingStyle
index c58b236bbe04..cb9258b8fd35 100644
--- a/Documentation/CodingStyle
+++ b/Documentation/CodingStyle
@@ -671,8 +671,9 @@ ones already enabled by DEBUG.
Chapter 14: Allocating memory
The kernel provides the following general purpose memory allocators:
-kmalloc(), kzalloc(), kcalloc(), vmalloc(), and vzalloc(). Please refer to
-the API documentation for further information about them.
+kmalloc(), kzalloc(), kmalloc_array(), kcalloc(), vmalloc(), and
+vzalloc(). Please refer to the API documentation for further information
+about them.
The preferred form for passing a size of a struct is the following:
@@ -686,6 +687,17 @@ Casting the return value which is a void pointer is redundant. The conversion
from void pointer to any other pointer type is guaranteed by the C programming
language.
+The preferred form for allocating an array is the following:
+
+ p = kmalloc_array(n, sizeof(...), ...);
+
+The preferred form for allocating a zeroed array is the following:
+
+ p = kcalloc(n, sizeof(...), ...);
+
+Both forms check for overflow on the allocation size n * sizeof(...),
+and return NULL if that occurred.
+
Chapter 15: The inline disease
diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
index b768cc0e402b..5c72eed89563 100644
--- a/Documentation/DMA-attributes.txt
+++ b/Documentation/DMA-attributes.txt
@@ -31,3 +31,21 @@ may be weakly ordered, that is that reads and writes may pass each other.
Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
those that do not will simply ignore the attribute and exhibit default
behavior.
+
+DMA_ATTR_WRITE_COMBINE
+----------------------
+
+DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
+buffered to improve performance.
+
+Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
+those that do not will simply ignore the attribute and exhibit default
+behavior.
+
+DMA_ATTR_NON_CONSISTENT
+-----------------------
+
+DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either
+consistent or non-consistent memory as it sees fit. By using this API,
+you are guaranteeing to the platform that you have all the correct and
+necessary sync points for this memory in the driver.
diff --git a/Documentation/DocBook/80211.tmpl b/Documentation/DocBook/80211.tmpl
index c5ac6929c41c..f3e214f9e256 100644
--- a/Documentation/DocBook/80211.tmpl
+++ b/Documentation/DocBook/80211.tmpl
@@ -516,7 +516,7 @@
!Finclude/net/mac80211.h ieee80211_start_tx_ba_cb_irqsafe
!Finclude/net/mac80211.h ieee80211_stop_tx_ba_session
!Finclude/net/mac80211.h ieee80211_stop_tx_ba_cb_irqsafe
-!Finclude/net/mac80211.h rate_control_changed
+!Finclude/net/mac80211.h ieee80211_rate_control_changed
!Finclude/net/mac80211.h ieee80211_tx_rate_control
!Finclude/net/mac80211.h rate_control_send_low
</chapter>
diff --git a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile
index 66725a3d30dc..bc3d9f8c0a90 100644
--- a/Documentation/DocBook/Makefile
+++ b/Documentation/DocBook/Makefile
@@ -6,7 +6,7 @@
# To add a new book the only step required is to add the book to the
# list of DOCBOOKS.
-DOCBOOKS := z8530book.xml mcabook.xml device-drivers.xml \
+DOCBOOKS := z8530book.xml device-drivers.xml \
kernel-hacking.xml kernel-locking.xml deviceiobook.xml \
writing_usb_driver.xml networking.xml \
kernel-api.xml filesystems.xml lsm.xml usb.xml kgdb.xml \
diff --git a/Documentation/DocBook/device-drivers.tmpl b/Documentation/DocBook/device-drivers.tmpl
index 9c27e5125dd2..7514dbf0a679 100644
--- a/Documentation/DocBook/device-drivers.tmpl
+++ b/Documentation/DocBook/device-drivers.tmpl
@@ -446,4 +446,21 @@ X!Idrivers/video/console/fonts.c
!Edrivers/i2c/i2c-core.c
</chapter>
+ <chapter id="hsi">
+ <title>High Speed Synchronous Serial Interface (HSI)</title>
+
+ <para>
+ High Speed Synchronous Serial Interface (HSI) is a
+ serial interface mainly used for connecting application
+ engines (APE) with cellular modem engines (CMT) in cellular
+ handsets.
+
+ HSI provides multiplexing for up to 16 logical channels,
+ low-latency and full duplex communication.
+ </para>
+
+!Iinclude/linux/hsi/hsi.h
+!Edrivers/hsi/hsi.c
+ </chapter>
+
</book>
diff --git a/Documentation/DocBook/kernel-api.tmpl b/Documentation/DocBook/kernel-api.tmpl
index 7160652a8736..00687ee9d363 100644
--- a/Documentation/DocBook/kernel-api.tmpl
+++ b/Documentation/DocBook/kernel-api.tmpl
@@ -212,19 +212,6 @@ X!Edrivers/pci/hotplug.c
<sect1><title>PCI Hotplug Support Library</title>
!Edrivers/pci/hotplug/pci_hotplug_core.c
</sect1>
- <sect1><title>MCA Architecture</title>
- <sect2><title>MCA Device Functions</title>
- <para>
- Refer to the file arch/x86/kernel/mca_32.c for more information.
- </para>
-<!-- FIXME: Removed for now since no structured comments in source
-X!Earch/x86/kernel/mca_32.c
--->
- </sect2>
- <sect2><title>MCA Bus DMA</title>
-!Iarch/x86/include/asm/mca_dma.h
- </sect2>
- </sect1>
</chapter>
<chapter id="firmware">
diff --git a/Documentation/DocBook/kernel-hacking.tmpl b/Documentation/DocBook/kernel-hacking.tmpl
index 07a9c48de5a2..eee71426ecb8 100644
--- a/Documentation/DocBook/kernel-hacking.tmpl
+++ b/Documentation/DocBook/kernel-hacking.tmpl
@@ -1289,7 +1289,7 @@ static struct block_device_operations opt_fops = {
* Sparc assembly will do this to ya.
*/
C_LABEL(cputypvar):
- .asciz "compatability"
+ .asciz "compatibility"
/* Tested on SS-5, SS-10. Probably someone at Sun applied a spell-checker. */
.align 4
diff --git a/Documentation/DocBook/libata.tmpl b/Documentation/DocBook/libata.tmpl
index 31df1aa00710..deb71baed328 100644
--- a/Documentation/DocBook/libata.tmpl
+++ b/Documentation/DocBook/libata.tmpl
@@ -918,7 +918,7 @@ and other resources, etc.
<title>HSM violation</title>
<para>
This error is indicated when STATUS value doesn't match HSM
- requirement during issuing or excution any ATA/ATAPI command.
+ requirement during issuing or execution any ATA/ATAPI command.
</para>
<itemizedlist>
diff --git a/Documentation/DocBook/mcabook.tmpl b/Documentation/DocBook/mcabook.tmpl
deleted file mode 100644
index 467ccac6ec50..000000000000
--- a/Documentation/DocBook/mcabook.tmpl
+++ /dev/null
@@ -1,107 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
- "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
-
-<book id="MCAGuide">
- <bookinfo>
- <title>MCA Driver Programming Interface</title>
-
- <authorgroup>
- <author>
- <firstname>Alan</firstname>
- <surname>Cox</surname>
- <affiliation>
- <address>
- <email>alan@lxorguk.ukuu.org.uk</email>
- </address>
- </affiliation>
- </author>
- <author>
- <firstname>David</firstname>
- <surname>Weinehall</surname>
- </author>
- <author>
- <firstname>Chris</firstname>
- <surname>Beauregard</surname>
- </author>
- </authorgroup>
-
- <copyright>
- <year>2000</year>
- <holder>Alan Cox</holder>
- <holder>David Weinehall</holder>
- <holder>Chris Beauregard</holder>
- </copyright>
-
- <legalnotice>
- <para>
- This documentation is free software; you can redistribute
- it and/or modify it under the terms of the GNU General Public
- License as published by the Free Software Foundation; either
- version 2 of the License, or (at your option) any later
- version.
- </para>
-
- <para>
- This program is distributed in the hope that it will be
- useful, but WITHOUT ANY WARRANTY; without even the implied
- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- See the GNU General Public License for more details.
- </para>
-
- <para>
- You should have received a copy of the GNU General Public
- License along with this program; if not, write to the Free
- Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- </para>
-
- <para>
- For more details see the file COPYING in the source
- distribution of Linux.
- </para>
- </legalnotice>
- </bookinfo>
-
-<toc></toc>
-
- <chapter id="intro">
- <title>Introduction</title>
- <para>
- The MCA bus functions provide a generalised interface to find MCA
- bus cards, to claim them for a driver, and to read and manipulate POS
- registers without being aware of the motherboard internals or
- certain deep magic specific to onboard devices.
- </para>
- <para>
- The basic interface to the MCA bus devices is the slot. Each slot
- is numbered and virtual slot numbers are assigned to the internal
- devices. Using a pci_dev as other busses do does not really make
- sense in the MCA context as the MCA bus resources require card
- specific interpretation.
- </para>
- <para>
- Finally the MCA bus functions provide a parallel set of DMA
- functions mimicing the ISA bus DMA functions as closely as possible,
- although also supporting the additional DMA functionality on the
- MCA bus controllers.
- </para>
- </chapter>
- <chapter id="bugs">
- <title>Known Bugs And Assumptions</title>
- <para>
- None.
- </para>
- </chapter>
-
- <chapter id="pubfunctions">
- <title>Public Functions Provided</title>
-!Edrivers/mca/mca-legacy.c
- </chapter>
-
- <chapter id="dmafunctions">
- <title>DMA Functions Provided</title>
-!Iarch/x86/include/asm/mca_dma.h
- </chapter>
-
-</book>
diff --git a/Documentation/DocBook/media/Makefile b/Documentation/DocBook/media/Makefile
index 6628b4b9cac4..362520992ced 100644
--- a/Documentation/DocBook/media/Makefile
+++ b/Documentation/DocBook/media/Makefile
@@ -70,6 +70,8 @@ IOCTLS = \
VIDIOC_SUBDEV_ENUM_MBUS_CODE \
VIDIOC_SUBDEV_ENUM_FRAME_SIZE \
VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \
+ VIDIOC_SUBDEV_G_SELECTION \
+ VIDIOC_SUBDEV_S_SELECTION \
TYPES = \
$(shell perl -ne 'print "$$1 " if /^typedef\s+[^\s]+\s+([^\s]+)\;/' $(srctree)/include/linux/videodev2.h) \
@@ -193,7 +195,7 @@ DVB_DOCUMENTED = \
#
install_media_images = \
- $(Q)cp $(OBJIMGFILES) $(MEDIA_OBJ_DIR)/media_api
+ $(Q)cp $(OBJIMGFILES) $(MEDIA_SRC_DIR)/v4l/*.svg $(MEDIA_OBJ_DIR)/media_api
$(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64
$(Q)base64 -d $< >$@
diff --git a/Documentation/DocBook/media/dvb/dvbproperty.xml b/Documentation/DocBook/media/dvb/dvbproperty.xml
index c7a4ca517859..e633c097a8d1 100644
--- a/Documentation/DocBook/media/dvb/dvbproperty.xml
+++ b/Documentation/DocBook/media/dvb/dvbproperty.xml
@@ -531,6 +531,139 @@ typedef enum fe_delivery_system {
here are referring to what can be found in the TMCC-structure -
independent of the mode.</para>
</section>
+ <section id="DTV-ATSCMH-FIC-VER">
+ <title><constant>DTV_ATSCMH_FIC_VER</constant></title>
+ <para>Version number of the FIC (Fast Information Channel) signaling data.</para>
+ <para>FIC is used for relaying information to allow rapid service acquisition by the receiver.</para>
+ <para>Possible values: 0, 1, 2, 3, ..., 30, 31</para>
+ </section>
+ <section id="DTV-ATSCMH-PARADE-ID">
+ <title><constant>DTV_ATSCMH_PARADE_ID</constant></title>
+ <para>Parade identification number</para>
+ <para>A parade is a collection of up to eight MH groups, conveying one or two ensembles.</para>
+ <para>Possible values: 0, 1, 2, 3, ..., 126, 127</para>
+ </section>
+ <section id="DTV-ATSCMH-NOG">
+ <title><constant>DTV_ATSCMH_NOG</constant></title>
+ <para>Number of MH groups per MH subframe for a designated parade.</para>
+ <para>Possible values: 1, 2, 3, 4, 5, 6, 7, 8</para>
+ </section>
+ <section id="DTV-ATSCMH-TNOG">
+ <title><constant>DTV_ATSCMH_TNOG</constant></title>
+ <para>Total number of MH groups including all MH groups belonging to all MH parades in one MH subframe.</para>
+ <para>Possible values: 0, 1, 2, 3, ..., 30, 31</para>
+ </section>
+ <section id="DTV-ATSCMH-SGN">
+ <title><constant>DTV_ATSCMH_SGN</constant></title>
+ <para>Start group number.</para>
+ <para>Possible values: 0, 1, 2, 3, ..., 14, 15</para>
+ </section>
+ <section id="DTV-ATSCMH-PRC">
+ <title><constant>DTV_ATSCMH_PRC</constant></title>
+ <para>Parade repetition cycle.</para>
+ <para>Possible values: 1, 2, 3, 4, 5, 6, 7, 8</para>
+ </section>
+ <section id="DTV-ATSCMH-RS-FRAME-MODE">
+ <title><constant>DTV_ATSCMH_RS_FRAME_MODE</constant></title>
+ <para>RS frame mode.</para>
+ <para>Possible values are:</para>
+<programlisting>
+typedef enum atscmh_rs_frame_mode {
+ ATSCMH_RSFRAME_PRI_ONLY = 0,
+ ATSCMH_RSFRAME_PRI_SEC = 1,
+} atscmh_rs_frame_mode_t;
+</programlisting>
+ </section>
+ <section id="DTV-ATSCMH-RS-FRAME-ENSEMBLE">
+ <title><constant>DTV_ATSCMH_RS_FRAME_ENSEMBLE</constant></title>
+ <para>RS frame ensemble.</para>
+ <para>Possible values are:</para>
+<programlisting>
+typedef enum atscmh_rs_frame_ensemble {
+ ATSCMH_RSFRAME_ENS_PRI = 0,
+ ATSCMH_RSFRAME_ENS_SEC = 1,
+} atscmh_rs_frame_ensemble_t;
+</programlisting>
+ </section>
+ <section id="DTV-ATSCMH-RS-CODE-MODE-PRI">
+ <title><constant>DTV_ATSCMH_RS_CODE_MODE_PRI</constant></title>
+ <para>RS code mode (primary).</para>
+ <para>Possible values are:</para>
+<programlisting>
+typedef enum atscmh_rs_code_mode {
+ ATSCMH_RSCODE_211_187 = 0,
+ ATSCMH_RSCODE_223_187 = 1,
+ ATSCMH_RSCODE_235_187 = 2,
+} atscmh_rs_code_mode_t;
+</programlisting>
+ </section>
+ <section id="DTV-ATSCMH-RS-CODE-MODE-SEC">
+ <title><constant>DTV_ATSCMH_RS_CODE_MODE_SEC</constant></title>
+ <para>RS code mode (secondary).</para>
+ <para>Possible values are:</para>
+<programlisting>
+typedef enum atscmh_rs_code_mode {
+ ATSCMH_RSCODE_211_187 = 0,
+ ATSCMH_RSCODE_223_187 = 1,
+ ATSCMH_RSCODE_235_187 = 2,
+} atscmh_rs_code_mode_t;
+</programlisting>
+ </section>
+ <section id="DTV-ATSCMH-SCCC-BLOCK-MODE">
+ <title><constant>DTV_ATSCMH_SCCC_BLOCK_MODE</constant></title>
+ <para>Series Concatenated Convolutional Code Block Mode.</para>
+ <para>Possible values are:</para>
+<programlisting>
+typedef enum atscmh_sccc_block_mode {
+ ATSCMH_SCCC_BLK_SEP = 0,
+ ATSCMH_SCCC_BLK_COMB = 1,
+} atscmh_sccc_block_mode_t;
+</programlisting>
+ </section>
+ <section id="DTV-ATSCMH-SCCC-CODE-MODE-A">
+ <title><constant>DTV_ATSCMH_SCCC_CODE_MODE_A</constant></title>
+ <para>Series Concatenated Convolutional Code Rate.</para>
+ <para>Possible values are:</para>
+<programlisting>
+typedef enum atscmh_sccc_code_mode {
+ ATSCMH_SCCC_CODE_HLF = 0,
+ ATSCMH_SCCC_CODE_QTR = 1,
+} atscmh_sccc_code_mode_t;
+</programlisting>
+ </section>
+ <section id="DTV-ATSCMH-SCCC-CODE-MODE-B">
+ <title><constant>DTV_ATSCMH_SCCC_CODE_MODE_B</constant></title>
+ <para>Series Concatenated Convolutional Code Rate.</para>
+ <para>Possible values are:</para>
+<programlisting>
+typedef enum atscmh_sccc_code_mode {
+ ATSCMH_SCCC_CODE_HLF = 0,
+ ATSCMH_SCCC_CODE_QTR = 1,
+} atscmh_sccc_code_mode_t;
+</programlisting>
+ </section>
+ <section id="DTV-ATSCMH-SCCC-CODE-MODE-C">
+ <title><constant>DTV_ATSCMH_SCCC_CODE_MODE_C</constant></title>
+ <para>Series Concatenated Convolutional Code Rate.</para>
+ <para>Possible values are:</para>
+<programlisting>
+typedef enum atscmh_sccc_code_mode {
+ ATSCMH_SCCC_CODE_HLF = 0,
+ ATSCMH_SCCC_CODE_QTR = 1,
+} atscmh_sccc_code_mode_t;
+</programlisting>
+ </section>
+ <section id="DTV-ATSCMH-SCCC-CODE-MODE-D">
+ <title><constant>DTV_ATSCMH_SCCC_CODE_MODE_D</constant></title>
+ <para>Series Concatenated Convolutional Code Rate.</para>
+ <para>Possible values are:</para>
+<programlisting>
+typedef enum atscmh_sccc_code_mode {
+ ATSCMH_SCCC_CODE_HLF = 0,
+ ATSCMH_SCCC_CODE_QTR = 1,
+} atscmh_sccc_code_mode_t;
+</programlisting>
+ </section>
</section>
<section id="DTV-API-VERSION">
<title><constant>DTV_API_VERSION</constant></title>
@@ -774,6 +907,33 @@ typedef enum fe_hierarchy {
<listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem>
</itemizedlist>
</section>
+ <section id="atscmh-params">
+ <title>ATSC-MH delivery system</title>
+ <para>The following parameters are valid for ATSC-MH:</para>
+ <itemizedlist mark='opencircle'>
+ <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-FIC-VER"><constant>DTV_ATSCMH_FIC_VER</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-PARADE-ID"><constant>DTV_ATSCMH_PARADE_ID</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-NOG"><constant>DTV_ATSCMH_NOG</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-TNOG"><constant>DTV_ATSCMH_TNOG</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-SGN"><constant>DTV_ATSCMH_SGN</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-PRC"><constant>DTV_ATSCMH_PRC</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-RS-FRAME-MODE"><constant>DTV_ATSCMH_RS_FRAME_MODE</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-RS-FRAME-ENSEMBLE"><constant>DTV_ATSCMH_RS_FRAME_ENSEMBLE</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-CODE-MODE-PRI"><constant>DTV_ATSCMH_CODE_MODE_PRI</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-CODE-MODE-SEC"><constant>DTV_ATSCMH_CODE_MODE_SEC</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-SCCC-BLOCK-MODE"><constant>DTV_ATSCMH_SCCC_BLOCK_MODE</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-SCCC-CODE_MODE-A"><constant>DTV_ATSCMH_SCCC_CODE_MODE_A</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-SCCC-CODE_MODE-B"><constant>DTV_ATSCMH_SCCC_CODE_MODE_B</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-SCCC-CODE_MODE-C"><constant>DTV_ATSCMH_SCCC_CODE_MODE_C</constant></link></para></listitem>
+ <listitem><para><link linkend="DTV-ATSCMH-SCCC-CODE_MODE-D"><constant>DTV_ATSCMH_SCCC_CODE_MODE_D</constant></link></para></listitem>
+ </itemizedlist>
+ </section>
</section>
<section id="frontend-property-cable-systems">
<title>Properties used on cable delivery systems</title>
diff --git a/Documentation/DocBook/media/v4l/biblio.xml b/Documentation/DocBook/media/v4l/biblio.xml
index 7dc65c592a87..7c49facecd25 100644
--- a/Documentation/DocBook/media/v4l/biblio.xml
+++ b/Documentation/DocBook/media/v4l/biblio.xml
@@ -197,4 +197,33 @@ in the frequency range from 87,5 to 108,0 MHz</title>
<title>NTSC-4: United States RBDS Standard</title>
</biblioentry>
+ <biblioentry id="iso12232">
+ <abbrev>ISO&nbsp;12232:2006</abbrev>
+ <authorgroup>
+ <corpauthor>International Organization for Standardization
+(<ulink url="http://www.iso.org">http://www.iso.org</ulink>)</corpauthor>
+ </authorgroup>
+ <title>Photography &mdash; Digital still cameras &mdash; Determination
+ of exposure index, ISO speed ratings, standard output sensitivity, and
+ recommended exposure index</title>
+ </biblioentry>
+
+ <biblioentry id="cea861">
+ <abbrev>CEA-861-E</abbrev>
+ <authorgroup>
+ <corpauthor>Consumer Electronics Association
+(<ulink url="http://www.ce.org">http://www.ce.org</ulink>)</corpauthor>
+ </authorgroup>
+ <title>A DTV Profile for Uncompressed High Speed Digital Interfaces</title>
+ </biblioentry>
+
+ <biblioentry id="vesadmt">
+ <abbrev>VESA&nbsp;DMT</abbrev>
+ <authorgroup>
+ <corpauthor>Video Electronics Standards Association
+(<ulink url="http://www.vesa.org">http://www.vesa.org</ulink>)</corpauthor>
+ </authorgroup>
+ <title>VESA and Industry Standards and Guidelines for Computer Display Monitor Timing (DMT)</title>
+ </biblioentry>
+
</bibliography>
diff --git a/Documentation/DocBook/media/v4l/common.xml b/Documentation/DocBook/media/v4l/common.xml
index c79278acfb0e..4101aeb56540 100644
--- a/Documentation/DocBook/media/v4l/common.xml
+++ b/Documentation/DocBook/media/v4l/common.xml
@@ -724,41 +724,49 @@ if (-1 == ioctl (fd, &VIDIOC-S-STD;, &amp;std_id)) {
}
</programlisting>
</example>
+ </section>
<section id="dv-timings">
<title>Digital Video (DV) Timings</title>
<para>
- The video standards discussed so far has been dealing with Analog TV and the
+ The video standards discussed so far have been dealing with Analog TV and the
corresponding video timings. Today there are many more different hardware interfaces
such as High Definition TV interfaces (HDMI), VGA, DVI connectors etc., that carry
video signals and there is a need to extend the API to select the video timings
for these interfaces. Since it is not possible to extend the &v4l2-std-id; due to
-the limited bits available, a new set of IOCTLs is added to set/get video timings at
+the limited bits available, a new set of IOCTLs was added to set/get video timings at
the input and output: </para><itemizedlist>
<listitem>
- <para>DV Presets: Digital Video (DV) presets. These are IDs representing a
+ <para>DV Timings: This will allow applications to define detailed
+video timings for the interface. This includes parameters such as width, height,
+polarities, frontporch, backporch etc. The <filename>linux/v4l2-dv-timings.h</filename>
+header can be used to get the timings of the formats in the <xref linkend="cea861" /> and
+<xref linkend="vesadmt" /> standards.
+ </para>
+ </listitem>
+ <listitem>
+ <para>DV Presets: Digital Video (DV) presets (<emphasis role="bold">deprecated</emphasis>).
+ These are IDs representing a
video timing at the input/output. Presets are pre-defined timings implemented
by the hardware according to video standards. A __u32 data type is used to represent
a preset unlike the bit mask that is used in &v4l2-std-id; allowing future extensions
-to support as many different presets as needed.</para>
- </listitem>
- <listitem>
- <para>Custom DV Timings: This will allow applications to define more detailed
-custom video timings for the interface. This includes parameters such as width, height,
-polarities, frontporch, backporch etc.
- </para>
+to support as many different presets as needed. This API is deprecated in favor of the DV Timings
+API.</para>
</listitem>
</itemizedlist>
+ <para>To enumerate and query the attributes of the DV timings supported by a device,
+ applications use the &VIDIOC-ENUM-DV-TIMINGS; and &VIDIOC-DV-TIMINGS-CAP; ioctls.
+ To set DV timings for the device, applications use the
+&VIDIOC-S-DV-TIMINGS; ioctl and to get current DV timings they use the
+&VIDIOC-G-DV-TIMINGS; ioctl. To detect the DV timings as seen by the video receiver applications
+use the &VIDIOC-QUERY-DV-TIMINGS; ioctl.</para>
<para>To enumerate and query the attributes of DV presets supported by a device,
applications use the &VIDIOC-ENUM-DV-PRESETS; ioctl. To get the current DV preset,
applications use the &VIDIOC-G-DV-PRESET; ioctl and to set a preset they use the
-&VIDIOC-S-DV-PRESET; ioctl.</para>
- <para>To set custom DV timings for the device, applications use the
-&VIDIOC-S-DV-TIMINGS; ioctl and to get current custom DV timings they use the
-&VIDIOC-G-DV-TIMINGS; ioctl.</para>
+&VIDIOC-S-DV-PRESET; ioctl. To detect the preset as seen by the video receiver applications
+use the &VIDIOC-QUERY-DV-PRESET; ioctl.</para>
<para>Applications can make use of the <xref linkend="input-capabilities" /> and
<xref linkend="output-capabilities"/> flags to decide what ioctls are available to set the
video timings for the device.</para>
- </section>
</section>
&sub-controls;
diff --git a/Documentation/DocBook/media/v4l/compat.xml b/Documentation/DocBook/media/v4l/compat.xml
index bce97c50391b..ea42ef824948 100644
--- a/Documentation/DocBook/media/v4l/compat.xml
+++ b/Documentation/DocBook/media/v4l/compat.xml
@@ -2407,6 +2407,54 @@ details.</para>
<para>Added <link linkend="jpeg-controls">JPEG compression control
class</link>.</para>
</listitem>
+ <listitem>
+ <para>Extended the DV Timings API:
+ &VIDIOC-ENUM-DV-TIMINGS;, &VIDIOC-QUERY-DV-TIMINGS; and
+ &VIDIOC-DV-TIMINGS-CAP;.</para>
+ </listitem>
+ </orderedlist>
+ </section>
+
+ <section>
+ <title>V4L2 in Linux 3.5</title>
+ <orderedlist>
+ <listitem>
+ <para>Added integer menus, the new type will be
+ V4L2_CTRL_TYPE_INTEGER_MENU.</para>
+ </listitem>
+ <listitem>
+ <para>Added selection API for V4L2 subdev interface:
+ &VIDIOC-SUBDEV-G-SELECTION; and
+ &VIDIOC-SUBDEV-S-SELECTION;.</para>
+ </listitem>
+ <listitem>
+ <para> Added <constant>V4L2_COLORFX_ANTIQUE</constant>,
+ <constant>V4L2_COLORFX_ART_FREEZE</constant>,
+ <constant>V4L2_COLORFX_AQUA</constant>,
+ <constant>V4L2_COLORFX_SILHOUETTE</constant>,
+ <constant>V4L2_COLORFX_SOLARIZATION</constant>,
+ <constant>V4L2_COLORFX_VIVID</constant> and
+ <constant>V4L2_COLORFX_ARBITRARY_CBCR</constant> menu items
+ to the <constant>V4L2_CID_COLORFX</constant> control.</para>
+ </listitem>
+ <listitem>
+ <para> Added <constant>V4L2_CID_COLORFX_CBCR</constant> control.</para>
+ </listitem>
+ <listitem>
+ <para> Added camera controls <constant>V4L2_CID_AUTO_EXPOSURE_BIAS</constant>,
+ <constant>V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE</constant>,
+ <constant>V4L2_CID_IMAGE_STABILIZATION</constant>,
+ <constant>V4L2_CID_ISO_SENSITIVITY</constant>,
+ <constant>V4L2_CID_ISO_SENSITIVITY_AUTO</constant>,
+ <constant>V4L2_CID_EXPOSURE_METERING</constant>,
+ <constant>V4L2_CID_SCENE_MODE</constant>,
+ <constant>V4L2_CID_3A_LOCK</constant>,
+ <constant>V4L2_CID_AUTO_FOCUS_START</constant>,
+ <constant>V4L2_CID_AUTO_FOCUS_STOP</constant>,
+ <constant>V4L2_CID_AUTO_FOCUS_STATUS</constant> and
+ <constant>V4L2_CID_AUTO_FOCUS_RANGE</constant>.
+ </para>
+ </listitem>
</orderedlist>
</section>
@@ -2508,6 +2556,10 @@ and may change in the future.</para>
ioctls.</para>
</listitem>
<listitem>
+ <para>&VIDIOC-DECODER-CMD; and &VIDIOC-TRY-DECODER-CMD;
+ioctls.</para>
+ </listitem>
+ <listitem>
<para>&VIDIOC-DBG-G-REGISTER; and &VIDIOC-DBG-S-REGISTER;
ioctls.</para>
</listitem>
@@ -2515,6 +2567,10 @@ ioctls.</para>
<para>&VIDIOC-DBG-G-CHIP-IDENT; ioctl.</para>
</listitem>
<listitem>
+ <para>&VIDIOC-ENUM-DV-TIMINGS;, &VIDIOC-QUERY-DV-TIMINGS; and
+ &VIDIOC-DV-TIMINGS-CAP; ioctls.</para>
+ </listitem>
+ <listitem>
<para>Flash API. <xref linkend="flash-controls" /></para>
</listitem>
<listitem>
@@ -2523,6 +2579,14 @@ ioctls.</para>
<listitem>
<para>Selection API. <xref linkend="selection-api" /></para>
</listitem>
+ <listitem>
+ <para>Sub-device selection API: &VIDIOC-SUBDEV-G-SELECTION;
+ and &VIDIOC-SUBDEV-S-SELECTION; ioctls.</para>
+ </listitem>
+ <listitem>
+ <para><link linkend="v4l2-auto-focus-area"><constant>
+ V4L2_CID_AUTO_FOCUS_AREA</constant></link> control.</para>
+ </listitem>
</itemizedlist>
</section>
@@ -2538,6 +2602,17 @@ interfaces and should not be implemented in new drivers.</para>
<constant>VIDIOC_S_MPEGCOMP</constant> ioctls. Use Extended Controls,
<xref linkend="extended-controls" />.</para>
</listitem>
+ <listitem>
+ <para>&VIDIOC-G-DV-PRESET;, &VIDIOC-S-DV-PRESET;, &VIDIOC-ENUM-DV-PRESETS; and
+ &VIDIOC-QUERY-DV-PRESET; ioctls. Use the DV Timings API (<xref linkend="dv-timings" />).</para>
+ </listitem>
+ <listitem>
+ <para><constant>VIDIOC_SUBDEV_G_CROP</constant> and
+ <constant>VIDIOC_SUBDEV_S_CROP</constant> ioctls. Use
+ <constant>VIDIOC_SUBDEV_G_SELECTION</constant> and
+ <constant>VIDIOC_SUBDEV_S_SELECTION</constant>, <xref
+ linkend="vidioc-subdev-g-selection" />.</para>
+ </listitem>
</itemizedlist>
</section>
</section>
diff --git a/Documentation/DocBook/media/v4l/controls.xml b/Documentation/DocBook/media/v4l/controls.xml
index b84f25e9cc87..676bc46f9c52 100644
--- a/Documentation/DocBook/media/v4l/controls.xml
+++ b/Documentation/DocBook/media/v4l/controls.xml
@@ -285,18 +285,92 @@ minimum value disables backlight compensation.</entry>
<row id="v4l2-colorfx">
<entry><constant>V4L2_CID_COLORFX</constant></entry>
<entry>enum</entry>
- <entry>Selects a color effect. Possible values for
-<constant>enum v4l2_colorfx</constant> are:
-<constant>V4L2_COLORFX_NONE</constant> (0),
-<constant>V4L2_COLORFX_BW</constant> (1),
-<constant>V4L2_COLORFX_SEPIA</constant> (2),
-<constant>V4L2_COLORFX_NEGATIVE</constant> (3),
-<constant>V4L2_COLORFX_EMBOSS</constant> (4),
-<constant>V4L2_COLORFX_SKETCH</constant> (5),
-<constant>V4L2_COLORFX_SKY_BLUE</constant> (6),
-<constant>V4L2_COLORFX_GRASS_GREEN</constant> (7),
-<constant>V4L2_COLORFX_SKIN_WHITEN</constant> (8) and
-<constant>V4L2_COLORFX_VIVID</constant> (9).</entry>
+ <entry>Selects a color effect. The following values are defined:
+ </entry>
+ </row><row>
+ <entry></entry>
+ <entry></entry>
+ <entrytbl spanname="descr" cols="2">
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_COLORFX_NONE</constant>&nbsp;</entry>
+ <entry>Color effect is disabled.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_ANTIQUE</constant>&nbsp;</entry>
+ <entry>An aging (old photo) effect.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_ART_FREEZE</constant>&nbsp;</entry>
+ <entry>Frost color effect.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_AQUA</constant>&nbsp;</entry>
+ <entry>Water color, cool tone.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_BW</constant>&nbsp;</entry>
+ <entry>Black and white.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_EMBOSS</constant>&nbsp;</entry>
+ <entry>Emboss, the highlights and shadows replace light/dark boundaries
+ and low contrast areas are set to a gray background.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_GRASS_GREEN</constant>&nbsp;</entry>
+ <entry>Grass green.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_NEGATIVE</constant>&nbsp;</entry>
+ <entry>Negative.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_SEPIA</constant>&nbsp;</entry>
+ <entry>Sepia tone.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_SKETCH</constant>&nbsp;</entry>
+ <entry>Sketch.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_SKIN_WHITEN</constant>&nbsp;</entry>
+ <entry>Skin whiten.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_SKY_BLUE</constant>&nbsp;</entry>
+ <entry>Sky blue.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_SOLARIZATION</constant>&nbsp;</entry>
+ <entry>Solarization, the image is partially reversed in tone,
+ only color values above or below a certain threshold are inverted.
+ </entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_SILHOUETTE</constant>&nbsp;</entry>
+ <entry>Silhouette (outline).</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_VIVID</constant>&nbsp;</entry>
+ <entry>Vivid colors.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_COLORFX_SET_CBCR</constant>&nbsp;</entry>
+ <entry>The Cb and Cr chroma components are replaced by fixed
+ coefficients determined by <constant>V4L2_CID_COLORFX_CBCR</constant>
+ control.</entry>
+ </row>
+ </tbody>
+ </entrytbl>
+ </row>
+ <row>
+ <entry><constant>V4L2_CID_COLORFX_CBCR</constant></entry>
+ <entry>integer</entry>
+ <entry>Determines the Cb and Cr coefficients for <constant>V4L2_COLORFX_SET_CBCR</constant>
+ color effect. Bits [7:0] of the supplied 32 bit value are interpreted as
+ Cr component, bits [15:8] as Cb component and bits [31:16] must be zero.
+ </entry>
</row>
<row>
<entry><constant>V4L2_CID_ROTATE</constant></entry>
@@ -2023,7 +2097,7 @@ Possible values are:</entry>
<entry>integer</entry>
</row>
<row><entry spanname="descr">Cyclic intra macroblock refresh. This is the number of continuous macroblocks
-refreshed every frame. Each frame a succesive set of macroblocks is refreshed until the cycle completes and starts from the
+refreshed every frame. Each frame a successive set of macroblocks is refreshed until the cycle completes and starts from the
top of the frame. Applicable to H264, H263 and MPEG4 encoder.</entry>
</row>
@@ -2183,7 +2257,7 @@ Applicable to the MPEG4 and H264 encoders.</entry>
<entry>integer</entry>
</row>
<row><entry spanname="descr">The Video Buffer Verifier size in kilobytes, it is used as a limitation of frame skip.
-The VBV is defined in the standard as a mean to verify that the produced stream will be succesfully decoded.
+The VBV is defined in the standard as a mean to verify that the produced stream will be successfully decoded.
The standard describes it as "Part of a hypothetical decoder that is conceptually connected to the
output of the encoder. Its purpose is to provide a constraint on the variability of the data rate that an
encoder or editing process may produce.".
@@ -2196,7 +2270,7 @@ Applicable to the MPEG1, MPEG2, MPEG4 encoders.</entry>
<entry>integer</entry>
</row>
<row><entry spanname="descr">The Coded Picture Buffer size in kilobytes, it is used as a limitation of frame skip.
-The CPB is defined in the H264 standard as a mean to verify that the produced stream will be succesfully decoded.
+The CPB is defined in the H264 standard as a mean to verify that the produced stream will be successfully decoded.
Applicable to the H264 encoder.</entry>
</row>
@@ -2775,6 +2849,51 @@ remain constant.</entry>
<row><entry></entry></row>
<row>
+ <entry spanname="id"><constant>V4L2_CID_EXPOSURE_BIAS</constant>&nbsp;</entry>
+ <entry>integer menu</entry>
+ </row><row><entry spanname="descr"> Determines the automatic
+exposure compensation, it is effective only when <constant>V4L2_CID_EXPOSURE_AUTO</constant>
+control is set to <constant>AUTO</constant>, <constant>SHUTTER_PRIORITY </constant>
+or <constant>APERTURE_PRIORITY</constant>.
+It is expressed in terms of EV, drivers should interpret the values as 0.001 EV
+units, where the value 1000 stands for +1 EV.
+<para>Increasing the exposure compensation value is equivalent to decreasing
+the exposure value (EV) and will increase the amount of light at the image
+sensor. The camera performs the exposure compensation by adjusting absolute
+exposure time and/or aperture.</para></entry>
+ </row>
+ <row><entry></entry></row>
+
+ <row id="v4l2-exposure-metering">
+ <entry spanname="id"><constant>V4L2_CID_EXPOSURE_METERING</constant>&nbsp;</entry>
+ <entry>enum&nbsp;v4l2_exposure_metering</entry>
+ </row><row><entry spanname="descr">Determines how the camera measures
+the amount of light available for the frame exposure. Possible values are:</entry>
+ </row>
+ <row>
+ <entrytbl spanname="descr" cols="2">
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_EXPOSURE_METERING_AVERAGE</constant>&nbsp;</entry>
+ <entry>Use the light information coming from the entire frame
+and average giving no weighting to any particular portion of the metered area.
+ </entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_EXPOSURE_METERING_CENTER_WEIGHTED</constant>&nbsp;</entry>
+ <entry>Average the light information coming from the entire frame
+giving priority to the center of the metered area.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_EXPOSURE_METERING_SPOT</constant>&nbsp;</entry>
+ <entry>Measure only very small area at the center of the frame.</entry>
+ </row>
+ </tbody>
+ </entrytbl>
+ </row>
+ <row><entry></entry></row>
+
+ <row>
<entry spanname="id"><constant>V4L2_CID_PAN_RELATIVE</constant>&nbsp;</entry>
<entry>integer</entry>
</row><row><entry spanname="descr">This control turns the
@@ -2857,13 +2976,107 @@ negative values towards infinity. This is a write-only control.</entry>
<row>
<entry spanname="id"><constant>V4L2_CID_FOCUS_AUTO</constant>&nbsp;</entry>
<entry>boolean</entry>
- </row><row><entry spanname="descr">Enables automatic focus
-adjustments. The effect of manual focus adjustments while this feature
+ </row><row><entry spanname="descr">Enables continuous automatic
+focus adjustments. The effect of manual focus adjustments while this feature
is enabled is undefined, drivers should ignore such requests.</entry>
</row>
<row><entry></entry></row>
<row>
+ <entry spanname="id"><constant>V4L2_CID_AUTO_FOCUS_START</constant>&nbsp;</entry>
+ <entry>button</entry>
+ </row><row><entry spanname="descr">Starts single auto focus process.
+The effect of setting this control when <constant>V4L2_CID_FOCUS_AUTO</constant>
+is set to <constant>TRUE</constant> (1) is undefined, drivers should ignore
+such requests.</entry>
+ </row>
+ <row><entry></entry></row>
+
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_AUTO_FOCUS_STOP</constant>&nbsp;</entry>
+ <entry>button</entry>
+ </row><row><entry spanname="descr">Aborts automatic focusing
+started with <constant>V4L2_CID_AUTO_FOCUS_START</constant> control. It is
+effective only when the continuous autofocus is disabled, that is when
+<constant>V4L2_CID_FOCUS_AUTO</constant> control is set to <constant>FALSE
+</constant> (0).</entry>
+ </row>
+ <row><entry></entry></row>
+
+ <row id="v4l2-auto-focus-status">
+ <entry spanname="id">
+ <constant>V4L2_CID_AUTO_FOCUS_STATUS</constant>&nbsp;</entry>
+ <entry>bitmask</entry>
+ </row>
+ <row><entry spanname="descr">The automatic focus status. This is a read-only
+ control.</entry>
+ </row>
+ <row>
+ <entrytbl spanname="descr" cols="2">
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_AUTO_FOCUS_STATUS_IDLE</constant>&nbsp;</entry>
+ <entry>Automatic focus is not active.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_AUTO_FOCUS_STATUS_BUSY</constant>&nbsp;</entry>
+ <entry>Automatic focusing is in progress.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_AUTO_FOCUS_STATUS_REACHED</constant>&nbsp;</entry>
+ <entry>Focus has been reached.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_AUTO_FOCUS_STATUS_FAILED</constant>&nbsp;</entry>
+ <entry>Automatic focus has failed, the driver will not
+ transition from this state until another action is
+ performed by an application.</entry>
+ </row>
+ </tbody>
+ </entrytbl>
+ </row>
+ <row><entry spanname="descr">
+Setting <constant>V4L2_LOCK_FOCUS</constant> lock bit of the <constant>V4L2_CID_3A_LOCK
+</constant> control may stop updates of the <constant>V4L2_CID_AUTO_FOCUS_STATUS</constant>
+control value.</entry>
+ </row>
+ <row><entry></entry></row>
+
+ <row id="v4l2-auto-focus-range">
+ <entry spanname="id">
+ <constant>V4L2_CID_AUTO_FOCUS_RANGE</constant>&nbsp;</entry>
+ <entry>enum&nbsp;v4l2_auto_focus_range</entry>
+ </row>
+ <row><entry spanname="descr">Determines auto focus distance range
+for which lens may be adjusted. </entry>
+ </row>
+ <row>
+ <entrytbl spanname="descr" cols="2">
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_AUTO_FOCUS_RANGE_AUTO</constant>&nbsp;</entry>
+ <entry>The camera automatically selects the focus range.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_AUTO_FOCUS_RANGE_NORMAL</constant>&nbsp;</entry>
+ <entry>Normal distance range, limited for best automatic focus
+performance.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_AUTO_FOCUS_RANGE_MACRO</constant>&nbsp;</entry>
+ <entry>Macro (close-up) auto focus. The camera will
+use its minimum possible distance for auto focus.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_AUTO_FOCUS_RANGE_INFINITY</constant>&nbsp;</entry>
+ <entry>The lens is set to focus on an object at infinite distance.</entry>
+ </row>
+ </tbody>
+ </entrytbl>
+ </row>
+ <row><entry></entry></row>
+
+ <row>
<entry spanname="id"><constant>V4L2_CID_ZOOM_ABSOLUTE</constant>&nbsp;</entry>
<entry>integer</entry>
</row><row><entry spanname="descr">Specify the objective lens
@@ -2932,6 +3145,295 @@ camera sensor on or off, or specify its strength. Such band-stop filters can
be used, for example, to filter out the fluorescent light component.</entry>
</row>
<row><entry></entry></row>
+
+ <row id="v4l2-auto-n-preset-white-balance">
+ <entry spanname="id"><constant>V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE</constant>&nbsp;</entry>
+ <entry>enum&nbsp;v4l2_auto_n_preset_white_balance</entry>
+ </row><row><entry spanname="descr">Sets white balance to automatic,
+manual or a preset. The presets determine color temperature of the light as
+a hint to the camera for white balance adjustments resulting in most accurate
+color representation. The following white balance presets are listed in order
+of increasing color temperature.</entry>
+ </row>
+ <row>
+ <entrytbl spanname="descr" cols="2">
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_MANUAL</constant>&nbsp;</entry>
+ <entry>Manual white balance.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_AUTO</constant>&nbsp;</entry>
+ <entry>Automatic white balance adjustments.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_INCANDESCENT</constant>&nbsp;</entry>
+ <entry>White balance setting for incandescent (tungsten) lighting.
+It generally cools down the colors and corresponds approximately to 2500...3500 K
+color temperature range.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_FLUORESCENT</constant>&nbsp;</entry>
+ <entry>White balance preset for fluorescent lighting.
+It corresponds approximately to 4000...5000 K color temperature.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_FLUORESCENT_H</constant>&nbsp;</entry>
+ <entry>With this setting the camera will compensate for
+fluorescent H lighting.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_HORIZON</constant>&nbsp;</entry>
+ <entry>White balance setting for horizon daylight.
+It corresponds approximately to 5000 K color temperature.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_DAYLIGHT</constant>&nbsp;</entry>
+ <entry>White balance preset for daylight (with clear sky).
+It corresponds approximately to 5000...6500 K color temperature.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_FLASH</constant>&nbsp;</entry>
+ <entry>With this setting the camera will compensate for the flash
+light. It slightly warms up the colors and corresponds roughly to 5000...5500 K
+color temperature.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_CLOUDY</constant>&nbsp;</entry>
+ <entry>White balance preset for moderately overcast sky.
+This option corresponds approximately to 6500...8000 K color temperature
+range.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_WHITE_BALANCE_SHADE</constant>&nbsp;</entry>
+ <entry>White balance preset for shade or heavily overcast
+sky. It corresponds approximately to 9000...10000 K color temperature.
+</entry>
+ </row>
+ </tbody>
+ </entrytbl>
+ </row>
+ <row><entry></entry></row>
+
+ <row id="v4l2-wide-dynamic-range">
+ <entry spanname="id"><constant>V4L2_CID_WIDE_DYNAMIC_RANGE</constant></entry>
+ <entry>boolean</entry>
+ </row>
+ <row>
+ <entry spanname="descr">Enables or disables the camera's wide dynamic
+range feature. This feature allows to obtain clear images in situations where
+intensity of the illumination varies significantly throughout the scene, i.e.
+there are simultaneously very dark and very bright areas. It is most commonly
+realized in cameras by combining two subsequent frames with different exposure
+times. <footnote id="ctypeconv"><para> This control may be changed to a menu
+control in the future, if more options are required.</para></footnote></entry>
+ </row>
+ <row><entry></entry></row>
+
+ <row id="v4l2-image-stabilization">
+ <entry spanname="id"><constant>V4L2_CID_IMAGE_STABILIZATION</constant></entry>
+ <entry>boolean</entry>
+ </row>
+ <row>
+ <entry spanname="descr">Enables or disables image stabilization.
+ <footnoteref linkend="ctypeconv"/></entry>
+ </row>
+ <row><entry></entry></row>
+
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_ISO_SENSITIVITY</constant>&nbsp;</entry>
+ <entry>integer menu</entry>
+ </row><row><entry spanname="descr">Determines ISO equivalent of an
+image sensor indicating the sensor's sensitivity to light. The numbers are
+expressed in arithmetic scale, as per <xref linkend="iso12232" /> standard,
+where doubling the sensor sensitivity is represented by doubling the numerical
+ISO value. Applications should interpret the values as standard ISO values
+multiplied by 1000, e.g. control value 800 stands for ISO 0.8. Drivers will
+usually support only a subset of standard ISO values. The effect of setting
+this control while the <constant>V4L2_CID_ISO_SENSITIVITY_AUTO</constant>
+control is set to a value other than <constant>V4L2_CID_ISO_SENSITIVITY_MANUAL
+</constant> is undefined, drivers should ignore such requests.</entry>
+ </row>
+ <row><entry></entry></row>
+
+ <row id="v4l2-iso-sensitivity-auto-type">
+ <entry spanname="id"><constant>V4L2_CID_ISO_SENSITIVITY_AUTO</constant>&nbsp;</entry>
+ <entry>enum&nbsp;v4l2_iso_sensitivity_type</entry>
+ </row><row><entry spanname="descr">Enables or disables automatic ISO
+sensitivity adjustments.</entry>
+ </row>
+ <row>
+ <entrytbl spanname="descr" cols="2">
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_CID_ISO_SENSITIVITY_MANUAL</constant>&nbsp;</entry>
+ <entry>Manual ISO sensitivity.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_CID_ISO_SENSITIVITY_AUTO</constant>&nbsp;</entry>
+ <entry>Automatic ISO sensitivity adjustments.</entry>
+ </row>
+ </tbody>
+ </entrytbl>
+ </row>
+ <row><entry></entry></row>
+
+ <row id="v4l2-scene-mode">
+ <entry spanname="id"><constant>V4L2_CID_SCENE_MODE</constant>&nbsp;</entry>
+ <entry>enum&nbsp;v4l2_scene_mode</entry>
+ </row><row><entry spanname="descr">This control allows to select
+scene programs as the camera automatic modes optimized for common shooting
+scenes. Within these modes the camera determines best exposure, aperture,
+focusing, light metering, white balance and equivalent sensitivity. The
+controls of those parameters are influenced by the scene mode control.
+An exact behavior in each mode is subject to the camera specification.
+
+<para>When the scene mode feature is not used, this control should be set to
+<constant>V4L2_SCENE_MODE_NONE</constant> to make sure the other possibly
+related controls are accessible. The following scene programs are defined:
+</para>
+</entry>
+ </row>
+ <row>
+ <entrytbl spanname="descr" cols="2">
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_NONE</constant>&nbsp;</entry>
+ <entry>The scene mode feature is disabled.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_BACKLIGHT</constant>&nbsp;</entry>
+ <entry>Backlight. Compensates for dark shadows when light is
+ coming from behind a subject, also by automatically turning
+ on the flash.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_BEACH_SNOW</constant>&nbsp;</entry>
+ <entry>Beach and snow. This mode compensates for all-white or
+bright scenes, which tend to look gray and low contrast, when camera's automatic
+exposure is based on an average scene brightness. To compensate, this mode
+automatically slightly overexposes the frames. The white balance may also be
+adjusted to compensate for the fact that reflected snow looks bluish rather
+than white.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_CANDLELIGHT</constant>&nbsp;</entry>
+ <entry>Candle light. The camera generally raises the ISO
+sensitivity and lowers the shutter speed. This mode compensates for relatively
+close subject in the scene. The flash is disabled in order to preserve the
+ambiance of the light.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_DAWN_DUSK</constant>&nbsp;</entry>
+ <entry>Dawn and dusk. Preserves the colors seen in low
+natural light before dusk and after down. The camera may turn off the flash,
+and automatically focus at infinity. It will usually boost saturation and
+lower the shutter speed.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_FALL_COLORS</constant>&nbsp;</entry>
+ <entry>Fall colors. Increases saturation and adjusts white
+balance for color enhancement. Pictures of autumn leaves get saturated reds
+and yellows.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_FIREWORKS</constant>&nbsp;</entry>
+ <entry>Fireworks. Long exposure times are used to capture
+the expanding burst of light from a firework. The camera may invoke image
+stabilization.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_LANDSCAPE</constant>&nbsp;</entry>
+ <entry>Landscape. The camera may choose a small aperture to
+provide deep depth of field and long exposure duration to help capture detail
+in dim light conditions. The focus is fixed at infinity. Suitable for distant
+and wide scenery.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_NIGHT</constant>&nbsp;</entry>
+ <entry>Night, also known as Night Landscape. Designed for low
+light conditions, it preserves detail in the dark areas without blowing out bright
+objects. The camera generally sets itself to a medium-to-high ISO sensitivity,
+with a relatively long exposure time, and turns flash off. As such, there will be
+increased image noise and the possibility of blurred image.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_PARTY_INDOOR</constant>&nbsp;</entry>
+ <entry>Party and indoor. Designed to capture indoor scenes
+that are lit by indoor background lighting as well as the flash. The camera
+usually increases ISO sensitivity, and adjusts exposure for the low light
+conditions.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_PORTRAIT</constant>&nbsp;</entry>
+ <entry>Portrait. The camera adjusts the aperture so that the
+depth of field is reduced, which helps to isolate the subject against a smooth
+background. Most cameras recognize the presence of faces in the scene and focus
+on them. The color hue is adjusted to enhance skin tones. The intensity of the
+flash is often reduced.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_SPORTS</constant>&nbsp;</entry>
+ <entry>Sports. Significantly increases ISO and uses a fast
+shutter speed to freeze motion of rapidly-moving subjects. Increased image
+noise may be seen in this mode.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_SUNSET</constant>&nbsp;</entry>
+ <entry>Sunset. Preserves deep hues seen in sunsets and
+sunrises. It bumps up the saturation.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SCENE_MODE_TEXT</constant>&nbsp;</entry>
+ <entry>Text. It applies extra contrast and sharpness, it is
+typically a black-and-white mode optimized for readability. Automatic focus
+may be switched to close-up mode and this setting may also involve some
+lens-distortion correction.</entry>
+ </row>
+ </tbody>
+ </entrytbl>
+ </row>
+ <row><entry></entry></row>
+
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_3A_LOCK</constant></entry>
+ <entry>bitmask</entry>
+ </row>
+ <row>
+ <entry spanname="descr">This control locks or unlocks the automatic
+focus, exposure and white balance. The automatic adjustments can be paused
+independently by setting the corresponding lock bit to 1. The camera then retains
+the settings until the lock bit is cleared. The following lock bits are defined:
+</entry>
+ </row>
+ <row>
+ <entrytbl spanname="descr" cols="2">
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_LOCK_EXPOSURE</constant></entry>
+ <entry>Automatic exposure adjustments lock.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_LOCK_WHITE_BALANCE</constant></entry>
+ <entry>Automatic white balance adjustments lock.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_LOCK_FOCUS</constant></entry>
+ <entry>Automatic focus lock.</entry>
+ </row>
+ </tbody>
+ </entrytbl>
+ </row>
+ <row><entry spanname="descr">
+When a given algorithm is not enabled, drivers should ignore requests
+to lock it and should return no error. An example might be an application
+setting bit <constant>V4L2_LOCK_WHITE_BALANCE</constant> when the
+<constant>V4L2_CID_AUTO_WHITE_BALANCE</constant> control is set to
+<constant>FALSE</constant>. The value of this control may be changed
+by exposure, white balance or focus controls.</entry>
+ </row>
+ <row><entry></entry></row>
+
</tbody>
</tgroup>
</table>
@@ -3476,7 +3978,7 @@ interface and may change in the future.</para>
<entry spanname="id"><constant>V4L2_CID_JPEG_CHROMA_SUBSAMPLING</constant></entry>
<entry>menu</entry>
</row>
- <row id="jpeg-chroma-subsampling-control">
+ <row id="v4l2-jpeg-chroma-subsampling">
<entry spanname="descr">The chroma subsampling factors describe how
each component of an input image is sampled, in respect to maximum
sample rate in each spatial dimension. See <xref linkend="itu-t81"/>,
@@ -3486,7 +3988,7 @@ interface and may change in the future.</para>
from RGB to Y'CbCr color space.
</entry>
</row>
- <row>
+ <row id = "v4l2-jpeg-chroma-subsampling">
<entrytbl spanname="descr" cols="2">
<tbody valign="top">
<row>
@@ -3538,12 +4040,12 @@ interface and may change in the future.</para>
</entry>
</row>
<row id="jpeg-quality-control">
- <entry spanname="id"><constant>V4L2_CID_JPEG_COMPRESION_QUALITY</constant></entry>
+ <entry spanname="id"><constant>V4L2_CID_JPEG_COMPRESSION_QUALITY</constant></entry>
<entry>integer</entry>
</row>
<row>
<entry spanname="descr">
- <constant>V4L2_CID_JPEG_COMPRESION_QUALITY</constant> control
+ <constant>V4L2_CID_JPEG_COMPRESSION_QUALITY</constant> control
determines trade-off between image quality and size.
It provides simpler method for applications to control image quality,
without a need for direct reconfiguration of luminance and chrominance
@@ -3551,7 +4053,7 @@ interface and may change in the future.</para>
In cases where a driver uses quantization tables configured directly
by an application, using interfaces defined elsewhere, <constant>
- V4L2_CID_JPEG_COMPRESION_QUALITY</constant> control should be set
+ V4L2_CID_JPEG_COMPRESSION_QUALITY</constant> control should be set
by driver to 0.
<para>The value range of this control is driver-specific. Only
@@ -3599,4 +4101,172 @@ interface and may change in the future.</para>
to <xref linkend="itu-t81"/>, <xref linkend="jfif"/>,
<xref linkend="w3c-jpeg-jfif"/>.</para>
</section>
+
+ <section id="image-source-controls">
+ <title>Image Source Control Reference</title>
+
+ <note>
+ <title>Experimental</title>
+
+ <para>This is an <link
+ linkend="experimental">experimental</link> interface and may
+ change in the future.</para>
+ </note>
+
+ <para>
+ The Image Source control class is intended for low-level
+ control of image source devices such as image sensors. The
+ devices feature an analogue to digital converter and a bus
+ transmitter to transmit the image data out of the device.
+ </para>
+
+ <table pgwide="1" frame="none" id="image-source-control-id">
+ <title>Image Source Control IDs</title>
+
+ <tgroup cols="4">
+ <colspec colname="c1" colwidth="1*" />
+ <colspec colname="c2" colwidth="6*" />
+ <colspec colname="c3" colwidth="2*" />
+ <colspec colname="c4" colwidth="6*" />
+ <spanspec namest="c1" nameend="c2" spanname="id" />
+ <spanspec namest="c2" nameend="c4" spanname="descr" />
+ <thead>
+ <row>
+ <entry spanname="id" align="left">ID</entry>
+ <entry align="left">Type</entry>
+ </row><row rowsep="1"><entry spanname="descr" align="left">Description</entry>
+ </row>
+ </thead>
+ <tbody valign="top">
+ <row><entry></entry></row>
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_IMAGE_SOURCE_CLASS</constant></entry>
+ <entry>class</entry>
+ </row>
+ <row>
+ <entry spanname="descr">The IMAGE_SOURCE class descriptor.</entry>
+ </row>
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_VBLANK</constant></entry>
+ <entry>integer</entry>
+ </row>
+ <row>
+ <entry spanname="descr">Vertical blanking. The idle period
+ after every frame during which no image data is produced.
+ The unit of vertical blanking is a line. Every line has
+ length of the image width plus horizontal blanking at the
+ pixel rate defined by
+ <constant>V4L2_CID_PIXEL_RATE</constant> control in the
+ same sub-device.</entry>
+ </row>
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_HBLANK</constant></entry>
+ <entry>integer</entry>
+ </row>
+ <row>
+ <entry spanname="descr">Horizontal blanking. The idle
+ period after every line of image data during which no
+ image data is produced. The unit of horizontal blanking is
+ pixels.</entry>
+ </row>
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_ANALOGUE_GAIN</constant></entry>
+ <entry>integer</entry>
+ </row>
+ <row>
+ <entry spanname="descr">Analogue gain is gain affecting
+ all colour components in the pixel matrix. The gain
+ operation is performed in the analogue domain before A/D
+ conversion.
+ </entry>
+ </row>
+ <row><entry></entry></row>
+ </tbody>
+ </tgroup>
+ </table>
+
+ </section>
+
+ <section id="image-process-controls">
+ <title>Image Process Control Reference</title>
+
+ <note>
+ <title>Experimental</title>
+
+ <para>This is an <link
+ linkend="experimental">experimental</link> interface and may
+ change in the future.</para>
+ </note>
+
+ <para>
+ The Image Source control class is intended for low-level control of
+ image processing functions. Unlike
+ <constant>V4L2_CID_IMAGE_SOURCE_CLASS</constant>, the controls in
+ this class affect processing the image, and do not control capturing
+ of it.
+ </para>
+
+ <table pgwide="1" frame="none" id="image-process-control-id">
+ <title>Image Source Control IDs</title>
+
+ <tgroup cols="4">
+ <colspec colname="c1" colwidth="1*" />
+ <colspec colname="c2" colwidth="6*" />
+ <colspec colname="c3" colwidth="2*" />
+ <colspec colname="c4" colwidth="6*" />
+ <spanspec namest="c1" nameend="c2" spanname="id" />
+ <spanspec namest="c2" nameend="c4" spanname="descr" />
+ <thead>
+ <row>
+ <entry spanname="id" align="left">ID</entry>
+ <entry align="left">Type</entry>
+ </row><row rowsep="1"><entry spanname="descr" align="left">Description</entry>
+ </row>
+ </thead>
+ <tbody valign="top">
+ <row><entry></entry></row>
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_IMAGE_PROC_CLASS</constant></entry>
+ <entry>class</entry>
+ </row>
+ <row>
+ <entry spanname="descr">The IMAGE_PROC class descriptor.</entry>
+ </row>
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_LINK_FREQ</constant></entry>
+ <entry>integer menu</entry>
+ </row>
+ <row>
+ <entry spanname="descr">Data bus frequency. Together with the
+ media bus pixel code, bus type (clock cycles per sample), the
+ data bus frequency defines the pixel rate
+ (<constant>V4L2_CID_PIXEL_RATE</constant>) in the
+ pixel array (or possibly elsewhere, if the device is not an
+ image sensor). The frame rate can be calculated from the pixel
+ clock, image width and height and horizontal and vertical
+ blanking. While the pixel rate control may be defined elsewhere
+ than in the subdev containing the pixel array, the frame rate
+ cannot be obtained from that information. This is because only
+ on the pixel array it can be assumed that the vertical and
+ horizontal blanking information is exact: no other blanking is
+ allowed in the pixel array. The selection of frame rate is
+ performed by selecting the desired horizontal and vertical
+ blanking. The unit of this control is Hz. </entry>
+ </row>
+ <row>
+ <entry spanname="id"><constant>V4L2_CID_PIXEL_RATE</constant></entry>
+ <entry>64-bit integer</entry>
+ </row>
+ <row>
+ <entry spanname="descr">Pixel rate in the source pads of
+ the subdev. This control is read-only and its unit is
+ pixels / second.
+ </entry>
+ </row>
+ <row><entry></entry></row>
+ </tbody>
+ </tgroup>
+ </table>
+
+ </section>
</section>
diff --git a/Documentation/DocBook/media/v4l/dev-subdev.xml b/Documentation/DocBook/media/v4l/dev-subdev.xml
index 0916a7343a16..4afcbbec5eda 100644
--- a/Documentation/DocBook/media/v4l/dev-subdev.xml
+++ b/Documentation/DocBook/media/v4l/dev-subdev.xml
@@ -76,11 +76,12 @@
<wordasword>format</wordasword> means the combination of media bus data
format, frame width and frame height.</para></note>
- <para>Image formats are typically negotiated on video capture and output
- devices using the <link linkend="crop">cropping and scaling</link> ioctls.
- The driver is responsible for configuring every block in the video pipeline
- according to the requested format at the pipeline input and/or
- output.</para>
+ <para>Image formats are typically negotiated on video capture and
+ output devices using the format and <link
+ linkend="vidioc-subdev-g-selection">selection</link> ioctls. The
+ driver is responsible for configuring every block in the video
+ pipeline according to the requested format at the pipeline input
+ and/or output.</para>
<para>For complex devices, such as often found in embedded systems,
identical image sizes at the output of a pipeline can be achieved using
@@ -276,11 +277,11 @@
</section>
<section>
- <title>Cropping and scaling</title>
+ <title>Selections: cropping, scaling and composition</title>
<para>Many sub-devices support cropping frames on their input or output
pads (or possible even on both). Cropping is used to select the area of
- interest in an image, typically on a video sensor or video decoder. It can
+ interest in an image, typically on an image sensor or a video decoder. It can
also be used as part of digital zoom implementations to select the area of
the image that will be scaled up.</para>
@@ -288,26 +289,179 @@
&v4l2-rect; by the coordinates of the top left corner and the rectangle
size. Both the coordinates and sizes are expressed in pixels.</para>
- <para>The crop rectangle is retrieved and set using the
- &VIDIOC-SUBDEV-G-CROP; and &VIDIOC-SUBDEV-S-CROP; ioctls. Like for pad
- formats, drivers store try and active crop rectangles. The format
- negotiation mechanism applies to crop settings as well.</para>
-
- <para>On input pads, cropping is applied relatively to the current pad
- format. The pad format represents the image size as received by the
- sub-device from the previous block in the pipeline, and the crop rectangle
- represents the sub-image that will be transmitted further inside the
- sub-device for processing. The crop rectangle be entirely containted
- inside the input image size.</para>
-
- <para>Input crop rectangle are reset to their default value when the input
- image format is modified. Drivers should use the input image size as the
- crop rectangle default value, but hardware requirements may prevent this.
- </para>
+ <para>As for pad formats, drivers store try and active
+ rectangles for the selection targets of ACTUAL type <xref
+ linkend="v4l2-subdev-selection-targets">.</xref></para>
+
+ <para>On sink pads, cropping is applied relative to the
+ current pad format. The pad format represents the image size as
+ received by the sub-device from the previous block in the
+ pipeline, and the crop rectangle represents the sub-image that
+ will be transmitted further inside the sub-device for
+ processing.</para>
+
+ <para>The scaling operation changes the size of the image by
+ scaling it to new dimensions. The scaling ratio isn't specified
+ explicitly, but is implied from the original and scaled image
+ sizes. Both sizes are represented by &v4l2-rect;.</para>
+
+ <para>Scaling support is optional. When supported by a subdev,
+ the crop rectangle on the subdev's sink pad is scaled to the
+ size configured using the &VIDIOC-SUBDEV-S-SELECTION; IOCTL
+ using <constant>V4L2_SUBDEV_SEL_COMPOSE_ACTUAL</constant>
+ selection target on the same pad. If the subdev supports scaling
+ but not composing, the top and left values are not used and must
+ always be set to zero.</para>
+
+ <para>On source pads, cropping is similar to sink pads, with the
+ exception that the source size from which the cropping is
+ performed, is the COMPOSE rectangle on the sink pad. In both
+ sink and source pads, the crop rectangle must be entirely
+ contained inside the source image size for the crop
+ operation.</para>
+
+ <para>The drivers should always use the closest possible
+ rectangle the user requests on all selection targets, unless
+ specifically told otherwise.
+ <constant>V4L2_SUBDEV_SEL_FLAG_SIZE_GE</constant> and
+ <constant>V4L2_SUBDEV_SEL_FLAG_SIZE_LE</constant> flags may be
+ used to round the image size either up or down. <xref
+ linkend="v4l2-subdev-selection-flags"></xref></para>
+ </section>
+
+ <section>
+ <title>Types of selection targets</title>
+
+ <section>
+ <title>ACTUAL targets</title>
+
+ <para>ACTUAL targets reflect the actual hardware configuration
+ at any point of time. There is a BOUNDS target
+ corresponding to every ACTUAL.</para>
+ </section>
+
+ <section>
+ <title>BOUNDS targets</title>
+
+ <para>BOUNDS targets is the smallest rectangle that contains
+ all valid ACTUAL rectangles. It may not be possible to set the
+ ACTUAL rectangle as large as the BOUNDS rectangle, however.
+ This may be because e.g. a sensor's pixel array is not
+ rectangular but cross-shaped or round. The maximum size may
+ also be smaller than the BOUNDS rectangle.</para>
+ </section>
- <para>Cropping behaviour on output pads is not defined.</para>
+ </section>
+
+ <section>
+ <title>Order of configuration and format propagation</title>
+
+ <para>Inside subdevs, the order of image processing steps will
+ always be from the sink pad towards the source pad. This is also
+ reflected in the order in which the configuration must be
+ performed by the user: the changes made will be propagated to
+ any subsequent stages. If this behaviour is not desired, the
+ user must set
+ <constant>V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG</constant> flag. This
+ flag causes no propagation of the changes are allowed in any
+ circumstances. This may also cause the accessed rectangle to be
+ adjusted by the driver, depending on the properties of the
+ underlying hardware.</para>
+
+ <para>The coordinates to a step always refer to the actual size
+ of the previous step. The exception to this rule is the source
+ compose rectangle, which refers to the sink compose bounds
+ rectangle --- if it is supported by the hardware.</para>
+
+ <orderedlist>
+ <listitem>Sink pad format. The user configures the sink pad
+ format. This format defines the parameters of the image the
+ entity receives through the pad for further processing.</listitem>
+
+ <listitem>Sink pad actual crop selection. The sink pad crop
+ defines the crop performed to the sink pad format.</listitem>
+
+ <listitem>Sink pad actual compose selection. The size of the
+ sink pad compose rectangle defines the scaling ratio compared
+ to the size of the sink pad crop rectangle. The location of
+ the compose rectangle specifies the location of the actual
+ sink compose rectangle in the sink compose bounds
+ rectangle.</listitem>
+
+ <listitem>Source pad actual crop selection. Crop on the source
+ pad defines crop performed to the image in the sink compose
+ bounds rectangle.</listitem>
+
+ <listitem>Source pad format. The source pad format defines the
+ output pixel format of the subdev, as well as the other
+ parameters with the exception of the image width and height.
+ Width and height are defined by the size of the source pad
+ actual crop selection.</listitem>
+ </orderedlist>
+
+ <para>Accessing any of the above rectangles not supported by the
+ subdev will return <constant>EINVAL</constant>. Any rectangle
+ referring to a previous unsupported rectangle coordinates will
+ instead refer to the previous supported rectangle. For example,
+ if sink crop is not supported, the compose selection will refer
+ to the sink pad format dimensions instead.</para>
+
+ <figure id="subdev-image-processing-crop">
+ <title>Image processing in subdevs: simple crop example</title>
+ <mediaobject>
+ <imageobject>
+ <imagedata fileref="subdev-image-processing-crop.svg"
+ format="SVG" scale="200" />
+ </imageobject>
+ </mediaobject>
+ </figure>
+
+ <para>In the above example, the subdev supports cropping on its
+ sink pad. To configure it, the user sets the media bus format on
+ the subdev's sink pad. Now the actual crop rectangle can be set
+ on the sink pad --- the location and size of this rectangle
+ reflect the location and size of a rectangle to be cropped from
+ the sink format. The size of the sink crop rectangle will also
+ be the size of the format of the subdev's source pad.</para>
+
+ <figure id="subdev-image-processing-scaling-multi-source">
+ <title>Image processing in subdevs: scaling with multiple sources</title>
+ <mediaobject>
+ <imageobject>
+ <imagedata fileref="subdev-image-processing-scaling-multi-source.svg"
+ format="SVG" scale="200" />
+ </imageobject>
+ </mediaobject>
+ </figure>
+
+ <para>In this example, the subdev is capable of first cropping,
+ then scaling and finally cropping for two source pads
+ individually from the resulting scaled image. The location of
+ the scaled image in the cropped image is ignored in sink compose
+ target. Both of the locations of the source crop rectangles
+ refer to the sink scaling rectangle, independently cropping an
+ area at location specified by the source crop rectangle from
+ it.</para>
+
+ <figure id="subdev-image-processing-full">
+ <title>Image processing in subdevs: scaling and composition
+ with multiple sinks and sources</title>
+ <mediaobject>
+ <imageobject>
+ <imagedata fileref="subdev-image-processing-full.svg"
+ format="SVG" scale="200" />
+ </imageobject>
+ </mediaobject>
+ </figure>
+
+ <para>The subdev driver supports two sink pads and two source
+ pads. The images from both of the sink pads are individually
+ cropped, then scaled and further composed on the composition
+ bounds rectangle. From that, two independent streams are cropped
+ and sent out of the subdev from the source pads.</para>
</section>
+
</section>
&sub-subdev-formats;
diff --git a/Documentation/DocBook/media/v4l/io.xml b/Documentation/DocBook/media/v4l/io.xml
index b815929b5bba..fd6aca2922b6 100644
--- a/Documentation/DocBook/media/v4l/io.xml
+++ b/Documentation/DocBook/media/v4l/io.xml
@@ -543,12 +543,13 @@ and can range from zero to the number of buffers allocated
with the &VIDIOC-REQBUFS; ioctl (&v4l2-requestbuffers; <structfield>count</structfield>) minus one.</entry>
</row>
<row>
- <entry>&v4l2-buf-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry></entry>
<entry>Type of the buffer, same as &v4l2-format;
<structfield>type</structfield> or &v4l2-requestbuffers;
-<structfield>type</structfield>, set by the application.</entry>
+<structfield>type</structfield>, set by the application. See <xref
+linkend="v4l2-buf-type" /></entry>
</row>
<row>
<entry>__u32</entry>
@@ -568,7 +569,7 @@ refers to an input stream, applications when an output stream.</entry>
linkend="buffer-flags" />.</entry>
</row>
<row>
- <entry>&v4l2-field;</entry>
+ <entry>__u32</entry>
<entry><structfield>field</structfield></entry>
<entry></entry>
<entry>Indicates the field order of the image in the
@@ -630,11 +631,12 @@ bandwidth. These devices identify by not enumerating any video
standards, see <xref linkend="standard" />.</para></entry>
</row>
<row>
- <entry>&v4l2-memory;</entry>
+ <entry>__u32</entry>
<entry><structfield>memory</structfield></entry>
<entry></entry>
<entry>This field must be set by applications and/or drivers
-in accordance with the selected I/O method.</entry>
+in accordance with the selected I/O method. See <xref linkend="v4l2-memory"
+ /></entry>
</row>
<row>
<entry>union</entry>
diff --git a/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml b/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml
index 3fd3ce5df270..5274c24d11e0 100644
--- a/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml
+++ b/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml
@@ -1,6 +1,6 @@
<refentry id="V4L2-PIX-FMT-NV12M">
<refmeta>
- <refentrytitle>V4L2_PIX_FMT_NV12M ('NV12M')</refentrytitle>
+ <refentrytitle>V4L2_PIX_FMT_NV12M ('NM12')</refentrytitle>
&manvol;
</refmeta>
<refnamediv>
diff --git a/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml b/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml
index 7b274092e60c..c1c62a9acc2a 100644
--- a/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml
+++ b/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml
@@ -1,4 +1,4 @@
- <refentry>
+ <refentry id="pixfmt-srggb10">
<refmeta>
<refentrytitle>V4L2_PIX_FMT_SRGGB10 ('RG10'),
V4L2_PIX_FMT_SGRBG10 ('BA10'),
diff --git a/Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml b/Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml
new file mode 100644
index 000000000000..8eace3e2e7d4
--- /dev/null
+++ b/Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml
@@ -0,0 +1,29 @@
+ <refentry id="pixfmt-srggb10dpcm8">
+ <refmeta>
+ <refentrytitle>
+ V4L2_PIX_FMT_SBGGR10DPCM8 ('bBA8'),
+ V4L2_PIX_FMT_SGBRG10DPCM8 ('bGA8'),
+ V4L2_PIX_FMT_SGRBG10DPCM8 ('BD10'),
+ V4L2_PIX_FMT_SRGGB10DPCM8 ('bRA8'),
+ </refentrytitle>
+ &manvol;
+ </refmeta>
+ <refnamediv>
+ <refname id="V4L2-PIX-FMT-SBGGR10DPCM8"><constant>V4L2_PIX_FMT_SBGGR10DPCM8</constant></refname>
+ <refname id="V4L2-PIX-FMT-SGBRG10DPCM8"><constant>V4L2_PIX_FMT_SGBRG10DPCM8</constant></refname>
+ <refname id="V4L2-PIX-FMT-SGRBG10DPCM8"><constant>V4L2_PIX_FMT_SGRBG10DPCM8</constant></refname>
+ <refname id="V4L2-PIX-FMT-SRGGB10DPCM8"><constant>V4L2_PIX_FMT_SRGGB10DPCM8</constant></refname>
+ <refpurpose>10-bit Bayer formats compressed to 8 bits</refpurpose>
+ </refnamediv>
+ <refsect1>
+ <title>Description</title>
+
+ <para>The following four pixel formats are raw sRGB / Bayer formats
+ with 10 bits per colour compressed to 8 bits each, using DPCM
+ compression. DPCM, differential pulse-code modulation, is lossy.
+ Each colour component consumes 8 bits of memory. In other respects
+ this format is similar to <xref
+ linkend="pixfmt-srggb10">.</xref></para>
+
+ </refsect1>
+ </refentry>
diff --git a/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml b/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml
index 9957863daf18..60308f1eefdf 100644
--- a/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml
+++ b/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml
@@ -1,6 +1,6 @@
<refentry id="V4L2-PIX-FMT-YUV420M">
<refmeta>
- <refentrytitle>V4L2_PIX_FMT_YUV420M ('YU12M')</refentrytitle>
+ <refentrytitle>V4L2_PIX_FMT_YUV420M ('YM12')</refentrytitle>
&manvol;
</refmeta>
<refnamediv>
diff --git a/Documentation/DocBook/media/v4l/pixfmt.xml b/Documentation/DocBook/media/v4l/pixfmt.xml
index 31eaae2469f9..f5ac15ed0549 100644
--- a/Documentation/DocBook/media/v4l/pixfmt.xml
+++ b/Documentation/DocBook/media/v4l/pixfmt.xml
@@ -673,6 +673,7 @@ access the palette, this must be done with ioctls of the Linux framebuffer API.<
&sub-srggb8;
&sub-sbggr16;
&sub-srggb10;
+ &sub-srggb10dpcm8;
&sub-srggb12;
</section>
@@ -876,11 +877,6 @@ kernel sources in the file <filename>Documentation/video4linux/cx2341x/README.hm
<entry>'S561'</entry>
<entry>Compressed GBRG Bayer format used by the gspca driver.</entry>
</row>
- <row id="V4L2-PIX-FMT-SGRBG10DPCM8">
- <entry><constant>V4L2_PIX_FMT_SGRBG10DPCM8</constant></entry>
- <entry>'DB10'</entry>
- <entry>10 bit raw Bayer DPCM compressed to 8 bits.</entry>
- </row>
<row id="V4L2-PIX-FMT-PAC207">
<entry><constant>V4L2_PIX_FMT_PAC207</constant></entry>
<entry>'P207'</entry>
diff --git a/Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia b/Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia
new file mode 100644
index 000000000000..e32ba5362e1d
--- /dev/null
+++ b/Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia
@@ -0,0 +1,614 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<dia:diagram xmlns:dia="http://www.lysator.liu.se/~alla/dia/">
+ <dia:diagramdata>
+ <dia:attribute name="background">
+ <dia:color val="#ffffff"/>
+ </dia:attribute>
+ <dia:attribute name="pagebreak">
+ <dia:color val="#000099"/>
+ </dia:attribute>
+ <dia:attribute name="paper">
+ <dia:composite type="paper">
+ <dia:attribute name="name">
+ <dia:string>#A4#</dia:string>
+ </dia:attribute>
+ <dia:attribute name="tmargin">
+ <dia:real val="2.8222000598907471"/>
+ </dia:attribute>
+ <dia:attribute name="bmargin">
+ <dia:real val="2.8222000598907471"/>
+ </dia:attribute>
+ <dia:attribute name="lmargin">
+ <dia:real val="2.8222000598907471"/>
+ </dia:attribute>
+ <dia:attribute name="rmargin">
+ <dia:real val="2.8222000598907471"/>
+ </dia:attribute>
+ <dia:attribute name="is_portrait">
+ <dia:boolean val="false"/>
+ </dia:attribute>
+ <dia:attribute name="scaling">
+ <dia:real val="0.49000000953674316"/>
+ </dia:attribute>
+ <dia:attribute name="fitto">
+ <dia:boolean val="false"/>
+ </dia:attribute>
+ </dia:composite>
+ </dia:attribute>
+ <dia:attribute name="grid">
+ <dia:composite type="grid">
+ <dia:attribute name="width_x">
+ <dia:real val="1"/>
+ </dia:attribute>
+ <dia:attribute name="width_y">
+ <dia:real val="1"/>
+ </dia:attribute>
+ <dia:attribute name="visible_x">
+ <dia:int val="1"/>
+ </dia:attribute>
+ <dia:attribute name="visible_y">
+ <dia:int val="1"/>
+ </dia:attribute>
+ <dia:composite type="color"/>
+ </dia:composite>
+ </dia:attribute>
+ <dia:attribute name="color">
+ <dia:color val="#d8e5e5"/>
+ </dia:attribute>
+ <dia:attribute name="guides">
+ <dia:composite type="guides">
+ <dia:attribute name="hguides"/>
+ <dia:attribute name="vguides"/>
+ </dia:composite>
+ </dia:attribute>
+ </dia:diagramdata>
+ <dia:layer name="Background" visible="true" active="true">
+ <dia:object type="Standard - Box" version="0" id="O0">
+ <dia:attribute name="obj_pos">
+ <dia:point val="-0.4,6.5"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="-0.45,6.45;23.1387,16.2"/>
+ </dia:attribute>
+ <dia:attribute name="elem_corner">
+ <dia:point val="-0.4,6.5"/>
+ </dia:attribute>
+ <dia:attribute name="elem_width">
+ <dia:real val="23.48871579904775"/>
+ </dia:attribute>
+ <dia:attribute name="elem_height">
+ <dia:real val="9.6500000000000004"/>
+ </dia:attribute>
+ <dia:attribute name="border_width">
+ <dia:real val="0.10000000149011612"/>
+ </dia:attribute>
+ <dia:attribute name="show_background">
+ <dia:boolean val="false"/>
+ </dia:attribute>
+ </dia:object>
+ <dia:object type="Standard - Box" version="0" id="O1">
+ <dia:attribute name="obj_pos">
+ <dia:point val="0.225,9.45"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="0.175,9.4;8.225,14.7"/>
+ </dia:attribute>
+ <dia:attribute name="elem_corner">
+ <dia:point val="0.225,9.45"/>
+ </dia:attribute>
+ <dia:attribute name="elem_width">
+ <dia:real val="7.9499999999999975"/>
+ </dia:attribute>
+ <dia:attribute name="elem_height">
+ <dia:real val="5.1999999999999975"/>
+ </dia:attribute>
+ <dia:attribute name="border_width">
+ <dia:real val="0.10000000149011612"/>
+ </dia:attribute>
+ <dia:attribute name="border_color">
+ <dia:color val="#a52a2a"/>
+ </dia:attribute>
+ <dia:attribute name="show_background">
+ <dia:boolean val="true"/>
+ </dia:attribute>
+ </dia:object>
+ <dia:object type="Standard - Box" version="0" id="O2">
+ <dia:attribute name="obj_pos">
+ <dia:point val="3.175,10.55"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="3.125,10.5;7.925,14.45"/>
+ </dia:attribute>
+ <dia:attribute name="elem_corner">
+ <dia:point val="3.175,10.55"/>
+ </dia:attribute>
+ <dia:attribute name="elem_width">
+ <dia:real val="4.6999999999999975"/>
+ </dia:attribute>
+ <dia:attribute name="elem_height">
+ <dia:real val="3.8499999999999979"/>
+ </dia:attribute>
+ <dia:attribute name="border_width">
+ <dia:real val="0.10000000149011612"/>
+ </dia:attribute>
+ <dia:attribute name="border_color">
+ <dia:color val="#0000ff"/>
+ </dia:attribute>
+ <dia:attribute name="show_background">
+ <dia:boolean val="true"/>
+ </dia:attribute>
+ </dia:object>
+ <dia:object type="Standard - Text" version="1" id="O3">
+ <dia:attribute name="obj_pos">
+ <dia:point val="3.725,11.3875"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="3.725,10.7925;6.6025,13.14"/>
+ </dia:attribute>
+ <dia:attribute name="text">
+ <dia:composite type="text">
+ <dia:attribute name="string">
+ <dia:string>#sink
+crop
+selection#</dia:string>
+ </dia:attribute>
+ <dia:attribute name="font">
+ <dia:font family="sans" style="0" name="Helvetica"/>
+ </dia:attribute>
+ <dia:attribute name="height">
+ <dia:real val="0.80000000000000004"/>
+ </dia:attribute>
+ <dia:attribute name="pos">
+ <dia:point val="3.725,11.3875"/>
+ </dia:attribute>
+ <dia:attribute name="color">
+ <dia:color val="#0000ff"/>
+ </dia:attribute>
+ <dia:attribute name="alignment">
+ <dia:enum val="0"/>
+ </dia:attribute>
+ </dia:composite>
+ </dia:attribute>
+ <dia:attribute name="valign">
+ <dia:enum val="3"/>
+ </dia:attribute>
+ </dia:object>
+ <dia:object type="Standard - Text" version="1" id="O4">
+ <dia:attribute name="obj_pos">
+ <dia:point val="1.475,7.9"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="1.475,7.305;1.475,8.0525"/>
+ </dia:attribute>
+ <dia:attribute name="text">
+ <dia:composite type="text">
+ <dia:attribute name="string">
+ <dia:string>##</dia:string>
+ </dia:attribute>
+ <dia:attribute name="font">
+ <dia:font family="sans" style="0" name="Helvetica"/>
+ </dia:attribute>
+ <dia:attribute name="height">
+ <dia:real val="0.80000000000000004"/>
+ </dia:attribute>
+ <dia:attribute name="pos">
+ <dia:point val="1.475,7.9"/>
+ </dia:attribute>
+ <dia:attribute name="color">
+ <dia:color val="#000000"/>
+ </dia:attribute>
+ <dia:attribute name="alignment">
+ <dia:enum val="0"/>
+ </dia:attribute>
+ </dia:composite>
+ </dia:attribute>
+ <dia:attribute name="valign">
+ <dia:enum val="3"/>
+ </dia:attribute>
+ </dia:object>
+ <dia:object type="Standard - Text" version="1" id="O5">
+ <dia:attribute name="obj_pos">
+ <dia:point val="0.426918,7.89569"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="0.426918,7.30069;3.90942,8.84819"/>
+ </dia:attribute>
+ <dia:attribute name="text">
+ <dia:composite type="text">
+ <dia:attribute name="string">
+ <dia:string>#sink media
+bus format#</dia:string>
+ </dia:attribute>
+ <dia:attribute name="font">
+ <dia:font family="sans" style="0" name="Helvetica"/>
+ </dia:attribute>
+ <dia:attribute name="height">
+ <dia:real val="0.80000000000000004"/>
+ </dia:attribute>
+ <dia:attribute name="pos">
+ <dia:point val="0.426918,7.89569"/>
+ </dia:attribute>
+ <dia:attribute name="color">
+ <dia:color val="#a52a2a"/>
+ </dia:attribute>
+ <dia:attribute name="alignment">
+ <dia:enum val="0"/>
+ </dia:attribute>
+ </dia:composite>
+ </dia:attribute>
+ <dia:attribute name="valign">
+ <dia:enum val="3"/>
+ </dia:attribute>
+ </dia:object>
+ <dia:object type="Standard - Text" version="1" id="O6">
+ <dia:attribute name="obj_pos">
+ <dia:point val="17.4887,7.75"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="17.4887,7.155;21.8112,8.7025"/>
+ </dia:attribute>
+ <dia:attribute name="text">
+ <dia:composite type="text">
+ <dia:attribute name="string">
+ <dia:string>#source media
+bus format#</dia:string>
+ </dia:attribute>
+ <dia:attribute name="font">
+ <dia:font family="sans" style="0" name="Helvetica"/>
+ </dia:attribute>
+ <dia:attribute name="height">
+ <dia:real val="0.80000000000000004"/>
+ </dia:attribute>
+ <dia:attribute name="pos">
+ <dia:point val="17.4887,7.75"/>
+ </dia:attribute>
+ <dia:attribute name="color">
+ <dia:color val="#8b6914"/>
+ </dia:attribute>
+ <dia:attribute name="alignment">
+ <dia:enum val="0"/>
+ </dia:attribute>
+ </dia:composite>
+ </dia:attribute>
+ <dia:attribute name="valign">
+ <dia:enum val="3"/>
+ </dia:attribute>
+ </dia:object>
+ <dia:object type="Standard - Box" version="0" id="O7">
+ <dia:attribute name="obj_pos">
+ <dia:point val="17.5244,9.5417"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="17.4744,9.4917;22.2387,13.35"/>
+ </dia:attribute>
+ <dia:attribute name="elem_corner">
+ <dia:point val="17.5244,9.5417"/>
+ </dia:attribute>
+ <dia:attribute name="elem_width">
+ <dia:real val="4.6643157990477508"/>
+ </dia:attribute>
+ <dia:attribute name="elem_height">
+ <dia:real val="3.758300000000002"/>
+ </dia:attribute>
+ <dia:attribute name="border_width">
+ <dia:real val="0.10000000149011612"/>
+ </dia:attribute>
+ <dia:attribute name="border_color">
+ <dia:color val="#8b6914"/>
+ </dia:attribute>
+ <dia:attribute name="show_background">
+ <dia:boolean val="true"/>
+ </dia:attribute>
+ </dia:object>
+ <dia:object type="Standard - Line" version="0" id="O8">
+ <dia:attribute name="obj_pos">
+ <dia:point val="17.5244,13.3"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="3.12132,13.2463;17.5781,14.4537"/>
+ </dia:attribute>
+ <dia:attribute name="conn_endpoints">
+ <dia:point val="17.5244,13.3"/>
+ <dia:point val="3.175,14.4"/>
+ </dia:attribute>
+ <dia:attribute name="numcp">
+ <dia:int val="1"/>
+ </dia:attribute>
+ <dia:attribute name="line_color">
+ <dia:color val="#e60505"/>
+ </dia:attribute>
+ <dia:attribute name="line_style">
+ <dia:enum val="4"/>
+ </dia:attribute>
+ <dia:connections>
+ <dia:connection handle="0" to="O7" connection="5"/>
+ <dia:connection handle="1" to="O2" connection="5"/>
+ </dia:connections>
+ </dia:object>
+ <dia:object type="Standard - Line" version="0" id="O9">
+ <dia:attribute name="obj_pos">
+ <dia:point val="17.5244,9.5417"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="3.12162,9.48832;17.5778,10.6034"/>
+ </dia:attribute>
+ <dia:attribute name="conn_endpoints">
+ <dia:point val="17.5244,9.5417"/>
+ <dia:point val="3.175,10.55"/>
+ </dia:attribute>
+ <dia:attribute name="numcp">
+ <dia:int val="1"/>
+ </dia:attribute>
+ <dia:attribute name="line_color">
+ <dia:color val="#e60505"/>
+ </dia:attribute>
+ <dia:attribute name="line_style">
+ <dia:enum val="4"/>
+ </dia:attribute>
+ <dia:connections>
+ <dia:connection handle="0" to="O7" connection="0"/>
+ <dia:connection handle="1" to="O2" connection="0"/>
+ </dia:connections>
+ </dia:object>
+ <dia:object type="Standard - Line" version="0" id="O10">
+ <dia:attribute name="obj_pos">
+ <dia:point val="22.1887,13.3"/>
+ </dia:attribute>
+ <dia:attribute name="obj_bb">
+ <dia:rectangle val="7.82132,13.2463;22.2424,14.4537"/>
+ </dia:attribute>
+ <dia:attribute name="conn_endpoints">
+ <dia:point val="22.1887,13.3"/>
+ <dia:point val="7.875,14.4"/>
+ </dia:attribute>
+ <dia:attribute name="numcp">
+ <dia:int val="1"/>
+ </dia:attribute>
+ <dia:attribute name="line_color">
+ <dia:color val="#e60505"/>
+ </dia:attribute>
+ <dia:attribute name="line_style">
+ <dia:enum val="4"/>
+ </dia:attribute>
+ <dia:connections>
+ <dia:connection handle="0" to="O7" connection="7"/>
+ <dia:connection handle="1" to="O2" connection="7"/>
+ </dia:connections>
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+ <ellipse style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" cx="805.6" cy="384.084" rx="8.5" ry="8.5"/>
+ <ellipse style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" cx="805.6" cy="384.084" rx="8.5" ry="8.5"/>
+ </g>
+ <g>
+ <line style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x1="814.1" y1="384.084" x2="970.434" y2="384.112"/>
+ <polygon style="fill: #000000" points="977.934,384.114 967.933,389.112 970.434,384.112 967.935,379.112 "/>
+ <polygon style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" points="977.934,384.114 967.933,389.112 970.434,384.112 967.935,379.112 "/>
+ </g>
+ <text style="fill: #000000;text-anchor:start;font-size:12.8;font-family:sanserif;font-style:normal;font-weight:normal" x="839.408" y="373.9">
+ <tspan x="839.408" y="373.9">pad 2 (source)</tspan>
+ </text>
+ <g>
+ <line style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #a020f0" x1="546" y1="191" x2="492.157" y2="198.263"/>
+ <polygon style="fill: #a020f0" points="484.724,199.266 493.966,192.974 492.157,198.263 495.303,202.884 "/>
+ <polygon style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #a020f0" points="484.724,199.266 493.966,192.974 492.157,198.263 495.303,202.884 "/>
+ </g>
+ <g>
+ <line style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #a020f0" x1="546.908" y1="190.725" x2="495.383" y2="268.548"/>
+ <polygon style="fill: #a020f0" points="491.242,274.802 492.594,263.703 495.383,268.548 500.932,269.224 "/>
+ <polygon style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #a020f0" points="491.242,274.802 492.594,263.703 495.383,268.548 500.932,269.224 "/>
+ </g>
+</svg>
diff --git a/Documentation/DocBook/media/v4l/v4l2.xml b/Documentation/DocBook/media/v4l/v4l2.xml
index 8ae38876172e..015c561754b7 100644
--- a/Documentation/DocBook/media/v4l/v4l2.xml
+++ b/Documentation/DocBook/media/v4l/v4l2.xml
@@ -28,8 +28,8 @@ documentation.</contrib>
<firstname>Hans</firstname>
<surname>Verkuil</surname>
<contrib>Designed and documented the VIDIOC_LOG_STATUS ioctl,
-the extended control ioctls and major parts of the sliced VBI
-API.</contrib>
+the extended control ioctls, major parts of the sliced VBI API, the
+MPEG encoder and decoder APIs and the DV Timings API.</contrib>
<affiliation>
<address>
<email>hverkuil@xs4all.nl</email>
@@ -96,6 +96,17 @@ Remote Controller chapter.</contrib>
</address>
</affiliation>
</author>
+
+ <author>
+ <firstname>Sakari</firstname>
+ <surname>Ailus</surname>
+ <contrib>Subdev selections API.</contrib>
+ <affiliation>
+ <address>
+ <email>sakari.ailus@iki.fi</email>
+ </address>
+ </affiliation>
+ </author>
</authorgroup>
<copyright>
@@ -112,6 +123,7 @@ Remote Controller chapter.</contrib>
<year>2009</year>
<year>2010</year>
<year>2011</year>
+ <year>2012</year>
<holder>Bill Dirks, Michael H. Schimek, Hans Verkuil, Martin
Rubli, Andy Walls, Muralidharan Karicheri, Mauro Carvalho Chehab,
Pawel Osciak</holder>
@@ -128,6 +140,28 @@ structs, ioctls) must be noted in more detail in the history chapter
applications. -->
<revision>
+ <revnumber>3.5</revnumber>
+ <date>2012-05-07</date>
+ <authorinitials>sa, sn</authorinitials>
+ <revremark>Added V4L2_CTRL_TYPE_INTEGER_MENU and V4L2 subdev
+ selections API. Improved the description of V4L2_CID_COLORFX
+ control, added V4L2_CID_COLORFX_CBCR control.
+ Added camera controls V4L2_CID_AUTO_EXPOSURE_BIAS,
+ V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE, V4L2_CID_IMAGE_STABILIZATION,
+ V4L2_CID_ISO_SENSITIVITY, V4L2_CID_ISO_SENSITIVITY_AUTO,
+ V4L2_CID_EXPOSURE_METERING, V4L2_CID_SCENE_MODE,
+ V4L2_CID_3A_LOCK, V4L2_CID_AUTO_FOCUS_START,
+ V4L2_CID_AUTO_FOCUS_STOP, V4L2_CID_AUTO_FOCUS_STATUS
+ and V4L2_CID_AUTO_FOCUS_RANGE.
+ </revremark>
+ <date>2012-05-01</date>
+ <authorinitials>hv</authorinitials>
+ <revremark>Added VIDIOC_ENUM_DV_TIMINGS, VIDIOC_QUERY_DV_TIMINGS and
+ VIDIOC_DV_TIMINGS_CAP.
+ </revremark>
+ </revision>
+
+ <revision>
<revnumber>3.4</revnumber>
<date>2012-01-25</date>
<authorinitials>sn</authorinitials>
@@ -433,7 +467,7 @@ and discussions on the V4L mailing list.</revremark>
</partinfo>
<title>Video for Linux Two API Specification</title>
- <subtitle>Revision 3.3</subtitle>
+ <subtitle>Revision 3.5</subtitle>
<chapter id="common">
&sub-common;
@@ -491,10 +525,12 @@ and discussions on the V4L mailing list.</revremark>
&sub-dbg-g-register;
&sub-decoder-cmd;
&sub-dqevent;
+ &sub-dv-timings-cap;
&sub-encoder-cmd;
&sub-enumaudio;
&sub-enumaudioout;
&sub-enum-dv-presets;
+ &sub-enum-dv-timings;
&sub-enum-fmt;
&sub-enum-framesizes;
&sub-enum-frameintervals;
@@ -529,6 +565,7 @@ and discussions on the V4L mailing list.</revremark>
&sub-querycap;
&sub-queryctrl;
&sub-query-dv-preset;
+ &sub-query-dv-timings;
&sub-querystd;
&sub-prepare-buf;
&sub-reqbufs;
@@ -540,6 +577,7 @@ and discussions on the V4L mailing list.</revremark>
&sub-subdev-g-crop;
&sub-subdev-g-fmt;
&sub-subdev-g-frame-interval;
+ &sub-subdev-g-selection;
&sub-subscribe-event;
<!-- End of ioctls. -->
&sub-mmap;
diff --git a/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml b/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml
index 73ae8a6cd004..765549ff8a71 100644
--- a/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml
@@ -48,6 +48,12 @@
<refsect1>
<title>Description</title>
+ <note>
+ <title>Experimental</title>
+ <para>This is an <link linkend="experimental"> experimental </link>
+ interface and may change in the future.</para>
+ </note>
+
<para>This ioctl is used to create buffers for <link linkend="mmap">memory
mapped</link> or <link linkend="userp">user pointer</link>
I/O. It can be used as an alternative or in addition to the
@@ -94,16 +100,18 @@ information.</para>
<entry>The number of buffers requested or granted.</entry>
</row>
<row>
- <entry>&v4l2-memory;</entry>
+ <entry>__u32</entry>
<entry><structfield>memory</structfield></entry>
<entry>Applications set this field to
<constant>V4L2_MEMORY_MMAP</constant> or
-<constant>V4L2_MEMORY_USERPTR</constant>.</entry>
+<constant>V4L2_MEMORY_USERPTR</constant>. See <xref linkend="v4l2-memory"
+/></entry>
</row>
<row>
- <entry>&v4l2-format;</entry>
+ <entry>__u32</entry>
<entry><structfield>format</structfield></entry>
- <entry>Filled in by the application, preserved by the driver.</entry>
+ <entry>Filled in by the application, preserved by the driver.
+ See <xref linkend="v4l2-format" />.</entry>
</row>
<row>
<entry>__u32</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-cropcap.xml b/Documentation/DocBook/media/v4l/vidioc-cropcap.xml
index b4f2f255211e..f1bac2c6e978 100644
--- a/Documentation/DocBook/media/v4l/vidioc-cropcap.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-cropcap.xml
@@ -65,7 +65,7 @@ output.</para>
&cs-str;
<tbody valign="top">
<row>
- <entry>&v4l2-buf-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry>Type of the data stream, set by the application.
Only these types are valid here:
@@ -73,7 +73,7 @@ Only these types are valid here:
<constant>V4L2_BUF_TYPE_VIDEO_OUTPUT</constant>,
<constant>V4L2_BUF_TYPE_VIDEO_OVERLAY</constant>, and custom (driver
defined) types with code <constant>V4L2_BUF_TYPE_PRIVATE</constant>
-and higher.</entry>
+and higher. See <xref linkend="v4l2-buf-type" />.</entry>
</row>
<row>
<entry>struct <link linkend="v4l2-rect-crop">v4l2_rect</link></entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml b/Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml
new file mode 100644
index 000000000000..6673ce582050
--- /dev/null
+++ b/Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml
@@ -0,0 +1,211 @@
+<refentry id="vidioc-dv-timings-cap">
+ <refmeta>
+ <refentrytitle>ioctl VIDIOC_DV_TIMINGS_CAP</refentrytitle>
+ &manvol;
+ </refmeta>
+
+ <refnamediv>
+ <refname>VIDIOC_DV_TIMINGS_CAP</refname>
+ <refpurpose>The capabilities of the Digital Video receiver/transmitter</refpurpose>
+ </refnamediv>
+
+ <refsynopsisdiv>
+ <funcsynopsis>
+ <funcprototype>
+ <funcdef>int <function>ioctl</function></funcdef>
+ <paramdef>int <parameter>fd</parameter></paramdef>
+ <paramdef>int <parameter>request</parameter></paramdef>
+ <paramdef>struct v4l2_dv_timings_cap *<parameter>argp</parameter></paramdef>
+ </funcprototype>
+ </funcsynopsis>
+ </refsynopsisdiv>
+
+ <refsect1>
+ <title>Arguments</title>
+
+ <variablelist>
+ <varlistentry>
+ <term><parameter>fd</parameter></term>
+ <listitem>
+ <para>&fd;</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><parameter>request</parameter></term>
+ <listitem>
+ <para>VIDIOC_DV_TIMINGS_CAP</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><parameter>argp</parameter></term>
+ <listitem>
+ <para></para>
+ </listitem>
+ </varlistentry>
+ </variablelist>
+ </refsect1>
+
+ <refsect1>
+ <title>Description</title>
+
+ <note>
+ <title>Experimental</title>
+ <para>This is an <link linkend="experimental"> experimental </link>
+ interface and may change in the future.</para>
+ </note>
+
+ <para>To query the available timings, applications initialize the
+<structfield>index</structfield> field and zero the reserved array of &v4l2-dv-timings-cap;
+and call the <constant>VIDIOC_DV_TIMINGS_CAP</constant> ioctl with a pointer to this
+structure. Drivers fill the rest of the structure or return an
+&EINVAL; when the index is out of bounds. To enumerate all supported DV timings,
+applications shall begin at index zero, incrementing by one until the
+driver returns <errorcode>EINVAL</errorcode>. Note that drivers may enumerate a
+different set of DV timings after switching the video input or
+output.</para>
+
+ <table pgwide="1" frame="none" id="v4l2-bt-timings-cap">
+ <title>struct <structname>v4l2_bt_timings_cap</structname></title>
+ <tgroup cols="3">
+ &cs-str;
+ <tbody valign="top">
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>min_width</structfield></entry>
+ <entry>Minimum width of the active video in pixels.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>max_width</structfield></entry>
+ <entry>Maximum width of the active video in pixels.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>min_height</structfield></entry>
+ <entry>Minimum height of the active video in lines.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>max_height</structfield></entry>
+ <entry>Maximum height of the active video in lines.</entry>
+ </row>
+ <row>
+ <entry>__u64</entry>
+ <entry><structfield>min_pixelclock</structfield></entry>
+ <entry>Minimum pixelclock frequency in Hz.</entry>
+ </row>
+ <row>
+ <entry>__u64</entry>
+ <entry><structfield>max_pixelclock</structfield></entry>
+ <entry>Maximum pixelclock frequency in Hz.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>standards</structfield></entry>
+ <entry>The video standard(s) supported by the hardware.
+ See <xref linkend="dv-bt-standards"/> for a list of standards.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>capabilities</structfield></entry>
+ <entry>Several flags giving more information about the capabilities.
+ See <xref linkend="dv-bt-cap-capabilities"/> for a description of the flags.
+ </entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>reserved</structfield>[16]</entry>
+ <entry></entry>
+ </row>
+ </tbody>
+ </tgroup>
+ </table>
+
+ <table pgwide="1" frame="none" id="v4l2-dv-timings-cap">
+ <title>struct <structname>v4l2_dv_timings_cap</structname></title>
+ <tgroup cols="4">
+ &cs-str;
+ <tbody valign="top">
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>type</structfield></entry>
+ <entry>Type of DV timings as listed in <xref linkend="dv-timing-types"/>.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>reserved</structfield>[3]</entry>
+ <entry>Reserved for future extensions. Drivers must set the array to zero.</entry>
+ </row>
+ <row>
+ <entry>union</entry>
+ <entry><structfield></structfield></entry>
+ <entry></entry>
+ </row>
+ <row>
+ <entry></entry>
+ <entry>&v4l2-bt-timings-cap;</entry>
+ <entry><structfield>bt</structfield></entry>
+ <entry>BT.656/1120 timings capabilities of the hardware.</entry>
+ </row>
+ <row>
+ <entry></entry>
+ <entry>__u32</entry>
+ <entry><structfield>raw_data</structfield>[32]</entry>
+ <entry></entry>
+ </row>
+ </tbody>
+ </tgroup>
+ </table>
+
+ <table pgwide="1" frame="none" id="dv-bt-cap-capabilities">
+ <title>DV BT Timing capabilities</title>
+ <tgroup cols="2">
+ &cs-str;
+ <tbody valign="top">
+ <row>
+ <entry>Flag</entry>
+ <entry>Description</entry>
+ </row>
+ <row>
+ <entry></entry>
+ <entry></entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_BT_CAP_INTERLACED</entry>
+ <entry>Interlaced formats are supported.
+ </entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_BT_CAP_PROGRESSIVE</entry>
+ <entry>Progressive formats are supported.
+ </entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_BT_CAP_REDUCED_BLANKING</entry>
+ <entry>CVT/GTF specific: the timings can make use of reduced blanking (CVT)
+or the 'Secondary GTF' curve (GTF).
+ </entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_BT_CAP_CUSTOM</entry>
+ <entry>Can support non-standard timings, i.e. timings not belonging to the
+standards set in the <structfield>standards</structfield> field.
+ </entry>
+ </row>
+ </tbody>
+ </tgroup>
+ </table>
+ </refsect1>
+
+ <refsect1>
+ &return-value;
+ </refsect1>
+</refentry>
+
+<!--
+Local Variables:
+mode: sgml
+sgml-parent-document: "v4l2.sgml"
+indent-tabs-mode: nil
+End:
+-->
diff --git a/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml b/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml
index 0be17c232d3a..509f0012d2a6 100644
--- a/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml
@@ -48,6 +48,10 @@
<refsect1>
<title>Description</title>
+ <para>This ioctl is <emphasis role="bold">deprecated</emphasis>.
+ New drivers and applications should use &VIDIOC-ENUM-DV-TIMINGS; instead.
+ </para>
+
<para>To query the attributes of a DV preset, applications initialize the
<structfield>index</structfield> field and zero the reserved array of &v4l2-dv-enum-preset;
and call the <constant>VIDIOC_ENUM_DV_PRESETS</constant> ioctl with a pointer to this
diff --git a/Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml
new file mode 100644
index 000000000000..24c3bf4fd29a
--- /dev/null
+++ b/Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml
@@ -0,0 +1,119 @@
+<refentry id="vidioc-enum-dv-timings">
+ <refmeta>
+ <refentrytitle>ioctl VIDIOC_ENUM_DV_TIMINGS</refentrytitle>
+ &manvol;
+ </refmeta>
+
+ <refnamediv>
+ <refname>VIDIOC_ENUM_DV_TIMINGS</refname>
+ <refpurpose>Enumerate supported Digital Video timings</refpurpose>
+ </refnamediv>
+
+ <refsynopsisdiv>
+ <funcsynopsis>
+ <funcprototype>
+ <funcdef>int <function>ioctl</function></funcdef>
+ <paramdef>int <parameter>fd</parameter></paramdef>
+ <paramdef>int <parameter>request</parameter></paramdef>
+ <paramdef>struct v4l2_enum_dv_timings *<parameter>argp</parameter></paramdef>
+ </funcprototype>
+ </funcsynopsis>
+ </refsynopsisdiv>
+
+ <refsect1>
+ <title>Arguments</title>
+
+ <variablelist>
+ <varlistentry>
+ <term><parameter>fd</parameter></term>
+ <listitem>
+ <para>&fd;</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><parameter>request</parameter></term>
+ <listitem>
+ <para>VIDIOC_ENUM_DV_TIMINGS</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><parameter>argp</parameter></term>
+ <listitem>
+ <para></para>
+ </listitem>
+ </varlistentry>
+ </variablelist>
+ </refsect1>
+
+ <refsect1>
+ <title>Description</title>
+
+ <note>
+ <title>Experimental</title>
+ <para>This is an <link linkend="experimental"> experimental </link>
+ interface and may change in the future.</para>
+ </note>
+
+ <para>While some DV receivers or transmitters support a wide range of timings, others
+support only a limited number of timings. With this ioctl applications can enumerate a list
+of known supported timings. Call &VIDIOC-DV-TIMINGS-CAP; to check if it also supports other
+standards or even custom timings that are not in this list.</para>
+
+ <para>To query the available timings, applications initialize the
+<structfield>index</structfield> field and zero the reserved array of &v4l2-enum-dv-timings;
+and call the <constant>VIDIOC_ENUM_DV_TIMINGS</constant> ioctl with a pointer to this
+structure. Drivers fill the rest of the structure or return an
+&EINVAL; when the index is out of bounds. To enumerate all supported DV timings,
+applications shall begin at index zero, incrementing by one until the
+driver returns <errorcode>EINVAL</errorcode>. Note that drivers may enumerate a
+different set of DV timings after switching the video input or
+output.</para>
+
+ <table pgwide="1" frame="none" id="v4l2-enum-dv-timings">
+ <title>struct <structname>v4l2_enum_dv_timings</structname></title>
+ <tgroup cols="3">
+ &cs-str;
+ <tbody valign="top">
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>index</structfield></entry>
+ <entry>Number of the DV timings, set by the
+application.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>reserved</structfield>[3]</entry>
+ <entry>Reserved for future extensions. Drivers must set the array to zero.</entry>
+ </row>
+ <row>
+ <entry>&v4l2-dv-timings;</entry>
+ <entry><structfield>timings</structfield></entry>
+ <entry>The timings.</entry>
+ </row>
+ </tbody>
+ </tgroup>
+ </table>
+ </refsect1>
+
+ <refsect1>
+ &return-value;
+
+ <variablelist>
+ <varlistentry>
+ <term><errorcode>EINVAL</errorcode></term>
+ <listitem>
+ <para>The &v4l2-enum-dv-timings; <structfield>index</structfield>
+is out of bounds.</para>
+ </listitem>
+ </varlistentry>
+ </variablelist>
+ </refsect1>
+</refentry>
+
+<!--
+Local Variables:
+mode: sgml
+sgml-parent-document: "v4l2.sgml"
+indent-tabs-mode: nil
+End:
+-->
diff --git a/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml b/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml
index 347d142e7431..81ebe48317fe 100644
--- a/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml
@@ -71,7 +71,7 @@ the application. This is in no way related to the <structfield>
pixelformat</structfield> field.</entry>
</row>
<row>
- <entry>&v4l2-buf-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry>Type of the data stream, set by the application.
Only these types are valid here:
@@ -81,7 +81,7 @@ Only these types are valid here:
<constant>V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE</constant>,
<constant>V4L2_BUF_TYPE_VIDEO_OVERLAY</constant>, and custom (driver
defined) types with code <constant>V4L2_BUF_TYPE_PRIVATE</constant>
-and higher.</entry>
+and higher. See <xref linkend="v4l2-buf-type" />.</entry>
</row>
<row>
<entry>__u32</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-enuminput.xml b/Documentation/DocBook/media/v4l/vidioc-enuminput.xml
index 9b8efcd6e947..46d5a044a537 100644
--- a/Documentation/DocBook/media/v4l/vidioc-enuminput.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-enuminput.xml
@@ -285,7 +285,7 @@ input/output interface to linux-media@vger.kernel.org on 19 Oct 2009.
<row>
<entry><constant>V4L2_IN_CAP_CUSTOM_TIMINGS</constant></entry>
<entry>0x00000002</entry>
- <entry>This input supports setting custom video timings by using VIDIOC_S_DV_TIMINGS.</entry>
+ <entry>This input supports setting video timings by using VIDIOC_S_DV_TIMINGS.</entry>
</row>
<row>
<entry><constant>V4L2_IN_CAP_STD</constant></entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml b/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml
index a64d5ef103fa..428020000ef0 100644
--- a/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml
@@ -170,7 +170,7 @@ input/output interface to linux-media@vger.kernel.org on 19 Oct 2009.
<row>
<entry><constant>V4L2_OUT_CAP_CUSTOM_TIMINGS</constant></entry>
<entry>0x00000002</entry>
- <entry>This output supports setting custom video timings by using VIDIOC_S_DV_TIMINGS.</entry>
+ <entry>This output supports setting video timings by using VIDIOC_S_DV_TIMINGS.</entry>
</row>
<row>
<entry><constant>V4L2_OUT_CAP_STD</constant></entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-crop.xml b/Documentation/DocBook/media/v4l/vidioc-g-crop.xml
index 01a50640dce0..c4ff3b1887fb 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-crop.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-crop.xml
@@ -100,14 +100,14 @@ changed and <constant>VIDIOC_S_CROP</constant> returns the
&cs-str;
<tbody valign="top">
<row>
- <entry>&v4l2-buf-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry>Type of the data stream, set by the application.
Only these types are valid here: <constant>V4L2_BUF_TYPE_VIDEO_CAPTURE</constant>,
<constant>V4L2_BUF_TYPE_VIDEO_OUTPUT</constant>,
<constant>V4L2_BUF_TYPE_VIDEO_OVERLAY</constant>, and custom (driver
defined) types with code <constant>V4L2_BUF_TYPE_PRIVATE</constant>
-and higher.</entry>
+and higher. See <xref linkend="v4l2-buf-type" />.</entry>
</row>
<row>
<entry>&v4l2-rect;</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml b/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml
index 7940c1149393..61be9fa3803a 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml
@@ -48,6 +48,12 @@
<refsect1>
<title>Description</title>
+
+ <para>These ioctls are <emphasis role="bold">deprecated</emphasis>.
+ New drivers and applications should use &VIDIOC-G-DV-TIMINGS; and &VIDIOC-S-DV-TIMINGS;
+ instead.
+ </para>
+
<para>To query and select the current DV preset, applications
use the <constant>VIDIOC_G_DV_PRESET</constant> and <constant>VIDIOC_S_DV_PRESET</constant>
ioctls which take a pointer to a &v4l2-dv-preset; type as argument.
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml
index 4a8648ae9a63..eda1a2991bbe 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml
@@ -7,7 +7,7 @@
<refnamediv>
<refname>VIDIOC_G_DV_TIMINGS</refname>
<refname>VIDIOC_S_DV_TIMINGS</refname>
- <refpurpose>Get or set custom DV timings for input or output</refpurpose>
+ <refpurpose>Get or set DV timings for input or output</refpurpose>
</refnamediv>
<refsynopsisdiv>
@@ -48,12 +48,15 @@
<refsect1>
<title>Description</title>
- <para>To set custom DV timings for the input or output, applications use the
-<constant>VIDIOC_S_DV_TIMINGS</constant> ioctl and to get the current custom timings,
+ <para>To set DV timings for the input or output, applications use the
+<constant>VIDIOC_S_DV_TIMINGS</constant> ioctl and to get the current timings,
applications use the <constant>VIDIOC_G_DV_TIMINGS</constant> ioctl. The detailed timing
information is filled in using the structure &v4l2-dv-timings;. These ioctls take
a pointer to the &v4l2-dv-timings; structure as argument. If the ioctl is not supported
or the timing values are not correct, the driver returns &EINVAL;.</para>
+<para>The <filename>linux/v4l2-dv-timings.h</filename> header can be used to get the
+timings of the formats in the <xref linkend="cea861" /> and <xref linkend="vesadmt" />
+standards.</para>
</refsect1>
<refsect1>
@@ -83,12 +86,13 @@ or the timing values are not correct, the driver returns &EINVAL;.</para>
<row>
<entry>__u32</entry>
<entry><structfield>width</structfield></entry>
- <entry>Width of the active video in pixels</entry>
+ <entry>Width of the active video in pixels.</entry>
</row>
<row>
<entry>__u32</entry>
<entry><structfield>height</structfield></entry>
- <entry>Height of the active video in lines</entry>
+ <entry>Height of the active video frame in lines. So for interlaced formats the
+ height of the active video in each field is <structfield>height</structfield>/2.</entry>
</row>
<row>
<entry>__u32</entry>
@@ -125,32 +129,52 @@ bit 0 (V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit 1 (V4L2_DV_H
<row>
<entry>__u32</entry>
<entry><structfield>vfrontporch</structfield></entry>
- <entry>Vertical front porch in lines</entry>
+ <entry>Vertical front porch in lines. For interlaced formats this refers to the
+ odd field (aka field 1).</entry>
</row>
<row>
<entry>__u32</entry>
<entry><structfield>vsync</structfield></entry>
- <entry>Vertical sync length in lines</entry>
+ <entry>Vertical sync length in lines. For interlaced formats this refers to the
+ odd field (aka field 1).</entry>
</row>
<row>
<entry>__u32</entry>
<entry><structfield>vbackporch</structfield></entry>
- <entry>Vertical back porch in lines</entry>
+ <entry>Vertical back porch in lines. For interlaced formats this refers to the
+ odd field (aka field 1).</entry>
</row>
<row>
<entry>__u32</entry>
<entry><structfield>il_vfrontporch</structfield></entry>
- <entry>Vertical front porch in lines for bottom field of interlaced field formats</entry>
+ <entry>Vertical front porch in lines for the even field (aka field 2) of
+ interlaced field formats.</entry>
</row>
<row>
<entry>__u32</entry>
<entry><structfield>il_vsync</structfield></entry>
- <entry>Vertical sync length in lines for bottom field of interlaced field formats</entry>
+ <entry>Vertical sync length in lines for the even field (aka field 2) of
+ interlaced field formats.</entry>
</row>
<row>
<entry>__u32</entry>
<entry><structfield>il_vbackporch</structfield></entry>
- <entry>Vertical back porch in lines for bottom field of interlaced field formats</entry>
+ <entry>Vertical back porch in lines for the even field (aka field 2) of
+ interlaced field formats.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>standards</structfield></entry>
+ <entry>The video standard(s) this format belongs to. This will be filled in by
+ the driver. Applications must set this to 0. See <xref linkend="dv-bt-standards"/>
+ for a list of standards.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>flags</structfield></entry>
+ <entry>Several flags giving more information about the format.
+ See <xref linkend="dv-bt-flags"/> for a description of the flags.
+ </entry>
</row>
</tbody>
</tgroup>
@@ -211,6 +235,90 @@ bit 0 (V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit 1 (V4L2_DV_H
</tbody>
</tgroup>
</table>
+ <table pgwide="1" frame="none" id="dv-bt-standards">
+ <title>DV BT Timing standards</title>
+ <tgroup cols="2">
+ &cs-str;
+ <tbody valign="top">
+ <row>
+ <entry>Timing standard</entry>
+ <entry>Description</entry>
+ </row>
+ <row>
+ <entry></entry>
+ <entry></entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_BT_STD_CEA861</entry>
+ <entry>The timings follow the CEA-861 Digital TV Profile standard</entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_BT_STD_DMT</entry>
+ <entry>The timings follow the VESA Discrete Monitor Timings standard</entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_BT_STD_CVT</entry>
+ <entry>The timings follow the VESA Coordinated Video Timings standard</entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_BT_STD_GTF</entry>
+ <entry>The timings follow the VESA Generalized Timings Formula standard</entry>
+ </row>
+ </tbody>
+ </tgroup>
+ </table>
+ <table pgwide="1" frame="none" id="dv-bt-flags">
+ <title>DV BT Timing flags</title>
+ <tgroup cols="2">
+ &cs-str;
+ <tbody valign="top">
+ <row>
+ <entry>Flag</entry>
+ <entry>Description</entry>
+ </row>
+ <row>
+ <entry></entry>
+ <entry></entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_FL_REDUCED_BLANKING</entry>
+ <entry>CVT/GTF specific: the timings use reduced blanking (CVT) or the 'Secondary
+GTF' curve (GTF). In both cases the horizontal and/or vertical blanking
+intervals are reduced, allowing a higher resolution over the same
+bandwidth. This is a read-only flag, applications must not set this.
+ </entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_FL_CAN_REDUCE_FPS</entry>
+ <entry>CEA-861 specific: set for CEA-861 formats with a framerate that is a multiple
+of six. These formats can be optionally played at 1 / 1.001 speed to
+be compatible with 60 Hz based standards such as NTSC and PAL-M that use a framerate of
+29.97 frames per second. If the transmitter can't generate such frequencies, then the
+flag will also be cleared. This is a read-only flag, applications must not set this.
+ </entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_FL_REDUCED_FPS</entry>
+ <entry>CEA-861 specific: only valid for video transmitters, the flag is cleared
+by receivers. It is also only valid for formats with the V4L2_DV_FL_CAN_REDUCE_FPS flag
+set, for other formats the flag will be cleared by the driver.
+
+If the application sets this flag, then the pixelclock used to set up the transmitter is
+divided by 1.001 to make it compatible with NTSC framerates. If the transmitter
+can't generate such frequencies, then the flag will also be cleared.
+ </entry>
+ </row>
+ <row>
+ <entry>V4L2_DV_FL_HALF_LINE</entry>
+ <entry>Specific to interlaced formats: if set, then field 1 (aka the odd field)
+is really one half-line longer and field 2 (aka the even field) is really one half-line
+shorter, so each field has exactly the same number of half-lines. Whether half-lines can be
+detected or used depends on the hardware.
+ </entry>
+ </row>
+ </tbody>
+ </tgroup>
+ </table>
</refsect1>
<refsect1>
&return-value;
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml b/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml
index b17a7aac6997..e3d5afcdafbb 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml
@@ -265,6 +265,32 @@ These controls are described in <xref
These controls are described in <xref
linkend="flash-controls" />.</entry>
</row>
+ <row>
+ <entry><constant>V4L2_CTRL_CLASS_JPEG</constant></entry>
+ <entry>0x9d0000</entry>
+ <entry>The class containing JPEG compression controls.
+These controls are described in <xref
+ linkend="jpeg-controls" />.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_CTRL_CLASS_IMAGE_SOURCE</constant></entry>
+ <entry>0x9e0000</entry> <entry>The class containing image
+ source controls. These controls are described in <xref
+ linkend="image-source-controls" />.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_CTRL_CLASS_IMAGE_PROC</constant></entry>
+ <entry>0x9f0000</entry> <entry>The class containing image
+ processing controls. These controls are described in <xref
+ linkend="image-process-controls" />.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_CTRL_CLASS_JPEG</constant></entry>
+ <entry>0x9d0000</entry>
+ <entry>The class containing JPEG compression controls.
+These controls are described in <xref
+ linkend="jpeg-controls" />.</entry>
+ </row>
</tbody>
</tgroup>
</table>
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml b/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml
index 17fbda15137b..52acff193a6f 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml
@@ -116,7 +116,7 @@ this ioctl.</para>
<colspec colname="c4" />
<tbody valign="top">
<row>
- <entry>&v4l2-buf-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry></entry>
<entry>Type of the data stream, see <xref
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml b/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml
index 66e9a5257861..69c178a4d205 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml
@@ -95,14 +95,14 @@ the &v4l2-output; <structfield>modulator</structfield> field and the
&v4l2-modulator; <structfield>index</structfield> field.</entry>
</row>
<row>
- <entry>&v4l2-tuner-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry>The tuner type. This is the same value as in the
-&v4l2-tuner; <structfield>type</structfield> field. The type must be set
+&v4l2-tuner; <structfield>type</structfield> field. See The type must be set
to <constant>V4L2_TUNER_RADIO</constant> for <filename>/dev/radioX</filename>
device nodes, and to <constant>V4L2_TUNER_ANALOG_TV</constant>
for all others. The field is not applicable to modulators, &ie; ignored
-by drivers.</entry>
+by drivers. See <xref linkend="v4l2-tuner-type" /></entry>
</row>
<row>
<entry>__u32</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-parm.xml b/Documentation/DocBook/media/v4l/vidioc-g-parm.xml
index 19b1d85dd668..f83d2cdd1185 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-parm.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-parm.xml
@@ -75,11 +75,12 @@ devices.</para>
&cs-ustr;
<tbody valign="top">
<row>
- <entry>&v4l2-buf-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry></entry>
<entry>The buffer (stream) type, same as &v4l2-format;
-<structfield>type</structfield>, set by the application.</entry>
+<structfield>type</structfield>, set by the application. See <xref
+ linkend="v4l2-buf-type" /></entry>
</row>
<row>
<entry>union</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml b/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml
index 71741daaf725..bd015d1563ff 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml
@@ -148,7 +148,7 @@ using the &VIDIOC-S-FMT; ioctl as described in <xref
<structfield>service_lines</structfield>[1][0] to zero.</entry>
</row>
<row>
- <entry>&v4l2-buf-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry>Type of the data stream, see <xref
linkend="v4l2-buf-type" />. Should be
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml b/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml
index 91ec2fb658f8..62a1aa200a36 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml
@@ -107,7 +107,7 @@ user.<!-- FIXME Video inputs already have a name, the purpose of this
field is not quite clear.--></para></entry>
</row>
<row>
- <entry>&v4l2-tuner-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry spanname="hspan">Type of the tuner, see <xref
linkend="v4l2-tuner-type" />.</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml b/Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml
index 7bde698760e4..fa7ad7e33228 100644
--- a/Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml
@@ -48,6 +48,12 @@
<refsect1>
<title>Description</title>
+ <note>
+ <title>Experimental</title>
+ <para>This is an <link linkend="experimental"> experimental </link>
+ interface and may change in the future.</para>
+ </note>
+
<para>Applications can optionally call the
<constant>VIDIOC_PREPARE_BUF</constant> ioctl to pass ownership of the buffer
to the driver before actually enqueuing it, using the
diff --git a/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml b/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml
index 23b17f604211..1bc8aeb3ff1f 100644
--- a/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml
@@ -49,6 +49,10 @@ input</refpurpose>
<refsect1>
<title>Description</title>
+ <para>This ioctl is <emphasis role="bold">deprecated</emphasis>.
+ New drivers and applications should use &VIDIOC-QUERY-DV-TIMINGS; instead.
+ </para>
+
<para>The hardware may be able to detect the current DV preset
automatically, similar to sensing the video standard. To do so, applications
call <constant> VIDIOC_QUERY_DV_PRESET</constant> with a pointer to a
diff --git a/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml
new file mode 100644
index 000000000000..44935a0ffcf0
--- /dev/null
+++ b/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml
@@ -0,0 +1,104 @@
+<refentry id="vidioc-query-dv-timings">
+ <refmeta>
+ <refentrytitle>ioctl VIDIOC_QUERY_DV_TIMINGS</refentrytitle>
+ &manvol;
+ </refmeta>
+
+ <refnamediv>
+ <refname>VIDIOC_QUERY_DV_TIMINGS</refname>
+ <refpurpose>Sense the DV preset received by the current
+input</refpurpose>
+ </refnamediv>
+
+ <refsynopsisdiv>
+ <funcsynopsis>
+ <funcprototype>
+ <funcdef>int <function>ioctl</function></funcdef>
+ <paramdef>int <parameter>fd</parameter></paramdef>
+ <paramdef>int <parameter>request</parameter></paramdef>
+ <paramdef>struct v4l2_dv_timings *<parameter>argp</parameter></paramdef>
+ </funcprototype>
+ </funcsynopsis>
+ </refsynopsisdiv>
+
+ <refsect1>
+ <title>Arguments</title>
+
+ <variablelist>
+ <varlistentry>
+ <term><parameter>fd</parameter></term>
+ <listitem>
+ <para>&fd;</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><parameter>request</parameter></term>
+ <listitem>
+ <para>VIDIOC_QUERY_DV_TIMINGS</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><parameter>argp</parameter></term>
+ <listitem>
+ <para></para>
+ </listitem>
+ </varlistentry>
+ </variablelist>
+ </refsect1>
+
+ <refsect1>
+ <title>Description</title>
+
+ <note>
+ <title>Experimental</title>
+ <para>This is an <link linkend="experimental"> experimental </link>
+ interface and may change in the future.</para>
+ </note>
+
+ <para>The hardware may be able to detect the current DV timings
+automatically, similar to sensing the video standard. To do so, applications
+call <constant>VIDIOC_QUERY_DV_TIMINGS</constant> with a pointer to a
+&v4l2-dv-timings;. Once the hardware detects the timings, it will fill in the
+timings structure.
+
+If the timings could not be detected because there was no signal, then
+<errorcode>ENOLINK</errorcode> is returned. If a signal was detected, but
+it was unstable and the receiver could not lock to the signal, then
+<errorcode>ENOLCK</errorcode> is returned. If the receiver could lock to the signal,
+but the format is unsupported (e.g. because the pixelclock is out of range
+of the hardware capabilities), then the driver fills in whatever timings it
+could find and returns <errorcode>ERANGE</errorcode>. In that case the application
+can call &VIDIOC-DV-TIMINGS-CAP; to compare the found timings with the hardware's
+capabilities in order to give more precise feedback to the user.
+</para>
+ </refsect1>
+
+ <refsect1>
+ &return-value;
+
+ <variablelist>
+ <varlistentry>
+ <term><errorcode>ENOLINK</errorcode></term>
+ <listitem>
+ <para>No timings could be detected because no signal was found.
+</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><errorcode>ENOLCK</errorcode></term>
+ <listitem>
+ <para>The signal was unstable and the hardware could not lock on to it.
+</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><errorcode>ERANGE</errorcode></term>
+ <listitem>
+ <para>Timings were found, but they are out of range of the hardware
+capabilities.
+</para>
+ </listitem>
+ </varlistentry>
+ </variablelist>
+ </refsect1>
+</refentry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml b/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml
index 36660d311b51..e6645b996558 100644
--- a/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml
@@ -127,7 +127,7 @@ the first control with a higher ID. Drivers which do not support this
flag yet always return an &EINVAL;.</entry>
</row>
<row>
- <entry>&v4l2-ctrl-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry>Type of control, see <xref
linkend="v4l2-ctrl-type" />.</entry>
@@ -215,11 +215,12 @@ the array to zero.</entry>
<table pgwide="1" frame="none" id="v4l2-querymenu">
<title>struct <structname>v4l2_querymenu</structname></title>
- <tgroup cols="3">
+ <tgroup cols="4">
&cs-str;
<tbody valign="top">
<row>
<entry>__u32</entry>
+ <entry></entry>
<entry><structfield>id</structfield></entry>
<entry>Identifies the control, set by the application
from the respective &v4l2-queryctrl;
@@ -227,18 +228,38 @@ from the respective &v4l2-queryctrl;
</row>
<row>
<entry>__u32</entry>
+ <entry></entry>
<entry><structfield>index</structfield></entry>
<entry>Index of the menu item, starting at zero, set by
the application.</entry>
</row>
<row>
+ <entry>union</entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ </row>
+ <row>
+ <entry></entry>
<entry>__u8</entry>
<entry><structfield>name</structfield>[32]</entry>
<entry>Name of the menu item, a NUL-terminated ASCII
-string. This information is intended for the user.</entry>
+string. This information is intended for the user. This field is valid
+for <constant>V4L2_CTRL_FLAG_MENU</constant> type controls.</entry>
+ </row>
+ <row>
+ <entry></entry>
+ <entry>__s64</entry>
+ <entry><structfield>value</structfield></entry>
+ <entry>
+ Value of the integer menu item. This field is valid for
+ <constant>V4L2_CTRL_FLAG_INTEGER_MENU</constant> type
+ controls.
+ </entry>
</row>
<row>
<entry>__u32</entry>
+ <entry></entry>
<entry><structfield>reserved</structfield></entry>
<entry>Reserved for future extensions. Drivers must set
the array to zero.</entry>
@@ -292,6 +313,20 @@ the menu items can be enumerated with the
<constant>VIDIOC_QUERYMENU</constant> ioctl.</entry>
</row>
<row>
+ <entry><constant>V4L2_CTRL_TYPE_INTEGER_MENU</constant></entry>
+ <entry>&ge; 0</entry>
+ <entry>1</entry>
+ <entry>N-1</entry>
+ <entry>
+ The control has a menu of N choices. The values of the
+ menu items can be enumerated with the
+ <constant>VIDIOC_QUERYMENU</constant> ioctl. This is
+ similar to <constant>V4L2_CTRL_TYPE_MENU</constant>
+ except that instead of strings, the menu items are
+ signed 64-bit integers.
+ </entry>
+ </row>
+ <row>
<entry><constant>V4L2_CTRL_TYPE_BITMASK</constant></entry>
<entry>0</entry>
<entry>n/a</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml b/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml
index 7be4b1d29b90..d7c95057bc51 100644
--- a/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml
@@ -92,18 +92,19 @@ streamoff.--></para>
<entry>The number of buffers requested or granted.</entry>
</row>
<row>
- <entry>&v4l2-buf-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry>Type of the stream or buffers, this is the same
as the &v4l2-format; <structfield>type</structfield> field. See <xref
linkend="v4l2-buf-type" /> for valid values.</entry>
</row>
<row>
- <entry>&v4l2-memory;</entry>
+ <entry>__u32</entry>
<entry><structfield>memory</structfield></entry>
<entry>Applications set this field to
<constant>V4L2_MEMORY_MMAP</constant> or
-<constant>V4L2_MEMORY_USERPTR</constant>.</entry>
+<constant>V4L2_MEMORY_USERPTR</constant>. See <xref linkend="v4l2-memory"
+/>.</entry>
</row>
<row>
<entry>__u32</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml b/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml
index 18b1a8266f7c..407dfceb71f0 100644
--- a/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml
@@ -73,10 +73,11 @@ same value as in the &v4l2-input; <structfield>tuner</structfield>
field and the &v4l2-tuner; <structfield>index</structfield> field.</entry>
</row>
<row>
- <entry>&v4l2-tuner-type;</entry>
+ <entry>__u32</entry>
<entry><structfield>type</structfield></entry>
<entry>The tuner type. This is the same value as in the
-&v4l2-tuner; <structfield>type</structfield> field.</entry>
+&v4l2-tuner; <structfield>type</structfield> field. See <xref
+ linkend="v4l2-tuner-type" /></entry>
</row>
<row>
<entry>__u32</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml
index 06197323a8cc..4cddd788c589 100644
--- a/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml
@@ -58,9 +58,12 @@
<title>Description</title>
<note>
- <title>Experimental</title>
- <para>This is an <link linkend="experimental">experimental</link>
- interface and may change in the future.</para>
+ <title>Obsolete</title>
+
+ <para>This is an <link linkend="obsolete">obsolete</link>
+ interface and may be removed in the future. It is superseded by
+ <link linkend="vidioc-subdev-g-selection">the selection
+ API</link>.</para>
</note>
<para>To retrieve the current crop rectangle applications set the
diff --git a/Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml
new file mode 100644
index 000000000000..208e9f0da3f3
--- /dev/null
+++ b/Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml
@@ -0,0 +1,228 @@
+<refentry id="vidioc-subdev-g-selection">
+ <refmeta>
+ <refentrytitle>ioctl VIDIOC_SUBDEV_G_SELECTION, VIDIOC_SUBDEV_S_SELECTION</refentrytitle>
+ &manvol;
+ </refmeta>
+
+ <refnamediv>
+ <refname>VIDIOC_SUBDEV_G_SELECTION</refname>
+ <refname>VIDIOC_SUBDEV_S_SELECTION</refname>
+ <refpurpose>Get or set selection rectangles on a subdev pad</refpurpose>
+ </refnamediv>
+
+ <refsynopsisdiv>
+ <funcsynopsis>
+ <funcprototype>
+ <funcdef>int <function>ioctl</function></funcdef>
+ <paramdef>int <parameter>fd</parameter></paramdef>
+ <paramdef>int <parameter>request</parameter></paramdef>
+ <paramdef>struct v4l2_subdev_selection *<parameter>argp</parameter></paramdef>
+ </funcprototype>
+ </funcsynopsis>
+ </refsynopsisdiv>
+
+ <refsect1>
+ <title>Arguments</title>
+
+ <variablelist>
+ <varlistentry>
+ <term><parameter>fd</parameter></term>
+ <listitem>
+ <para>&fd;</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><parameter>request</parameter></term>
+ <listitem>
+ <para>VIDIOC_SUBDEV_G_SELECTION, VIDIOC_SUBDEV_S_SELECTION</para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><parameter>argp</parameter></term>
+ <listitem>
+ <para></para>
+ </listitem>
+ </varlistentry>
+ </variablelist>
+ </refsect1>
+
+ <refsect1>
+ <title>Description</title>
+
+ <note>
+ <title>Experimental</title>
+ <para>This is an <link linkend="experimental">experimental</link>
+ interface and may change in the future.</para>
+ </note>
+
+ <para>The selections are used to configure various image
+ processing functionality performed by the subdevs which affect the
+ image size. This currently includes cropping, scaling and
+ composition.</para>
+
+ <para>The selection API replaces <link
+ linkend="vidioc-subdev-g-crop">the old subdev crop API</link>. All
+ the function of the crop API, and more, are supported by the
+ selections API.</para>
+
+ <para>See <xref linkend="subdev"></xref> for
+ more information on how each selection target affects the image
+ processing pipeline inside the subdevice.</para>
+
+ <section>
+ <title>Types of selection targets</title>
+
+ <para>There are two types of selection targets: actual and bounds.
+ The ACTUAL targets are the targets which configure the hardware.
+ The BOUNDS target will return a rectangle that contain all
+ possible ACTUAL rectangles.</para>
+ </section>
+
+ <section>
+ <title>Discovering supported features</title>
+
+ <para>To discover which targets are supported, the user can
+ perform <constant>VIDIOC_SUBDEV_G_SELECTION</constant> on them.
+ Any unsupported target will return
+ <constant>EINVAL</constant>.</para>
+ </section>
+
+ <table pgwide="1" frame="none" id="v4l2-subdev-selection-targets">
+ <title>V4L2 subdev selection targets</title>
+ <tgroup cols="3">
+ &cs-def;
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL</constant></entry>
+ <entry>0x0000</entry>
+ <entry>Actual crop. Defines the cropping
+ performed by the processing step.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS</constant></entry>
+ <entry>0x0002</entry>
+ <entry>Bounds of the crop rectangle.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL</constant></entry>
+ <entry>0x0100</entry>
+ <entry>Actual compose rectangle. Used to configure scaling
+ on sink pads and composition on source pads.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SUBDEV_SEL_TGT_COMPOSE_BOUNDS</constant></entry>
+ <entry>0x0102</entry>
+ <entry>Bounds of the compose rectangle.</entry>
+ </row>
+ </tbody>
+ </tgroup>
+ </table>
+
+ <table pgwide="1" frame="none" id="v4l2-subdev-selection-flags">
+ <title>V4L2 subdev selection flags</title>
+ <tgroup cols="3">
+ &cs-def;
+ <tbody valign="top">
+ <row>
+ <entry><constant>V4L2_SUBDEV_SEL_FLAG_SIZE_GE</constant></entry>
+ <entry>(1 &lt;&lt; 0)</entry> <entry>Suggest the driver it
+ should choose greater or equal rectangle (in size) than
+ was requested. Albeit the driver may choose a lesser size,
+ it will only do so due to hardware limitations. Without
+ this flag (and
+ <constant>V4L2_SUBDEV_SEL_FLAG_SIZE_LE</constant>) the
+ behaviour is to choose the closest possible
+ rectangle.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SUBDEV_SEL_FLAG_SIZE_LE</constant></entry>
+ <entry>(1 &lt;&lt; 1)</entry> <entry>Suggest the driver it
+ should choose lesser or equal rectangle (in size) than was
+ requested. Albeit the driver may choose a greater size, it
+ will only do so due to hardware limitations.</entry>
+ </row>
+ <row>
+ <entry><constant>V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG</constant></entry>
+ <entry>(1 &lt;&lt; 2)</entry>
+ <entry>The configuration should not be propagated to any
+ further processing steps. If this flag is not given, the
+ configuration is propagated inside the subdevice to all
+ further processing steps.</entry>
+ </row>
+ </tbody>
+ </tgroup>
+ </table>
+
+ <table pgwide="1" frame="none" id="v4l2-subdev-selection">
+ <title>struct <structname>v4l2_subdev_selection</structname></title>
+ <tgroup cols="3">
+ &cs-str;
+ <tbody valign="top">
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>which</structfield></entry>
+ <entry>Active or try selection, from
+ &v4l2-subdev-format-whence;.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>pad</structfield></entry>
+ <entry>Pad number as reported by the media framework.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>target</structfield></entry>
+ <entry>Target selection rectangle. See
+ <xref linkend="v4l2-subdev-selection-targets">.</xref>.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>flags</structfield></entry>
+ <entry>Flags. See
+ <xref linkend="v4l2-subdev-selection-flags">.</xref></entry>
+ </row>
+ <row>
+ <entry>&v4l2-rect;</entry>
+ <entry><structfield>rect</structfield></entry>
+ <entry>Selection rectangle, in pixels.</entry>
+ </row>
+ <row>
+ <entry>__u32</entry>
+ <entry><structfield>reserved</structfield>[8]</entry>
+ <entry>Reserved for future extensions. Applications and drivers must
+ set the array to zero.</entry>
+ </row>
+ </tbody>
+ </tgroup>
+ </table>
+
+ </refsect1>
+
+ <refsect1>
+ &return-value;
+
+ <variablelist>
+ <varlistentry>
+ <term><errorcode>EBUSY</errorcode></term>
+ <listitem>
+ <para>The selection rectangle can't be changed because the
+ pad is currently busy. This can be caused, for instance, by
+ an active video stream on the pad. The ioctl must not be
+ retried without performing another action to fix the problem
+ first. Only returned by
+ <constant>VIDIOC_SUBDEV_S_SELECTION</constant></para>
+ </listitem>
+ </varlistentry>
+ <varlistentry>
+ <term><errorcode>EINVAL</errorcode></term>
+ <listitem>
+ <para>The &v4l2-subdev-selection;
+ <structfield>pad</structfield> references a non-existing
+ pad, the <structfield>which</structfield> field references a
+ non-existing format, or the selection target is not
+ supported on the given subdev pad.</para>
+ </listitem>
+ </varlistentry>
+ </variablelist>
+ </refsect1>
+</refentry>
diff --git a/Documentation/HOWTO b/Documentation/HOWTO
index f7ade3b3b40d..59c080f084ef 100644
--- a/Documentation/HOWTO
+++ b/Documentation/HOWTO
@@ -218,16 +218,16 @@ The development process
Linux kernel development process currently consists of a few different
main kernel "branches" and lots of different subsystem-specific kernel
branches. These different branches are:
- - main 2.6.x kernel tree
- - 2.6.x.y -stable kernel tree
- - 2.6.x -git kernel patches
+ - main 3.x kernel tree
+ - 3.x.y -stable kernel tree
+ - 3.x -git kernel patches
- subsystem specific kernel trees and patches
- - the 2.6.x -next kernel tree for integration tests
+ - the 3.x -next kernel tree for integration tests
-2.6.x kernel tree
+3.x kernel tree
-----------------
-2.6.x kernels are maintained by Linus Torvalds, and can be found on
-kernel.org in the pub/linux/kernel/v2.6/ directory. Its development
+3.x kernels are maintained by Linus Torvalds, and can be found on
+kernel.org in the pub/linux/kernel/v3.x/ directory. Its development
process is as follows:
- As soon as a new kernel is released a two weeks window is open,
during this period of time maintainers can submit big diffs to
@@ -262,20 +262,20 @@ mailing list about kernel releases:
released according to perceived bug status, not according to a
preconceived timeline."
-2.6.x.y -stable kernel tree
+3.x.y -stable kernel tree
---------------------------
-Kernels with 4-part versions are -stable kernels. They contain
+Kernels with 3-part versions are -stable kernels. They contain
relatively small and critical fixes for security problems or significant
-regressions discovered in a given 2.6.x kernel.
+regressions discovered in a given 3.x kernel.
This is the recommended branch for users who want the most recent stable
kernel and are not interested in helping test development/experimental
versions.
-If no 2.6.x.y kernel is available, then the highest numbered 2.6.x
+If no 3.x.y kernel is available, then the highest numbered 3.x
kernel is the current stable kernel.
-2.6.x.y are maintained by the "stable" team <stable@vger.kernel.org>, and
+3.x.y are maintained by the "stable" team <stable@vger.kernel.org>, and
are released as needs dictate. The normal release period is approximately
two weeks, but it can be longer if there are no pressing problems. A
security-related problem, instead, can cause a release to happen almost
@@ -285,7 +285,7 @@ The file Documentation/stable_kernel_rules.txt in the kernel tree
documents what kinds of changes are acceptable for the -stable tree, and
how the release process works.
-2.6.x -git patches
+3.x -git patches
------------------
These are daily snapshots of Linus' kernel tree which are managed in a
git repository (hence the name.) These patches are usually released
@@ -317,13 +317,13 @@ revisions to it, and maintainers can mark patches as under review,
accepted, or rejected. Most of these patchwork sites are listed at
http://patchwork.kernel.org/.
-2.6.x -next kernel tree for integration tests
+3.x -next kernel tree for integration tests
---------------------------------------------
-Before updates from subsystem trees are merged into the mainline 2.6.x
+Before updates from subsystem trees are merged into the mainline 3.x
tree, they need to be integration-tested. For this purpose, a special
testing repository exists into which virtually all subsystem trees are
pulled on an almost daily basis:
- http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git
+ http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git
http://linux.f-seidel.de/linux-next/pmwiki/
This way, the -next kernel gives a summary outlook onto what will be
diff --git a/Documentation/Makefile b/Documentation/Makefile
index 30b656ece7aa..31d302bc5863 100644
--- a/Documentation/Makefile
+++ b/Documentation/Makefile
@@ -1,3 +1,3 @@
obj-m := DocBook/ accounting/ auxdisplay/ connector/ \
filesystems/ filesystems/configfs/ ia64/ laptops/ networking/ \
- pcmcia/ spi/ timers/ watchdog/src/
+ pcmcia/ spi/ timers/ watchdog/src/ misc-devices/mei/
diff --git a/Documentation/RCU/torture.txt b/Documentation/RCU/torture.txt
index 375d3fb71437..4ddf3913fd8c 100644
--- a/Documentation/RCU/torture.txt
+++ b/Documentation/RCU/torture.txt
@@ -47,6 +47,16 @@ irqreader Says to invoke RCU readers from irq level. This is currently
permit this. (Or, more accurately, variants of RCU that do
-not- permit this know to ignore this variable.)
+n_barrier_cbs If this is nonzero, RCU barrier testing will be conducted,
+ in which case n_barrier_cbs specifies the number of
+ RCU callbacks (and corresponding kthreads) to use for
+ this testing. The value cannot be negative. If you
+ specify this to be non-zero when torture_type indicates a
+ synchronous RCU implementation (one for which a member of
+ the synchronize_rcu() rather than the call_rcu() family is
+ used -- see the documentation for torture_type below), an
+ error will be reported and no testing will be carried out.
+
nfakewriters This is the number of RCU fake writer threads to run. Fake
writer threads repeatedly use the synchronous "wait for
current readers" function of the interface selected by
@@ -188,7 +198,7 @@ OUTPUT
The statistics output is as follows:
rcu-torture:--- Start of test: nreaders=16 nfakewriters=4 stat_interval=30 verbose=0 test_no_idle_hz=1 shuffle_interval=3 stutter=5 irqreader=1 fqs_duration=0 fqs_holdoff=0 fqs_stutter=3 test_boost=1/0 test_boost_interval=7 test_boost_duration=4
- rcu-torture: rtc: (null) ver: 155441 tfle: 0 rta: 155441 rtaf: 8884 rtf: 155440 rtmbe: 0 rtbke: 0 rtbre: 0 rtbf: 0 rtb: 0 nt: 3055767
+ rcu-torture: rtc: (null) ver: 155441 tfle: 0 rta: 155441 rtaf: 8884 rtf: 155440 rtmbe: 0 rtbe: 0 rtbke: 0 rtbre: 0 rtbf: 0 rtb: 0 nt: 3055767
rcu-torture: Reader Pipe: 727860534 34213 0 0 0 0 0 0 0 0 0
rcu-torture: Reader Batch: 727877838 17003 0 0 0 0 0 0 0 0 0
rcu-torture: Free-Block Circulation: 155440 155440 155440 155440 155440 155440 155440 155440 155440 155440 0
@@ -230,6 +240,9 @@ o "rtmbe": A non-zero value indicates that rcutorture believes that
rcu_assign_pointer() and rcu_dereference() are not working
correctly. This value should be zero.
+o "rtbe": A non-zero value indicates that one of the rcu_barrier()
+ family of functions is not working correctly.
+
o "rtbke": rcutorture was unable to create the real-time kthreads
used to force RCU priority inversion. This value should be zero.
diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches
index 4468ce24427c..c379a2a6949f 100644
--- a/Documentation/SubmittingPatches
+++ b/Documentation/SubmittingPatches
@@ -150,7 +150,8 @@ be able to justify all violations that remain in your patch.
Look through the MAINTAINERS file and the source code, and determine
if your change applies to a specific subsystem of the kernel, with
-an assigned maintainer. If so, e-mail that person.
+an assigned maintainer. If so, e-mail that person. The script
+scripts/get_maintainer.pl can be very useful at this step.
If no maintainer is listed, or the maintainer does not respond, send
your patch to the primary Linux kernel developer's mailing list,
diff --git a/Documentation/arm/00-INDEX b/Documentation/arm/00-INDEX
index 91c24a1e8a9e..36420e116c90 100644
--- a/Documentation/arm/00-INDEX
+++ b/Documentation/arm/00-INDEX
@@ -4,8 +4,6 @@ Booting
- requirements for booting
Interrupts
- ARM Interrupt subsystem documentation
-IXP2000
- - Release Notes for Linux on Intel's IXP2000 Network Processor
msm
- MSM specific documentation
Netwinder
diff --git a/Documentation/arm/IXP2000 b/Documentation/arm/IXP2000
deleted file mode 100644
index 68d21d92a30b..000000000000
--- a/Documentation/arm/IXP2000
+++ /dev/null
@@ -1,69 +0,0 @@
-
--------------------------------------------------------------------------
-Release Notes for Linux on Intel's IXP2000 Network Processor
-
-Maintained by Deepak Saxena <dsaxena@plexity.net>
--------------------------------------------------------------------------
-
-1. Overview
-
-Intel's IXP2000 family of NPUs (IXP2400, IXP2800, IXP2850) is designed
-for high-performance network applications such high-availability
-telecom systems. In addition to an XScale core, it contains up to 8
-"MicroEngines" that run special code, several high-end networking
-interfaces (UTOPIA, SPI, etc), a PCI host bridge, one serial port,
-flash interface, and some other odds and ends. For more information, see:
-
-http://developer.intel.com
-
-2. Linux Support
-
-Linux currently supports the following features on the IXP2000 NPUs:
-
-- On-chip serial
-- PCI
-- Flash (MTD/JFFS2)
-- I2C through GPIO
-- Timers (watchdog, OS)
-
-That is about all we can support under Linux ATM b/c the core networking
-components of the chip are accessed via Intel's closed source SDK.
-Please contact Intel directly on issues with using those. There is
-also a mailing list run by some folks at Princeton University that might
-be of help: https://lists.cs.princeton.edu/mailman/listinfo/ixp2xxx
-
-WHATEVER YOU DO, DO NOT POST EMAIL TO THE LINUX-ARM OR LINUX-ARM-KERNEL
-MAILING LISTS REGARDING THE INTEL SDK.
-
-3. Supported Platforms
-
-- Intel IXDP2400 Reference Platform
-- Intel IXDP2800 Reference Platform
-- Intel IXDP2401 Reference Platform
-- Intel IXDP2801 Reference Platform
-- RadiSys ENP-2611
-
-4. Usage Notes
-
-- The IXP2000 platforms usually have rather complex PCI bus topologies
- with large memory space requirements. In addition, b/c of the way the
- Intel SDK is designed, devices are enumerated in a very specific
- way. B/c of this this, we use "pci=firmware" option in the kernel
- command line so that we do not re-enumerate the bus.
-
-- IXDP2x01 systems have variable clock tick rates that we cannot determine
- via HW registers. The "ixdp2x01_clk=XXX" cmd line options allow you
- to pass the clock rate to the board port.
-
-5. Thanks
-
-The IXP2000 work has been funded by Intel Corp. and MontaVista Software, Inc.
-
-The following people have contributed patches/comments/etc:
-
-Naeem F. Afzal
-Lennert Buytenhek
-Jeffrey Daly
-
--------------------------------------------------------------------------
-Last Update: 8/09/2004
diff --git a/Documentation/arm/SPEAr/overview.txt b/Documentation/arm/SPEAr/overview.txt
index 253a35c6f782..57aae7765c74 100644
--- a/Documentation/arm/SPEAr/overview.txt
+++ b/Documentation/arm/SPEAr/overview.txt
@@ -8,53 +8,56 @@ Introduction
weblink : http://www.st.com/spear
The ST Microelectronics SPEAr range of ARM9/CortexA9 System-on-Chip CPUs are
- supported by the 'spear' platform of ARM Linux. Currently SPEAr300,
- SPEAr310, SPEAr320 and SPEAr600 SOCs are supported. Support for the SPEAr13XX
- series is in progress.
+ supported by the 'spear' platform of ARM Linux. Currently SPEAr1310,
+ SPEAr1340, SPEAr300, SPEAr310, SPEAr320 and SPEAr600 SOCs are supported.
Hierarchy in SPEAr is as follows:
SPEAr (Platform)
- SPEAr3XX (3XX SOC series, based on ARM9)
- SPEAr300 (SOC)
- - SPEAr300_EVB (Evaluation Board)
+ - SPEAr300 Evaluation Board
- SPEAr310 (SOC)
- - SPEAr310_EVB (Evaluation Board)
+ - SPEAr310 Evaluation Board
- SPEAr320 (SOC)
- - SPEAr320_EVB (Evaluation Board)
+ - SPEAr320 Evaluation Board
- SPEAr6XX (6XX SOC series, based on ARM9)
- SPEAr600 (SOC)
- - SPEAr600_EVB (Evaluation Board)
+ - SPEAr600 Evaluation Board
- SPEAr13XX (13XX SOC series, based on ARM CORTEXA9)
- - SPEAr1300 (SOC)
+ - SPEAr1310 (SOC)
+ - SPEAr1310 Evaluation Board
+ - SPEAr1340 (SOC)
+ - SPEAr1340 Evaluation Board
Configuration
-------------
A generic configuration is provided for each machine, and can be used as the
default by
- make spear600_defconfig
- make spear300_defconfig
- make spear310_defconfig
- make spear320_defconfig
+ make spear13xx_defconfig
+ make spear3xx_defconfig
+ make spear6xx_defconfig
Layout
------
- The common files for multiple machine families (SPEAr3XX, SPEAr6XX and
- SPEAr13XX) are located in the platform code contained in arch/arm/plat-spear
+ The common files for multiple machine families (SPEAr3xx, SPEAr6xx and
+ SPEAr13xx) are located in the platform code contained in arch/arm/plat-spear
with headers in plat/.
Each machine series have a directory with name arch/arm/mach-spear followed by
series name. Like mach-spear3xx, mach-spear6xx and mach-spear13xx.
- Common file for machines of spear3xx family is mach-spear3xx/spear3xx.c and for
- spear6xx is mach-spear6xx/spear6xx.c. mach-spear* also contain soc/machine
- specific files, like spear300.c, spear310.c, spear320.c and spear600.c.
- mach-spear* also contains board specific files for each machine type.
+ Common file for machines of spear3xx family is mach-spear3xx/spear3xx.c, for
+ spear6xx is mach-spear6xx/spear6xx.c and for spear13xx family is
+ mach-spear13xx/spear13xx.c. mach-spear* also contain soc/machine specific
+ files, like spear1310.c, spear1340.c spear300.c, spear310.c, spear320.c and
+ spear600.c. mach-spear* doesn't contains board specific files as they fully
+ support Flattened Device Tree.
Document Author
---------------
- Viresh Kumar, (c) 2010 ST Microelectronics
+ Viresh Kumar <viresh.kumar@st.com>, (c) 2010-2012 ST Microelectronics
diff --git a/Documentation/blackfin/bfin-gpio-notes.txt b/Documentation/blackfin/bfin-gpio-notes.txt
index d36b01f778b9..d245f39c3d01 100644
--- a/Documentation/blackfin/bfin-gpio-notes.txt
+++ b/Documentation/blackfin/bfin-gpio-notes.txt
@@ -53,7 +53,7 @@
3. But there are some exceptions
- Kernel permit the identical GPIO be requested both as GPIO and GPIO
- interrut.
+ interrupt.
Some drivers, like gpio-keys, need this behavior. Kernel only print out
warning messages like,
bfin-gpio: GPIO 24 is already reserved by gpio-keys: BTN0, and you are
diff --git a/Documentation/cgroups/cpusets.txt b/Documentation/cgroups/cpusets.txt
index 5c51ed406d1d..cefd3d8bbd11 100644
--- a/Documentation/cgroups/cpusets.txt
+++ b/Documentation/cgroups/cpusets.txt
@@ -217,7 +217,7 @@ and name space for cpusets, with a minimum of additional kernel code.
The cpus and mems files in the root (top_cpuset) cpuset are
read-only. The cpus file automatically tracks the value of
-cpu_online_map using a CPU hotplug notifier, and the mems file
+cpu_online_mask using a CPU hotplug notifier, and the mems file
automatically tracks the value of node_states[N_HIGH_MEMORY]--i.e.,
nodes with memory--using the cpuset_track_online_nodes() hook.
diff --git a/Documentation/cgroups/memory.txt b/Documentation/cgroups/memory.txt
index 4c95c0034a4b..dd88540bb995 100644
--- a/Documentation/cgroups/memory.txt
+++ b/Documentation/cgroups/memory.txt
@@ -34,8 +34,7 @@ Current Status: linux-2.6.34-mmotm(development version of 2010/April)
Features:
- accounting anonymous pages, file caches, swap caches usage and limiting them.
- - private LRU and reclaim routine. (system's global LRU and private LRU
- work independently from each other)
+ - pages are linked to per-memcg LRU exclusively, and there is no global LRU.
- optionally, memory+swap usage can be accounted and limited.
- hierarchical accounting
- soft limit
@@ -154,7 +153,7 @@ updated. page_cgroup has its own LRU on cgroup.
2.2.1 Accounting details
All mapped anon pages (RSS) and cache pages (Page Cache) are accounted.
-Some pages which are never reclaimable and will not be on the global LRU
+Some pages which are never reclaimable and will not be on the LRU
are not accounted. We just account pages under usual VM management.
RSS pages are accounted at page_fault unless they've already been accounted
@@ -185,12 +184,14 @@ behind this approach is that a cgroup that aggressively uses a shared
page will eventually get charged for it (once it is uncharged from
the cgroup that brought it in -- this will happen on memory pressure).
+But see section 8.2: when moving a task to another cgroup, its pages may
+be recharged to the new cgroup, if move_charge_at_immigrate has been chosen.
+
Exception: If CONFIG_CGROUP_CGROUP_MEM_RES_CTLR_SWAP is not used.
When you do swapoff and make swapped-out pages of shmem(tmpfs) to
be backed into memory in force, charges for pages are accounted against the
caller of swapoff rather than the users of shmem.
-
2.4 Swap Extension (CONFIG_CGROUP_MEM_RES_CTLR_SWAP)
Swap Extension allows you to record charge for swap. A swapped-in page is
@@ -375,14 +376,15 @@ cgroup might have some charge associated with it, even though all
tasks have migrated away from it. (because we charge against pages, not
against tasks.)
-Such charges are freed or moved to their parent. At moving, both of RSS
-and CACHES are moved to parent.
-rmdir() may return -EBUSY if freeing/moving fails. See 5.1 also.
+We move the stats to root (if use_hierarchy==0) or parent (if
+use_hierarchy==1), and no change on the charge except uncharging
+from the child.
Charges recorded in swap information is not updated at removal of cgroup.
Recorded information is discarded and a cgroup which uses swap (swapcache)
will be charged as a new owner of it.
+About use_hierarchy, see Section 6.
5. Misc. interfaces.
@@ -395,13 +397,15 @@ will be charged as a new owner of it.
Almost all pages tracked by this memory cgroup will be unmapped and freed.
Some pages cannot be freed because they are locked or in-use. Such pages are
- moved to parent and this cgroup will be empty. This may return -EBUSY if
- VM is too busy to free/move all pages immediately.
+ moved to parent(if use_hierarchy==1) or root (if use_hierarchy==0) and this
+ cgroup will be empty.
Typical use case of this interface is that calling this before rmdir().
Because rmdir() moves all pages to parent, some out-of-use page caches can be
moved to the parent. If you want to avoid that, force_empty will be useful.
+ About use_hierarchy, see Section 6.
+
5.2 stat file
memory.stat file includes following statistics
@@ -431,17 +435,10 @@ hierarchical_memory_limit - # of bytes of memory limit with regard to hierarchy
hierarchical_memsw_limit - # of bytes of memory+swap limit with regard to
hierarchy under which memory cgroup is.
-total_cache - sum of all children's "cache"
-total_rss - sum of all children's "rss"
-total_mapped_file - sum of all children's "cache"
-total_pgpgin - sum of all children's "pgpgin"
-total_pgpgout - sum of all children's "pgpgout"
-total_swap - sum of all children's "swap"
-total_inactive_anon - sum of all children's "inactive_anon"
-total_active_anon - sum of all children's "active_anon"
-total_inactive_file - sum of all children's "inactive_file"
-total_active_file - sum of all children's "active_file"
-total_unevictable - sum of all children's "unevictable"
+total_<counter> - # hierarchical version of <counter>, which in
+ addition to the cgroup's own value includes the
+ sum of all hierarchical children's values of
+ <counter>, i.e. total_cache
# The following additional stats are dependent on CONFIG_DEBUG_VM.
@@ -623,8 +620,7 @@ memory cgroup.
bit | what type of charges would be moved ?
-----+------------------------------------------------------------------------
0 | A charge of an anonymous page(or swap of it) used by the target task.
- | Those pages and swaps must be used only by the target task. You must
- | enable Swap Extension(see 2.4) to enable move of swap charges.
+ | You must enable Swap Extension(see 2.4) to enable move of swap charges.
-----+------------------------------------------------------------------------
1 | A charge of file pages(normal file, tmpfs file(e.g. ipc shared memory)
| and swaps of tmpfs file) mmapped by the target task. Unlike the case of
@@ -637,8 +633,6 @@ memory cgroup.
8.3 TODO
-- Implement madvise(2) to let users decide the vma to be moved or not to be
- moved.
- All of moving charge operations are done under cgroup_mutex. It's not good
behavior to hold the mutex too long, so we may need some trick.
diff --git a/Documentation/cgroups/resource_counter.txt b/Documentation/cgroups/resource_counter.txt
index 95b24d766eab..0c4a344e78fa 100644
--- a/Documentation/cgroups/resource_counter.txt
+++ b/Documentation/cgroups/resource_counter.txt
@@ -77,11 +77,11 @@ to work with it.
where the charging failed.
d. int res_counter_charge_locked
- (struct res_counter *rc, unsigned long val)
+ (struct res_counter *rc, unsigned long val, bool force)
The same as res_counter_charge(), but it must not acquire/release the
res_counter->lock internally (it must be called with res_counter->lock
- held).
+ held). The force parameter indicates whether we can bypass the limit.
e. void res_counter_uncharge[_locked]
(struct res_counter *rc, unsigned long val)
@@ -92,6 +92,14 @@ to work with it.
The _locked routines imply that the res_counter->lock is taken.
+ f. void res_counter_uncharge_until
+ (struct res_counter *rc, struct res_counter *top,
+ unsinged long val)
+
+ Almost same as res_cunter_uncharge() but propagation of uncharge
+ stops when rc == top. This is useful when kill a res_coutner in
+ child cgroup.
+
2.1 Other accounting routines
There are more routines that may help you with common needs, like
diff --git a/Documentation/cpu-hotplug.txt b/Documentation/cpu-hotplug.txt
index a20bfd415e41..66ef8f35613d 100644
--- a/Documentation/cpu-hotplug.txt
+++ b/Documentation/cpu-hotplug.txt
@@ -47,7 +47,7 @@ maxcpus=n Restrict boot time cpus to n. Say if you have 4 cpus, using
other cpus later online, read FAQ's for more info.
additional_cpus=n (*) Use this to limit hotpluggable cpus. This option sets
- cpu_possible_map = cpu_present_map + additional_cpus
+ cpu_possible_mask = cpu_present_mask + additional_cpus
cede_offline={"off","on"} Use this option to disable/enable putting offlined
processors to an extended H_CEDE state on
@@ -64,11 +64,11 @@ should only rely on this to count the # of cpus, but *MUST* not rely
on the apicid values in those tables for disabled apics. In the event
BIOS doesn't mark such hot-pluggable cpus as disabled entries, one could
use this parameter "additional_cpus=x" to represent those cpus in the
-cpu_possible_map.
+cpu_possible_mask.
possible_cpus=n [s390,x86_64] use this to set hotpluggable cpus.
This option sets possible_cpus bits in
- cpu_possible_map. Thus keeping the numbers of bits set
+ cpu_possible_mask. Thus keeping the numbers of bits set
constant even if the machine gets rebooted.
CPU maps and such
@@ -76,7 +76,7 @@ CPU maps and such
[More on cpumaps and primitive to manipulate, please check
include/linux/cpumask.h that has more descriptive text.]
-cpu_possible_map: Bitmap of possible CPUs that can ever be available in the
+cpu_possible_mask: Bitmap of possible CPUs that can ever be available in the
system. This is used to allocate some boot time memory for per_cpu variables
that aren't designed to grow/shrink as CPUs are made available or removed.
Once set during boot time discovery phase, the map is static, i.e no bits
@@ -84,13 +84,13 @@ are added or removed anytime. Trimming it accurately for your system needs
upfront can save some boot time memory. See below for how we use heuristics
in x86_64 case to keep this under check.
-cpu_online_map: Bitmap of all CPUs currently online. Its set in __cpu_up()
+cpu_online_mask: Bitmap of all CPUs currently online. Its set in __cpu_up()
after a cpu is available for kernel scheduling and ready to receive
interrupts from devices. Its cleared when a cpu is brought down using
__cpu_disable(), before which all OS services including interrupts are
migrated to another target CPU.
-cpu_present_map: Bitmap of CPUs currently present in the system. Not all
+cpu_present_mask: Bitmap of CPUs currently present in the system. Not all
of them may be online. When physical hotplug is processed by the relevant
subsystem (e.g ACPI) can change and new bit either be added or removed
from the map depending on the event is hot-add/hot-remove. There are currently
@@ -99,22 +99,22 @@ at which time hotplug is disabled.
You really dont need to manipulate any of the system cpu maps. They should
be read-only for most use. When setting up per-cpu resources almost always use
-cpu_possible_map/for_each_possible_cpu() to iterate.
+cpu_possible_mask/for_each_possible_cpu() to iterate.
Never use anything other than cpumask_t to represent bitmap of CPUs.
#include <linux/cpumask.h>
- for_each_possible_cpu - Iterate over cpu_possible_map
- for_each_online_cpu - Iterate over cpu_online_map
- for_each_present_cpu - Iterate over cpu_present_map
+ for_each_possible_cpu - Iterate over cpu_possible_mask
+ for_each_online_cpu - Iterate over cpu_online_mask
+ for_each_present_cpu - Iterate over cpu_present_mask
for_each_cpu_mask(x,mask) - Iterate over some random collection of cpu mask.
#include <linux/cpu.h>
get_online_cpus() and put_online_cpus():
The above calls are used to inhibit cpu hotplug operations. While the
-cpu_hotplug.refcount is non zero, the cpu_online_map will not change.
+cpu_hotplug.refcount is non zero, the cpu_online_mask will not change.
If you merely need to avoid cpus going away, you could also use
preempt_disable() and preempt_enable() for those sections.
Just remember the critical section cannot call any
diff --git a/Documentation/cris/README b/Documentation/cris/README
index d9b086869a60..8dbdb1a44429 100644
--- a/Documentation/cris/README
+++ b/Documentation/cris/README
@@ -1,38 +1,34 @@
-Linux 2.4 on the CRIS architecture
-==================================
-$Id: README,v 1.7 2001/04/19 12:38:32 bjornw Exp $
+Linux on the CRIS architecture
+==============================
-This is a port of Linux 2.4 to Axis Communications ETRAX 100LX embedded
-network CPU. For more information about CRIS and ETRAX please see further
-below.
+This is a port of Linux to Axis Communications ETRAX 100LX,
+ETRAX FS and ARTPEC-3 embedded network CPUs.
+
+For more information about CRIS and ETRAX please see further below.
In order to compile this you need a version of gcc with support for the
-ETRAX chip family. Please see this link for more information on how to
+ETRAX chip family. Please see this link for more information on how to
download the compiler and other tools useful when building and booting
software for the ETRAX platform:
-http://developer.axis.com/doc/software/devboard_lx/install-howto.html
-
-<more specific information should come in this document later>
+http://developer.axis.com/wiki/doku.php?id=axis:install-howto-2_20
What is CRIS ?
--------------
CRIS is an acronym for 'Code Reduced Instruction Set'. It is the CPU
architecture in Axis Communication AB's range of embedded network CPU's,
-called ETRAX. The latest CPU is called ETRAX 100LX, where LX stands for
-'Linux' because the chip was designed to be a good host for the Linux
-operating system.
+called ETRAX.
The ETRAX 100LX chip
--------------------
-For reference, please see the press-release:
+For reference, please see the following link:
-http://www.axis.com/news/us/001101_etrax.htm
+http://www.axis.com/products/dev_etrax_100lx/index.htm
-The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad
-range of built-in interfaces, all with modern scatter/gather DMA.
+The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad
+range of built-in interfaces, all with modern scatter/gather DMA.
Memory interfaces:
@@ -51,20 +47,28 @@ I/O interfaces:
* SCSI
* two parallel-ports
* two generic 8-bit ports
-
- (not all interfaces are available at the same time due to chip pin
+
+ (not all interfaces are available at the same time due to chip pin
multiplexing)
-The previous version of the ETRAX, the ETRAX 100, sits in almost all of
-Axis shipping thin-servers like the Axis 2100 web camera or the ETRAX 100
-developer-board. It lacks an MMU so the Linux we run on that is a version
-of uClinux (Linux 2.0 without MM-support) ported to the CRIS architecture.
-The new Linux 2.4 port has full MM and needs a CPU with an MMU, so it will
-not run on the ETRAX 100.
+ETRAX 100LX is CRISv10 architecture.
+
+
+The ETRAX FS and ARTPEC-3 chips
+-------------------------------
-A version of the Axis developer-board with ETRAX 100LX (running Linux
-2.4) is now available. For more information please see developer.axis.com.
+The ETRAX FS is a 200MHz 32-bit RISC processor with on-chip 16kB
+I-cache and 16kB D-cache and with a wide range of device interfaces
+including multiple high speed serial ports and an integrated USB 1.1 PHY.
+The ARTPEC-3 is a variant of the ETRAX FS with additional IO-units
+used by the Axis Communications network cameras.
+
+See below link for more information:
+
+http://www.axis.com/products/dev_etrax_fs/index.htm
+
+ETRAX FS and ARTPEC-3 are both CRISv32 architectures.
Bootlog
-------
@@ -182,10 +186,6 @@ SwapFree: 0 kB
-rwxr-xr-x 1 342 100 16252 Jan 01 00:00 telnetd
-(All programs are statically linked to the libc at this point - we have not ported the
- shared libraries yet)
-
-
diff --git a/Documentation/devices.txt b/Documentation/devices.txt
index 00383186d8fb..47a154f30290 100644
--- a/Documentation/devices.txt
+++ b/Documentation/devices.txt
@@ -98,7 +98,8 @@ Your cooperation is appreciated.
8 = /dev/random Nondeterministic random number gen.
9 = /dev/urandom Faster, less secure random number gen.
10 = /dev/aio Asynchronous I/O notification interface
- 11 = /dev/kmsg Writes to this come out as printk's
+ 11 = /dev/kmsg Writes to this come out as printk's, reads
+ export the buffered printk records.
12 = /dev/oldmem Used by crashdump kernels to access
the memory of the kernel that crashed.
@@ -846,13 +847,7 @@ Your cooperation is appreciated.
...
31 = /dev/tap15 16th Ethertap device
- 36 block MCA ESDI hard disk
- 0 = /dev/eda First ESDI disk whole disk
- 64 = /dev/edb Second ESDI disk whole disk
- ...
-
- Partitions are handled in the same way as IDE disks
- (see major number 3).
+ 36 block OBSOLETE (was MCA ESDI hard disk)
37 char IDE tape
0 = /dev/ht0 First IDE tape
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
new file mode 100644
index 000000000000..52478c83d0cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -0,0 +1,27 @@
+* ARM architected timer
+
+ARM Cortex-A7 and Cortex-A15 have a per-core architected timer, which
+provides per-cpu timers.
+
+The timer is attached to a GIC to deliver its per-processor interrupts.
+
+** Timer node properties:
+
+- compatible : Should at least contain "arm,armv7-timer".
+
+- interrupts : Interrupt list for secure, non-secure, virtual and
+ hypervisor timers, in that order.
+
+- clock-frequency : The frequency of the main counter, in Hz. Optional.
+
+Example:
+
+ timer {
+ compatible = "arm,cortex-a15-timer",
+ "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
+ clock-frequency = <100000000>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/atmel-adc.txt b/Documentation/devicetree/bindings/arm/atmel-adc.txt
new file mode 100644
index 000000000000..c63097d6afeb
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel-adc.txt
@@ -0,0 +1,65 @@
+* AT91's Analog to Digital Converter (ADC)
+
+Required properties:
+ - compatible: Should be "atmel,at91sam9260-adc"
+ - reg: Should contain ADC registers location and length
+ - interrupts: Should contain the IRQ line for the ADC
+ - atmel,adc-channel-base: Offset of the first channel data register
+ - atmel,adc-channels-used: Bitmask of the channels muxed and enable for this
+ device
+ - atmel,adc-drdy-mask: Mask of the DRDY interruption in the ADC
+ - atmel,adc-num-channels: Number of channels available in the ADC
+ - atmel,adc-startup-time: Startup Time of the ADC in microseconds as
+ defined in the datasheet
+ - atmel,adc-status-register: Offset of the Interrupt Status Register
+ - atmel,adc-trigger-register: Offset of the Trigger Register
+ - atmel,adc-vref: Reference voltage in millivolts for the conversions
+
+Optional properties:
+ - atmel,adc-use-external: Boolean to enable of external triggers
+
+Optional trigger Nodes:
+ - Required properties:
+ * trigger-name: Name of the trigger exposed to the user
+ * trigger-value: Value to put in the Trigger register
+ to activate this trigger
+ - Optional properties:
+ * trigger-external: Is the trigger an external trigger?
+
+Examples:
+adc0: adc@fffb0000 {
+ compatible = "atmel,at91sam9260-adc";
+ reg = <0xfffb0000 0x100>;
+ interrupts = <20 4>;
+ atmel,adc-channel-base = <0x30>;
+ atmel,adc-channels-used = <0xff>;
+ atmel,adc-drdy-mask = <0x10000>;
+ atmel,adc-num-channels = <8>;
+ atmel,adc-startup-time = <40>;
+ atmel,adc-status-register = <0x1c>;
+ atmel,adc-trigger-register = <0x08>;
+ atmel,adc-use-external;
+ atmel,adc-vref = <3300>;
+
+ trigger@0 {
+ trigger-name = "external-rising";
+ trigger-value = <0x1>;
+ trigger-external;
+ };
+ trigger@1 {
+ trigger-name = "external-falling";
+ trigger-value = <0x2>;
+ trigger-external;
+ };
+
+ trigger@2 {
+ trigger-name = "external-any";
+ trigger-value = <0x3>;
+ trigger-external;
+ };
+
+ trigger@3 {
+ trigger-name = "continuous";
+ trigger-value = <0x6>;
+ };
+};
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index bfbc771a65f8..ac9e7516756e 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -1,6 +1,14 @@
Freescale i.MX Platforms Device Tree Bindings
-----------------------------------------------
+i.MX23 Evaluation Kit
+Required root node properties:
+ - compatible = "fsl,imx23-evk", "fsl,imx23";
+
+i.MX28 Evaluation Kit
+Required root node properties:
+ - compatible = "fsl,imx28-evk", "fsl,imx28";
+
i.MX51 Babbage Board
Required root node properties:
- compatible = "fsl,imx51-babbage", "fsl,imx51";
@@ -29,6 +37,10 @@ i.MX6 Quad SABRE Lite Board
Required root node properties:
- compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+i.MX6 Quad SABRE Smart Device Board
+Required root node properties:
+ - compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
+
Generic i.MX boards
-------------------
diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt
index 9b4b82a721b6..62eb8df1e08d 100644
--- a/Documentation/devicetree/bindings/arm/gic.txt
+++ b/Documentation/devicetree/bindings/arm/gic.txt
@@ -11,7 +11,9 @@ have PPIs or SGIs.
Main node required properties:
- compatible : should be one of:
+ "arm,cortex-a15-gic"
"arm,cortex-a9-gic"
+ "arm,cortex-a7-gic"
"arm,arm11mp-gic"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
@@ -39,8 +41,9 @@ Main node required properties:
the GIC cpu interface register base and size.
Optional
-- interrupts : Interrupt source of the parent interrupt controller. Only
- present on secondary GICs.
+- interrupts : Interrupt source of the parent interrupt controller on
+ secondary GICs, or VGIC maintainance interrupt on primary GIC (see
+ below).
- cpu-offset : per-cpu offset within the distributor and cpu interface
regions, used when the GIC doesn't have banked registers. The offset is
@@ -57,3 +60,31 @@ Example:
<0xfff10100 0x100>;
};
+
+* GIC virtualization extensions (VGIC)
+
+For ARM cores that support the virtualization extensions, additional
+properties must be described (they only exist if the GIC is the
+primary interrupt controller).
+
+Required properties:
+
+- reg : Additional regions specifying the base physical address and
+ size of the VGIC registers. The first additional region is the GIC
+ virtual interface control register base and size. The 2nd additional
+ region is the GIC virtual cpu interface register base and size.
+
+- interrupts : VGIC maintainance interrupt.
+
+Example:
+
+ interrupt-controller@2c001000 {
+ compatible = "arm,cortex-a15-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x2c001000 0x1000>,
+ <0x2c002000 0x1000>,
+ <0x2c004000 0x2000>,
+ <0x2c006000 0x2000>;
+ interrupts = <1 9 0xf04>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/lpc32xx-mic.txt b/Documentation/devicetree/bindings/arm/lpc32xx-mic.txt
new file mode 100644
index 000000000000..539adca19e8f
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/lpc32xx-mic.txt
@@ -0,0 +1,38 @@
+* NXP LPC32xx Main Interrupt Controller
+ (MIC, including SIC1 and SIC2 secondary controllers)
+
+Required properties:
+- compatible: Should be "nxp,lpc3220-mic"
+- interrupt-controller: Identifies the node as an interrupt controller.
+- interrupt-parent: Empty for the interrupt controller itself
+- #interrupt-cells: The number of cells to define the interrupts. Should be 2.
+ The first cell is the IRQ number
+ The second cell is used to specify mode:
+ 1 = low-to-high edge triggered
+ 2 = high-to-low edge triggered
+ 4 = active high level-sensitive
+ 8 = active low level-sensitive
+ Default for internal sources should be set to 4 (active high).
+- reg: Should contain MIC registers location and length
+
+Examples:
+ /*
+ * MIC
+ */
+ mic: interrupt-controller@40008000 {
+ compatible = "nxp,lpc3220-mic";
+ interrupt-controller;
+ interrupt-parent;
+ #interrupt-cells = <2>;
+ reg = <0x40008000 0xC000>;
+ };
+
+ /*
+ * ADC
+ */
+ adc@40048000 {
+ compatible = "nxp,lpc3220-adc";
+ reg = <0x40048000 0x1000>;
+ interrupt-parent = <&mic>;
+ interrupts = <39 4>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/lpc32xx.txt b/Documentation/devicetree/bindings/arm/lpc32xx.txt
new file mode 100644
index 000000000000..56ec8ddc4a3b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/lpc32xx.txt
@@ -0,0 +1,8 @@
+NXP LPC32xx Platforms Device Tree Bindings
+------------------------------------------
+
+Boards with the NXP LPC32xx SoC shall have the following properties:
+
+Required root node property:
+
+compatible: must be "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240" or "nxp,lpc3250"
diff --git a/Documentation/devicetree/bindings/arm/mrvl/intc.txt b/Documentation/devicetree/bindings/arm/mrvl/intc.txt
new file mode 100644
index 000000000000..80b9a94d9a23
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mrvl/intc.txt
@@ -0,0 +1,40 @@
+* Marvell MMP Interrupt controller
+
+Required properties:
+- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or
+ "mrvl,mmp2-mux-intc"
+- reg : Address and length of the register set of the interrupt controller.
+ If the interrupt controller is intc, address and length means the range
+ of the whold interrupt controller. If the interrupt controller is mux-intc,
+ address and length means one register. Since address of mux-intc is in the
+ range of intc. mux-intc is secondary interrupt controller.
+- reg-names : Name of the register set of the interrupt controller. It's
+ only required in mux-intc interrupt controller.
+- interrupts : Should be the port interrupt shared by mux interrupts. It's
+ only required in mux-intc interrupt controller.
+- interrupt-controller : Identifies the node as an interrupt controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source.
+- mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt
+ controller.
+- mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge
+ detection first.
+
+Example:
+ intc: interrupt-controller@d4282000 {
+ compatible = "mrvl,mmp2-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xd4282000 0x1000>;
+ mrvl,intc-nr-irqs = <64>;
+ };
+
+ intcmux4@d4282150 {
+ compatible = "mrvl,mmp2-mux-intc";
+ interrupts = <4>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x150 0x4>, <0x168 0x4>;
+ reg-names = "mux status", "mux mask";
+ mrvl,intc-nr-irqs = <2>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/mrvl.txt b/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt
index d8de933e9d81..117d741a2e4f 100644
--- a/Documentation/devicetree/bindings/arm/mrvl.txt
+++ b/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt
@@ -4,3 +4,11 @@ Marvell Platforms Device Tree Bindings
PXA168 Aspenite Board
Required root node properties:
- compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
+
+PXA910 DKB Board
+Required root node properties:
+ - compatible = "mrvl,pxa910-dkb";
+
+MMP2 Brownstone Board
+Required root node properties:
+ - compatible = "mrvl,mmp2-brownstone";
diff --git a/Documentation/devicetree/bindings/arm/mrvl/timer.txt b/Documentation/devicetree/bindings/arm/mrvl/timer.txt
new file mode 100644
index 000000000000..9a6e251462e7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mrvl/timer.txt
@@ -0,0 +1,13 @@
+* Marvell MMP Timer controller
+
+Required properties:
+- compatible : Should be "mrvl,mmp-timer".
+- reg : Address and length of the register set of timer controller.
+- interrupts : Should be the interrupt number.
+
+Example:
+ timer0: timer@d4014000 {
+ compatible = "mrvl,mmp-timer";
+ reg = <0xd4014000 0x100>;
+ interrupts = <13>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt b/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt
new file mode 100644
index 000000000000..f2f2171e530e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt
@@ -0,0 +1,52 @@
+* Samsung Exynos Interrupt Combiner Controller
+
+Samsung's Exynos4 architecture includes a interrupt combiner controller which
+can combine interrupt sources as a group and provide a single interrupt request
+for the group. The interrupt request from each group are connected to a parent
+interrupt controller, such as GIC in case of Exynos4210.
+
+The interrupt combiner controller consists of multiple combiners. Upto eight
+interrupt sources can be connected to a combiner. The combiner outputs one
+combined interrupt for its eight interrupt sources. The combined interrupt
+is usually connected to a parent interrupt controller.
+
+A single node in the device tree is used to describe the interrupt combiner
+controller module (which includes multiple combiners). A combiner in the
+interrupt controller module shares config/control registers with other
+combiners. For example, a 32-bit interrupt enable/disable config register
+can accommodate upto 4 interrupt combiners (with each combiner supporting
+upto 8 interrupt sources).
+
+Required properties:
+- compatible: should be "samsung,exynos4210-combiner".
+- interrupt-controller: Identifies the node as an interrupt controller.
+- #interrupt-cells: should be <2>. The meaning of the cells are
+ * First Cell: Combiner Group Number.
+ * Second Cell: Interrupt number within the group.
+- reg: Base address and size of interrupt combiner registers.
+- interrupts: The list of interrupts generated by the combiners which are then
+ connected to a parent interrupt controller. The format of the interrupt
+ specifier depends in the interrupt parent controller.
+
+Optional properties:
+- samsung,combiner-nr: The number of interrupt combiners supported. If this
+ property is not specified, the default number of combiners is assumed
+ to be 16.
+- interrupt-parent: pHandle of the parent interrupt controller, if not
+ inherited from the parent node.
+
+
+Example:
+
+ The following is a an example from the Exynos4210 SoC dtsi file.
+
+ combiner:interrupt-controller@10440000 {
+ compatible = "samsung,exynos4210-combiner";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x10440000 0x1000>;
+ interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
+ <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
+ <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
+ <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/spear-timer.txt b/Documentation/devicetree/bindings/arm/spear-timer.txt
new file mode 100644
index 000000000000..c0017221cf55
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/spear-timer.txt
@@ -0,0 +1,18 @@
+* SPEAr ARM Timer
+
+** Timer node required properties:
+
+- compatible : Should be:
+ "st,spear-timer"
+- reg: Address range of the timer registers
+- interrupt-parent: Should be the phandle for the interrupt controller
+ that services interrupts for this device
+- interrupt: Should contain the timer interrupt number
+
+Example:
+
+ timer@f0000000 {
+ compatible = "st,spear-timer";
+ reg = <0xf0000000 0x400>;
+ interrupts = <2>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/spear.txt b/Documentation/devicetree/bindings/arm/spear.txt
index f8e54f092328..0d42949df6c2 100644
--- a/Documentation/devicetree/bindings/arm/spear.txt
+++ b/Documentation/devicetree/bindings/arm/spear.txt
@@ -2,7 +2,25 @@ ST SPEAr Platforms Device Tree Bindings
---------------------------------------
Boards with the ST SPEAr600 SoC shall have the following properties:
+Required root node property:
+compatible = "st,spear600";
+Boards with the ST SPEAr300 SoC shall have the following properties:
Required root node property:
+compatible = "st,spear300";
-compatible = "st,spear600";
+Boards with the ST SPEAr310 SoC shall have the following properties:
+Required root node property:
+compatible = "st,spear310";
+
+Boards with the ST SPEAr320 SoC shall have the following properties:
+Required root node property:
+compatible = "st,spear320";
+
+Boards with the ST SPEAr1310 SoC shall have the following properties:
+Required root node property:
+compatible = "st,spear1310";
+
+Boards with the ST SPEAr1340 SoC shall have the following properties:
+Required root node property:
+compatible = "st,spear1340";
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
new file mode 100644
index 000000000000..234406d41c12
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
@@ -0,0 +1,11 @@
+NVIDIA Tegra AHB
+
+Required properties:
+- compatible : "nvidia,tegra20-ahb" or "nvidia,tegra30-ahb"
+- reg : Should contain 1 register ranges(address and length)
+
+Example:
+ ahb: ahb@6000c004 {
+ compatible = "nvidia,tegra20-ahb";
+ reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */
+ };
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt
new file mode 100644
index 000000000000..c25a0a55151d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt
@@ -0,0 +1,16 @@
+NVIDIA Tegra20 MC(Memory Controller)
+
+Required properties:
+- compatible : "nvidia,tegra20-mc"
+- reg : Should contain 2 register ranges(address and length); see the
+ example below. Note that the MC registers are interleaved with the
+ GART registers, and hence must be represented as multiple ranges.
+- interrupts : Should contain MC General interrupt.
+
+Example:
+ mc {
+ compatible = "nvidia,tegra20-mc";
+ reg = <0x7000f000 0x024
+ 0x7000f03c 0x3c4>;
+ interrupts = <0 77 0x04>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt
new file mode 100644
index 000000000000..e47e73f612f4
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt
@@ -0,0 +1,18 @@
+NVIDIA Tegra30 MC(Memory Controller)
+
+Required properties:
+- compatible : "nvidia,tegra30-mc"
+- reg : Should contain 4 register ranges(address and length); see the
+ example below. Note that the MC registers are interleaved with the
+ SMMU registers, and hence must be represented as multiple ranges.
+- interrupts : Should contain MC General interrupt.
+
+Example:
+ mc {
+ compatible = "nvidia,tegra30-mc";
+ reg = <0x7000f000 0x010
+ 0x7000f03c 0x1b4
+ 0x7000f200 0x028
+ 0x7000f284 0x17c>;
+ interrupts = <0 77 0x04>;
+ };
diff --git a/Documentation/devicetree/bindings/ata/calxeda-sata.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 79caa5651f53..8bb8a76d42e8 100644
--- a/Documentation/devicetree/bindings/ata/calxeda-sata.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -1,10 +1,10 @@
-* Calxeda SATA Controller
+* AHCI SATA Controller
SATA nodes are defined to describe on-chip Serial ATA controllers.
Each SATA controller should have its own node.
Required properties:
-- compatible : compatible list, contains "calxeda,hb-ahci"
+- compatible : compatible list, contains "calxeda,hb-ahci" or "snps,spear-ahci"
- interrupts : <interrupt mapping for SATA IRQ>
- reg : <registers mapping>
@@ -14,4 +14,3 @@ Example:
reg = <0xffe08000 0x1000>;
interrupts = <115>;
};
-
diff --git a/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt b/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt
new file mode 100644
index 000000000000..ded0398d3bdc
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt
@@ -0,0 +1,19 @@
+* Freescale MXS DMA
+
+Required properties:
+- compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
+- reg : Should contain registers location and length
+
+Supported chips:
+imx23, imx28.
+
+Examples:
+dma-apbh@80004000 {
+ compatible = "fsl,imx28-dma-apbh";
+ reg = <0x80004000 2000>;
+};
+
+dma-apbx@80024000 {
+ compatible = "fsl,imx28-dma-apbx";
+ reg = <0x80024000 2000>;
+};
diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt b/Documentation/devicetree/bindings/dma/snps-dma.txt
new file mode 100644
index 000000000000..c0d85dbcada5
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/snps-dma.txt
@@ -0,0 +1,17 @@
+* Synopsys Designware DMA Controller
+
+Required properties:
+- compatible: "snps,dma-spear1340"
+- reg: Address range of the DMAC registers
+- interrupt-parent: Should be the phandle for the interrupt controller
+ that services interrupts for this device
+- interrupt: Should contain the DMAC interrupt number
+
+Example:
+
+ dma@fc000000 {
+ compatible = "snps,dma-spear1340";
+ reg = <0xfc000000 0x1000>;
+ interrupt-parent = <&vic1>;
+ interrupts = <12>;
+ };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt b/Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt
new file mode 100644
index 000000000000..f93d51478d5a
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt
@@ -0,0 +1,38 @@
+Lantiq SoC External Bus memory mapped GPIO controller
+
+By attaching hardware latches to the EBU it is possible to create output
+only gpios. This driver configures a special memory address, which when
+written to outputs 16 bit to the latches.
+
+The node describing the memory mapped GPIOs needs to be a child of the node
+describing the "lantiq,localbus".
+
+Required properties:
+- compatible : Should be "lantiq,gpio-mm-lantiq"
+- reg : Address and length of the register set for the device
+- #gpio-cells : Should be two. The first cell is the pin number and
+ the second cell is used to specify optional parameters (currently
+ unused).
+- gpio-controller : Marks the device node as a gpio controller.
+
+Optional properties:
+- lantiq,shadow : The default value that we shall assume as already set on the
+ shift register cascade.
+
+Example:
+
+localbus@0 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
+ 1 0 0x4000000 0x4000010>; /* addsel1 */
+ compatible = "lantiq,localbus", "simple-bus";
+
+ gpio_mm0: gpio@4000000 {
+ compatible = "lantiq,gpio-mm";
+ reg = <1 0x0 0x10>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ lantiq,shadow = <0x77f>
+ };
+}
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mxs.txt b/Documentation/devicetree/bindings/gpio/gpio-mxs.txt
new file mode 100644
index 000000000000..0c35673f7a3e
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-mxs.txt
@@ -0,0 +1,87 @@
+* Freescale MXS GPIO controller
+
+The Freescale MXS GPIO controller is part of MXS PIN controller. The
+GPIOs are organized in port/bank. Each port consists of 32 GPIOs.
+
+As the GPIO controller is embedded in the PIN controller and all the
+GPIO ports share the same IO space with PIN controller, the GPIO node
+will be represented as sub-nodes of MXS pinctrl node.
+
+Required properties for GPIO node:
+- compatible : Should be "fsl,<soc>-gpio". The supported SoCs include
+ imx23 and imx28.
+- interrupts : Should be the port interrupt shared by all 32 pins.
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells : Should be two. The first cell is the pin number and
+ the second cell is used to specify optional parameters (currently
+ unused).
+- interrupt-controller: Marks the device node as an interrupt controller.
+- #interrupt-cells : Should be 2. The first cell is the GPIO number.
+ The second cell bits[3:0] is used to specify trigger type and level flags:
+ 1 = low-to-high edge triggered.
+ 2 = high-to-low edge triggered.
+ 4 = active high level-sensitive.
+ 8 = active low level-sensitive.
+
+Note: Each GPIO port should have an alias correctly numbered in "aliases"
+node.
+
+Examples:
+
+aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ gpio4 = &gpio4;
+};
+
+pinctrl@80018000 {
+ compatible = "fsl,imx28-pinctrl", "simple-bus";
+ reg = <0x80018000 2000>;
+
+ gpio0: gpio@0 {
+ compatible = "fsl,imx28-gpio";
+ interrupts = <127>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio1: gpio@1 {
+ compatible = "fsl,imx28-gpio";
+ interrupts = <126>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio@2 {
+ compatible = "fsl,imx28-gpio";
+ interrupts = <125>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio3: gpio@3 {
+ compatible = "fsl,imx28-gpio";
+ interrupts = <124>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio4: gpio@4 {
+ compatible = "fsl,imx28-gpio";
+ interrupts = <123>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};
diff --git a/Documentation/devicetree/bindings/gpio/gpio-nmk.txt b/Documentation/devicetree/bindings/gpio/gpio-nmk.txt
new file mode 100644
index 000000000000..ee87467ad8d6
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-nmk.txt
@@ -0,0 +1,31 @@
+Nomadik GPIO controller
+
+Required properties:
+- compatible : Should be "st,nomadik-gpio".
+- reg : Physical base address and length of the controller's registers.
+- interrupts : The interrupt outputs from the controller.
+- #gpio-cells : Should be two:
+ The first cell is the pin number.
+ The second cell is used to specify optional parameters:
+ - bits[3:0] trigger type and level flags:
+ 1 = low-to-high edge triggered.
+ 2 = high-to-low edge triggered.
+ 4 = active high level-sensitive.
+ 8 = active low level-sensitive.
+- gpio-controller : Marks the device node as a GPIO controller.
+- interrupt-controller : Marks the device node as an interrupt controller.
+- gpio-bank : Specifies which bank a controller owns.
+- st,supports-sleepmode : Specifies whether controller can sleep or not
+
+Example:
+
+ gpio1: gpio@8012e080 {
+ compatible = "st,nomadik-gpio";
+ reg = <0x8012e080 0x80>;
+ interrupts = <0 120 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ supports-sleepmode;
+ gpio-bank = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt b/Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt
new file mode 100644
index 000000000000..854de130a971
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt
@@ -0,0 +1,42 @@
+Lantiq SoC Serial To Parallel (STP) GPIO controller
+
+The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a
+peripheral controller used to drive external shift register cascades. At most
+3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
+to drive the 2 LSBs of the cascade automatically.
+
+
+Required properties:
+- compatible : Should be "lantiq,gpio-stp-xway"
+- reg : Address and length of the register set for the device
+- #gpio-cells : Should be two. The first cell is the pin number and
+ the second cell is used to specify optional parameters (currently
+ unused).
+- gpio-controller : Marks the device node as a gpio controller.
+
+Optional properties:
+- lantiq,shadow : The default value that we shall assume as already set on the
+ shift register cascade.
+- lantiq,groups : Set the 3 bit mask to select which of the 3 groups are enabled
+ in the shift register cascade.
+- lantiq,dsl : The dsl core can control the 2 LSBs of the gpio cascade. This 2 bit
+ property can enable this feature.
+- lantiq,phy1 : The gphy1 core can control 3 bits of the gpio cascade.
+- lantiq,phy2 : The gphy2 core can control 3 bits of the gpio cascade.
+- lantiq,rising : use rising instead of falling edge for the shift register
+
+Example:
+
+gpio1: stp@E100BB0 {
+ compatible = "lantiq,gpio-stp-xway";
+ reg = <0xE100BB0 0x40>;
+ #gpio-cells = <2>;
+ gpio-controller;
+
+ lantiq,shadow = <0xffff>;
+ lantiq,groups = <0x7>;
+ lantiq,dsl = <0x3>;
+ lantiq,phy1 = <0x7>;
+ lantiq,phy2 = <0x7>;
+ /* lantiq,rising; */
+};
diff --git a/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt b/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt
new file mode 100644
index 000000000000..49819367a011
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt
@@ -0,0 +1,43 @@
+NXP LPC32xx SoC GPIO controller
+
+Required properties:
+- compatible: must be "nxp,lpc3220-gpio"
+- reg: Physical base address and length of the controller's registers.
+- gpio-controller: Marks the device node as a GPIO controller.
+- #gpio-cells: Should be 3:
+ 1) bank:
+ 0: GPIO P0
+ 1: GPIO P1
+ 2: GPIO P2
+ 3: GPIO P3
+ 4: GPI P3
+ 5: GPO P3
+ 2) pin number
+ 3) optional parameters:
+ - bit 0 specifies polarity (0 for normal, 1 for inverted)
+- reg: Index of the GPIO group
+
+Example:
+
+ gpio: gpio@40028000 {
+ compatible = "nxp,lpc3220-gpio";
+ reg = <0x40028000 0x1000>;
+ gpio-controller;
+ #gpio-cells = <3>; /* bank, pin, flags */
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led0 {
+ gpios = <&gpio 5 1 1>; /* GPO_P3 1, active low */
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led1 {
+ gpios = <&gpio 5 14 1>; /* GPO_P3 14, active low */
+ linux,default-trigger = "timer";
+ default-state = "off";
+ };
+ };
diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt
index 1e34cfe5ebea..05428f39d9ac 100644
--- a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt
@@ -3,19 +3,25 @@
Required properties:
- compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio"
- reg : Address and length of the register set for the device
-- interrupts : Should be the port interrupt shared by all gpio pins, if
-- interrupt-name : Should be the name of irq resource.
- one number.
+- interrupts : Should be the port interrupt shared by all gpio pins.
+ There're three gpio interrupts in arch-pxa, and they're gpio0,
+ gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,
+ gpio_mux.
+- interrupt-name : Should be the name of irq resource. Each interrupt
+ binds its interrupt-name.
+- interrupt-controller : Identifies the node as an interrupt controller.
+- #interrupt-cells: Specifies the number of cells needed to encode an
+ interrupt source.
- gpio-controller : Marks the device node as a gpio controller.
- #gpio-cells : Should be one. It is the pin number.
Example:
gpio: gpio@d4019000 {
- compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
+ compatible = "mrvl,mmp-gpio";
reg = <0xd4019000 0x1000>;
- interrupts = <49>, <17>, <18>;
- interrupt-name = "gpio_mux", "gpio0", "gpio1";
+ interrupts = <49>;
+ interrupt-name = "gpio_mux";
gpio-controller;
#gpio-cells = <1>;
interrupt-controller;
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
new file mode 100644
index 000000000000..1bfc02de1b0c
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
@@ -0,0 +1,16 @@
+* Freescale MXS Inter IC (I2C) Controller
+
+Required properties:
+- compatible: Should be "fsl,<chip>-i2c"
+- reg: Should contain registers location and length
+- interrupts: Should contain ERROR and DMA interrupts
+
+Examples:
+
+i2c0: i2c@80058000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx28-i2c";
+ reg = <0x80058000 2000>;
+ interrupts = <111 68>;
+};
diff --git a/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt b/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt
index 071eb3caae91..b891ee218354 100644
--- a/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt
@@ -3,34 +3,31 @@
Required properties :
- reg : Offset and length of the register set for the device
- - compatible : should be "mrvl,mmp-twsi" where CHIP is the name of a
+ - compatible : should be "mrvl,mmp-twsi" where mmp is the name of a
compatible processor, e.g. pxa168, pxa910, mmp2, mmp3.
For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required
as shown in the example below.
Recommended properties :
- - interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
+ - interrupts : the interrupt number
- interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
+ services interrupts for this device. If the parent is the default
+ interrupt controller in device tree, it could be ignored.
- mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
status register of i2c controller instead.
- mrvl,i2c-fast-mode : Enable fast mode of i2c controller.
Examples:
twsi1: i2c@d4011000 {
- compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
+ compatible = "mrvl,mmp-twsi";
reg = <0xd4011000 0x1000>;
interrupts = <7>;
mrvl,i2c-fast-mode;
};
twsi2: i2c@d4025000 {
- compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
+ compatible = "mrvl,mmp-twsi";
reg = <0xd4025000 0x1000>;
interrupts = <58>;
};
diff --git a/Documentation/devicetree/bindings/i2c/mux.txt b/Documentation/devicetree/bindings/i2c/mux.txt
new file mode 100644
index 000000000000..af84cce5cd7b
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/mux.txt
@@ -0,0 +1,60 @@
+Common i2c bus multiplexer/switch properties.
+
+An i2c bus multiplexer/switch will have several child busses that are
+numbered uniquely in a device dependent manner. The nodes for an i2c bus
+multiplexer/switch will have one child node for each child
+bus.
+
+Required properties:
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+Required properties for child nodes:
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg : The sub-bus number.
+
+Optional properties for child nodes:
+- Other properties specific to the multiplexer/switch hardware.
+- Child nodes conforming to i2c bus binding
+
+
+Example :
+
+ /*
+ An NXP pca9548 8 channel I2C multiplexer at address 0x70
+ with two NXP pca8574 GPIO expanders attached, one each to
+ ports 3 and 4.
+ */
+
+ mux@70 {
+ compatible = "nxp,pca9548";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ gpio1: gpio@38 {
+ compatible = "nxp,pca8574";
+ reg = <0x38>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+ };
+ i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+
+ gpio2: gpio@38 {
+ compatible = "nxp,pca8574";
+ reg = <0x38>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/i2c/pnx.txt b/Documentation/devicetree/bindings/i2c/pnx.txt
new file mode 100644
index 000000000000..fe98ada33ee4
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/pnx.txt
@@ -0,0 +1,36 @@
+* NXP PNX I2C Controller
+
+Required properties:
+
+ - reg: Offset and length of the register set for the device
+ - compatible: should be "nxp,pnx-i2c"
+ - interrupts: configure one interrupt line
+ - #address-cells: always 1 (for i2c addresses)
+ - #size-cells: always 0
+ - interrupt-parent: the phandle for the interrupt controller that
+ services interrupts for this device.
+
+Optional properties:
+
+ - clock-frequency: desired I2C bus clock frequency in Hz, Default: 100000 Hz
+
+Examples:
+
+ i2c1: i2c@400a0000 {
+ compatible = "nxp,pnx-i2c";
+ reg = <0x400a0000 0x100>;
+ interrupt-parent = <&mic>;
+ interrupts = <51 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c@400a8000 {
+ compatible = "nxp,pnx-i2c";
+ reg = <0x400a8000 0x100>;
+ interrupt-parent = <&mic>;
+ interrupts = <50 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ };
diff --git a/Documentation/devicetree/bindings/i2c/samsung-i2c.txt b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
index 38832c712919..b6cb5a12c672 100644
--- a/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
@@ -6,14 +6,18 @@ Required properties:
- compatible: value should be either of the following.
(a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
(b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
+ (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
+ inside HDMIPHY block found on several samsung SoCs
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: interrupt number to the cpu.
- samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.
- - gpios: The order of the gpios should be the following: <SDA, SCL>.
- The gpio specifier depends on the gpio controller.
Optional properties:
+ - gpios: The order of the gpios should be the following: <SDA, SCL>.
+ The gpio specifier depends on the gpio controller. Required in all
+ cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output
+ lines are permanently wired to the respective client
- samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not
specified, default value is 0.
- samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
diff --git a/Documentation/devicetree/bindings/i2c/xiic.txt b/Documentation/devicetree/bindings/i2c/xiic.txt
new file mode 100644
index 000000000000..ceabbe91ae44
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/xiic.txt
@@ -0,0 +1,22 @@
+Xilinx IIC controller:
+
+Required properties:
+- compatible : Must be "xlnx,xps-iic-2.00.a"
+- reg : IIC register location and length
+- interrupts : IIC controller unterrupt
+- #address-cells = <1>
+- #size-cells = <0>
+
+Optional properties:
+- Child nodes conforming to i2c bus binding
+
+Example:
+
+ axi_iic_0: i2c@40800000 {
+ compatible = "xlnx,xps-iic-2.00.a";
+ interrupts = < 1 2 >;
+ reg = < 0x40800000 0x10000 >;
+
+ #size-cells = <0>;
+ #address-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/input/spear-keyboard.txt b/Documentation/devicetree/bindings/input/spear-keyboard.txt
new file mode 100644
index 000000000000..4a846d26da23
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/spear-keyboard.txt
@@ -0,0 +1,20 @@
+* SPEAr keyboard controller
+
+Required properties:
+- compatible: "st,spear300-kbd"
+
+Optional properties, in addition to those specified by the shared
+matrix-keyboard bindings:
+- autorepeat: bool: enables key autorepeat
+- st,mode: keyboard mode: 0 - 9x9, 1 - 6x6, 2 - 2x2
+
+Example:
+
+kbd@fc400000 {
+ compatible = "st,spear300-kbd";
+ reg = <0xfc400000 0x100>;
+ linux,keymap = < 0x00030012
+ 0x0102003a >;
+ autorepeat;
+ st,mode = <0>;
+};
diff --git a/Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt b/Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt
new file mode 100644
index 000000000000..41cbf4b7a670
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt
@@ -0,0 +1,16 @@
+* NXP LPC32xx SoC Touchscreen Controller (TSC)
+
+Required properties:
+- compatible: must be "nxp,lpc3220-tsc"
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- interrupts: The TSC/ADC interrupt
+
+Example:
+
+ tsc@40048000 {
+ compatible = "nxp,lpc3220-tsc";
+ reg = <0x40048000 0x1000>;
+ interrupt-parent = <&mic>;
+ interrupts = <39 0>;
+ };
diff --git a/Documentation/devicetree/bindings/input/twl6040-vibra.txt b/Documentation/devicetree/bindings/input/twl6040-vibra.txt
new file mode 100644
index 000000000000..5b1918b818fb
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/twl6040-vibra.txt
@@ -0,0 +1,37 @@
+Vibra driver for the twl6040 family
+
+The vibra driver is a child of the twl6040 MFD dirver.
+Documentation/devicetree/bindings/mfd/twl6040.txt
+
+Required properties:
+- compatible : Must be "ti,twl6040-vibra";
+- interrupts: 4, Vibra overcurrent interrupt
+- vddvibl-supply: Regulator supplying the left vibra motor
+- vddvibr-supply: Regulator supplying the right vibra motor
+- vibldrv_res: Board specific left driver resistance
+- vibrdrv_res: Board specific right driver resistance
+- viblmotor_res: Board specific left motor resistance
+- vibrmotor_res: Board specific right motor resistance
+
+Optional properties:
+- vddvibl_uV: If the vddvibl default voltage need to be changed
+- vddvibr_uV: If the vddvibr default voltage need to be changed
+
+Example:
+/*
+ * 8-channel high quality low-power audio codec
+ * http://www.ti.com/lit/ds/symlink/twl6040.pdf
+ */
+twl6040: twl6040@4b {
+ ...
+ twl6040_vibra: twl6040@1 {
+ compatible = "ti,twl6040-vibra";
+ interrupts = <4>;
+ vddvibl-supply = <&vbat>;
+ vddvibr-supply = <&vbat>;
+ vibldrv_res = <8>;
+ vibrdrv_res = <3>;
+ viblmotor_res = <10>;
+ vibrmotor_res = <10>;
+ };
+};
diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt b/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt
new file mode 100644
index 000000000000..099d9362ebc1
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt
@@ -0,0 +1,14 @@
+NVIDIA Tegra 20 GART
+
+Required properties:
+- compatible: "nvidia,tegra20-gart"
+- reg: Two pairs of cells specifying the physical address and size of
+ the memory controller registers and the GART aperture respectively.
+
+Example:
+
+ gart {
+ compatible = "nvidia,tegra20-gart";
+ reg = <0x7000f024 0x00000018 /* controller registers */
+ 0x58000000 0x02000000>; /* GART aperture */
+ };
diff --git a/Documentation/devicetree/bindings/mfd/da9052-i2c.txt b/Documentation/devicetree/bindings/mfd/da9052-i2c.txt
new file mode 100644
index 000000000000..1857f4a6b9a9
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/da9052-i2c.txt
@@ -0,0 +1,60 @@
+* Dialog DA9052/53 Power Management Integrated Circuit (PMIC)
+
+Required properties:
+- compatible : Should be "dlg,da9052", "dlg,da9053-aa",
+ "dlg,da9053-ab", or "dlg,da9053-bb"
+
+Sub-nodes:
+- regulators : Contain the regulator nodes. The DA9052/53 regulators are
+ bound using their names as listed below:
+
+ buck0 : regulator BUCK0
+ buck1 : regulator BUCK1
+ buck2 : regulator BUCK2
+ buck3 : regulator BUCK3
+ ldo4 : regulator LDO4
+ ldo5 : regulator LDO5
+ ldo6 : regulator LDO6
+ ldo7 : regulator LDO7
+ ldo8 : regulator LDO8
+ ldo9 : regulator LDO9
+ ldo10 : regulator LDO10
+ ldo11 : regulator LDO11
+ ldo12 : regulator LDO12
+ ldo13 : regulator LDO13
+
+ The bindings details of individual regulator device can be found in:
+ Documentation/devicetree/bindings/regulator/regulator.txt
+
+Examples:
+
+i2c@63fc8000 { /* I2C1 */
+ status = "okay";
+
+ pmic: dialog@48 {
+ compatible = "dlg,da9053-aa";
+ reg = <0x48>;
+
+ regulators {
+ buck0 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <2075000>;
+ };
+
+ buck1 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <2075000>;
+ };
+
+ buck2 {
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <2500000>;
+ };
+
+ buck3 {
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <2500000>;
+ };
+ };
+ };
+};
diff --git a/Documentation/devicetree/bindings/mfd/tps65910.txt b/Documentation/devicetree/bindings/mfd/tps65910.txt
new file mode 100644
index 000000000000..645f5eaadb3f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/tps65910.txt
@@ -0,0 +1,133 @@
+TPS65910 Power Management Integrated Circuit
+
+Required properties:
+- compatible: "ti,tps65910" or "ti,tps65911"
+- reg: I2C slave address
+- interrupts: the interrupt outputs of the controller
+- #gpio-cells: number of cells to describe a GPIO, this should be 2.
+ The first cell is the GPIO number.
+ The second cell is used to specify additional options <unused>.
+- gpio-controller: mark the device as a GPIO controller
+- #interrupt-cells: the number of cells to describe an IRQ, this should be 2.
+ The first cell is the IRQ number.
+ The second cell is the flags, encoded as the trigger masks from
+ Documentation/devicetree/bindings/interrupts.txt
+- regulators: This is the list of child nodes that specify the regulator
+ initialization data for defined regulators. Not all regulators for the given
+ device need to be present. The definition for each of these nodes is defined
+ using the standard binding for regulators found at
+ Documentation/devicetree/bindings/regulator/regulator.txt.
+
+ The valid names for regulators are:
+ tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1,
+ vaux2, vaux33, vmmc
+ tps65911: vrtc, vio, vdd1, vdd3, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5,
+ ldo6, ldo7, ldo8
+
+Optional properties:
+- ti,vmbch-threshold: (tps65911) main battery charged threshold
+ comparator. (see VMBCH_VSEL in TPS65910 datasheet)
+- ti,vmbch2-threshold: (tps65911) main battery discharged threshold
+ comparator. (see VMBCH_VSEL in TPS65910 datasheet)
+- ti,en-gpio-sleep: enable sleep control for gpios
+ There should be 9 entries here, one for each gpio.
+
+Regulator Optional properties:
+- ti,regulator-ext-sleep-control: enable external sleep
+ control through external inputs [0 (not enabled), 1 (EN1), 2 (EN2) or 4(EN3)]
+ If this property is not defined, it defaults to 0 (not enabled).
+
+Example:
+
+ pmu: tps65910@d2 {
+ compatible = "ti,tps65910";
+ reg = <0xd2>;
+ interrupt-parent = <&intc>;
+ interrupts = < 0 118 0x04 >;
+
+ #gpio-cells = <2>;
+ gpio-controller;
+
+ #interrupt-cells = <2>;
+ interrupt-controller;
+
+ ti,vmbch-threshold = 0;
+ ti,vmbch2-threshold = 0;
+
+ ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>;
+
+ regulators {
+ vdd1_reg: vdd1 {
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,regulator-ext-sleep-control = <0>;
+ };
+ vdd2_reg: vdd2 {
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,regulator-ext-sleep-control = <4>;
+ };
+ vddctrl_reg: vddctrl {
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,regulator-ext-sleep-control = <0>;
+ };
+ vio_reg: vio {
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,regulator-ext-sleep-control = <1>;
+ };
+ ldo1_reg: ldo1 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <3300000>;
+ ti,regulator-ext-sleep-control = <0>;
+ };
+ ldo2_reg: ldo2 {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ ti,regulator-ext-sleep-control = <0>;
+ };
+ ldo3_reg: ldo3 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <3300000>;
+ ti,regulator-ext-sleep-control = <0>;
+ };
+ ldo4_reg: ldo4 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ ti,regulator-ext-sleep-control = <0>;
+ };
+ ldo5_reg: ldo5 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <3300000>;
+ ti,regulator-ext-sleep-control = <0>;
+ };
+ ldo6_reg: ldo6 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ ti,regulator-ext-sleep-control = <0>;
+ };
+ ldo7_reg: ldo7 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,regulator-ext-sleep-control = <1>;
+ };
+ ldo8_reg: ldo8 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ ti,regulator-ext-sleep-control = <1>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/mfd/twl6040.txt b/Documentation/devicetree/bindings/mfd/twl6040.txt
new file mode 100644
index 000000000000..bc67c6f424aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/twl6040.txt
@@ -0,0 +1,62 @@
+Texas Instruments TWL6040 family
+
+The TWL6040s are 8-channel high quality low-power audio codecs providing audio
+and vibra functionality on OMAP4+ platforms.
+They are connected ot the host processor via i2c for commands, McPDM for audio
+data and commands.
+
+Required properties:
+- compatible : Must be "ti,twl6040";
+- reg: must be 0x4b for i2c address
+- interrupts: twl6040 has one interrupt line connecteded to the main SoC
+- interrupt-parent: The parent interrupt controller
+- twl6040,audpwron-gpio: Power on GPIO line for the twl6040
+
+- vio-supply: Regulator for the twl6040 VIO supply
+- v2v1-supply: Regulator for the twl6040 V2V1 supply
+
+Optional properties, nodes:
+- enable-active-high: To power on the twl6040 during boot.
+
+Vibra functionality
+Required properties:
+- vddvibl-supply: Regulator for the left vibra motor
+- vddvibr-supply: Regulator for the right vibra motor
+- vibra { }: Configuration section for vibra parameters containing the following
+ properties:
+- ti,vibldrv-res: Resistance parameter for left driver
+- ti,vibrdrv-res: Resistance parameter for right driver
+- ti,viblmotor-res: Resistance parameter for left motor
+- ti,viblmotor-res: Resistance parameter for right motor
+
+Optional properties within vibra { } section:
+- vddvibl_uV: If the vddvibl default voltage need to be changed
+- vddvibr_uV: If the vddvibr default voltage need to be changed
+
+Example:
+&i2c1 {
+ twl6040: twl@4b {
+ compatible = "ti,twl6040";
+ reg = <0x4b>;
+
+ interrupts = <0 119 4>;
+ interrupt-parent = <&gic>;
+ twl6040,audpwron-gpio = <&gpio4 31 0>;
+
+ vio-supply = <&v1v8>;
+ v2v1-supply = <&v2v1>;
+ enable-active-high;
+
+ /* regulators for vibra motor */
+ vddvibl-supply = <&vbat>;
+ vddvibr-supply = <&vbat>;
+
+ vibra {
+ /* Vibra driver, motor resistance parameters */
+ ti,vibldrv-res = <8>;
+ ti,vibrdrv-res = <3>;
+ ti,viblmotor-res = <10>;
+ ti,vibrmotor-res = <10>;
+ };
+ };
+};
diff --git a/Documentation/devicetree/bindings/misc/bmp085.txt b/Documentation/devicetree/bindings/misc/bmp085.txt
new file mode 100644
index 000000000000..91dfda2e4e11
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/bmp085.txt
@@ -0,0 +1,20 @@
+BMP085/BMP18x digital pressure sensors
+
+Required properties:
+- compatible: bosch,bmp085
+
+Optional properties:
+- chip-id: configurable chip id for non-default chip revisions
+- temp-measurement-period: temperature measurement period (milliseconds)
+- default-oversampling: default oversampling value to be used at startup,
+ value range is 0-3 with rising sensitivity.
+
+Example:
+
+pressure@77 {
+ compatible = "bosch,bmp085";
+ reg = <0x77>;
+ chip-id = <10>;
+ temp-measurement-period = <100>;
+ default-oversampling = <2>;
+};
diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
index 64bcb8be973c..0d93b4b0e0e3 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -11,9 +11,11 @@ Required properties:
- interrupt-parent : interrupt source phandle.
- clock-frequency : specifies eSDHC base clock frequency.
- sdhci,wp-inverted : (optional) specifies that eSDHC controller
- reports inverted write-protect state;
+ reports inverted write-protect state; New devices should use
+ the generic "wp-inverted" property.
- sdhci,1-bit-only : (optional) specifies that a controller can
- only handle 1-bit data transfers.
+ only handle 1-bit data transfers. New devices should use the
+ generic "bus-width = <1>" property.
- sdhci,auto-cmd12: (optional) specifies that a controller can
only handle auto CMD12.
diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
index ab22fe6e73ab..c7e404b3ef05 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
@@ -9,7 +9,7 @@ Required properties:
- interrupts : Should contain eSDHC interrupt
Optional properties:
-- fsl,card-wired : Indicate the card is wired to host permanently
+- non-removable : Indicate the card is wired to host permanently
- fsl,cd-internal : Indicate to use controller internal card detection
- fsl,wp-internal : Indicate to use controller internal write protection
- cd-gpios : Specify GPIOs for card detection
diff --git a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt
index 89a0084df2f7..d64aea5a4203 100644
--- a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt
+++ b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt
@@ -10,7 +10,8 @@ Required properties:
Optional properties:
- gpios : may specify GPIOs in this order: Card-Detect GPIO,
- Write-Protect GPIO.
+ Write-Protect GPIO. Note that this does not follow the
+ binding from mmc.txt, for historic reasons.
- interrupts : the interrupt of a card detect interrupt.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt
new file mode 100644
index 000000000000..6e70dcde0a71
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/mmc.txt
@@ -0,0 +1,27 @@
+These properties are common to multiple MMC host controllers. Any host
+that requires the respective functionality should implement them using
+these definitions.
+
+Required properties:
+- bus-width: Number of data lines, can be <1>, <4>, or <8>
+
+Optional properties:
+- cd-gpios : Specify GPIOs for card detection, see gpio binding
+- wp-gpios : Specify GPIOs for write protection, see gpio binding
+- cd-inverted: when present, polarity on the wp gpio line is inverted
+- wp-inverted: when present, polarity on the wp gpio line is inverted
+- non-removable: non-removable slot (like eMMC)
+- max-frequency: maximum operating clock frequency
+
+Example:
+
+sdhci@ab000000 {
+ compatible = "sdhci";
+ reg = <0xab000000 0x200>;
+ interrupts = <23>;
+ bus-width = <4>;
+ cd-gpios = <&gpio 69 0>;
+ cd-inverted;
+ wp-gpios = <&gpio 70 0>;
+ max-frequency = <50000000>;
+}
diff --git a/Documentation/devicetree/bindings/mmc/mmci.txt b/Documentation/devicetree/bindings/mmc/mmci.txt
new file mode 100644
index 000000000000..14a81d526118
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/mmci.txt
@@ -0,0 +1,19 @@
+* ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1
+
+The ARM PrimeCell MMCI PL180 and PL181 provides and interface for
+reading and writing to MultiMedia and SD cards alike.
+
+Required properties:
+- compatible : contains "arm,pl18x", "arm,primecell".
+- reg : contains pl18x registers and length.
+- interrupts : contains the device IRQ(s).
+- arm,primecell-periphid : contains the PrimeCell Peripheral ID.
+
+Optional properties:
+- wp-gpios : contains any write protect (ro) gpios
+- cd-gpios : contains any card detection gpios
+- cd-inverted : indicates whether the cd gpio is inverted
+- max-frequency : contains the maximum operating frequency
+- bus-width : number of data lines, can be <1>, <4>, or <8>
+- mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable
+- mmc-cap-sd-highspeed : indicates whether SD is high speed capable
diff --git a/Documentation/devicetree/bindings/mmc/mxs-mmc.txt b/Documentation/devicetree/bindings/mmc/mxs-mmc.txt
new file mode 100644
index 000000000000..14d870a9e3db
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/mxs-mmc.txt
@@ -0,0 +1,25 @@
+* Freescale MXS MMC controller
+
+The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller
+to support MMC, SD, and SDIO types of memory cards.
+
+Required properties:
+- compatible: Should be "fsl,<chip>-mmc". The supported chips include
+ imx23 and imx28.
+- reg: Should contain registers location and length
+- interrupts: Should contain ERROR and DMA interrupts
+- fsl,ssp-dma-channel: APBH DMA channel for the SSP
+- bus-width: Number of data lines, can be <1>, <4>, or <8>
+
+Optional properties:
+- wp-gpios: Specify GPIOs for write protection
+
+Examples:
+
+ssp0: ssp@80010000 {
+ compatible = "fsl,imx28-mmc";
+ reg = <0x80010000 2000>;
+ interrupts = <96 82>;
+ fsl,ssp-dma-channel = <0>;
+ bus-width = <8>;
+};
diff --git a/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt
index 7e51154679a6..f77c3031607f 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt
@@ -7,12 +7,12 @@ Required properties:
- compatible : Should be "nvidia,<chip>-sdhci"
- reg : Should contain SD/MMC registers location and length
- interrupts : Should contain SD/MMC interrupt
+- bus-width : Number of data lines, can be <1>, <4>, or <8>
Optional properties:
- cd-gpios : Specify GPIOs for card detection
- wp-gpios : Specify GPIOs for write protection
- power-gpios : Specify GPIOs for power control
-- support-8bit : Boolean, indicates if 8-bit mode should be used.
Example:
@@ -23,5 +23,5 @@ sdhci@c8000200 {
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 155 0>; /* gpio PT3 */
- support-8bit;
+ bus-width = <8>;
};
diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index dbd4368ab8cc..8a53958c9a9f 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -15,7 +15,7 @@ Optional properties:
ti,dual-volt: boolean, supports dual voltage cards
<supply-name>-supply: phandle to the regulator device tree node
"supply-name" examples are "vmmc", "vmmc_aux" etc
-ti,bus-width: Number of data lines, default assumed is 1 if the property is missing.
+bus-width: Number of data lines, default assumed is 1 if the property is missing.
cd-gpios: GPIOs for card detection
wp-gpios: GPIOs for write protection
ti,non-removable: non-removable slot (like eMMC)
@@ -27,7 +27,7 @@ Example:
reg = <0x4809c000 0x400>;
ti,hwmods = "mmc1";
ti,dual-volt;
- ti,bus-width = <4>;
+ bus-width = <4>;
vmmc-supply = <&vmmc>; /* phandle to regulator node */
ti,non-removable;
};
diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
index 5903ecf6e895..a20069502f5a 100644
--- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
@@ -27,13 +27,13 @@ nand0: nand@40000000,0 {
reg = <0x40000000 0x10000000
0xffffe800 0x200
>;
- atmel,nand-addr-offset = <21>;
- atmel,nand-cmd-offset = <22>;
+ atmel,nand-addr-offset = <21>; /* ale */
+ atmel,nand-cmd-offset = <22>; /* cle */
nand-on-flash-bbt;
nand-ecc-mode = "soft";
- gpios = <&pioC 13 0
- &pioC 14 0
- 0
+ gpios = <&pioC 13 0 /* rdy */
+ &pioC 14 0 /* nce */
+ 0 /* cd */
>;
partition@0 {
...
diff --git a/Documentation/devicetree/bindings/mtd/orion-nand.txt b/Documentation/devicetree/bindings/mtd/orion-nand.txt
new file mode 100644
index 000000000000..b2356b7d2fa4
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/orion-nand.txt
@@ -0,0 +1,50 @@
+NAND support for Marvell Orion SoC platforms
+
+Required properties:
+- compatible : "mrvl,orion-nand".
+- reg : Base physical address of the NAND and length of memory mapped
+ region
+
+Optional properties:
+- cle : Address line number connected to CLE. Default is 0
+- ale : Address line number connected to ALE. Default is 1
+- bank-width : Width in bytes of the device. Default is 1
+- chip-delay : Chip dependent delay for transferring data from array to read
+ registers in usecs
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. See partition.txt for more detail.
+
+Example:
+
+nand@f4000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cle = <0>;
+ ale = <1>;
+ bank-width = <1>;
+ chip-delay = <25>;
+ compatible = "mrvl,orion-nand";
+ reg = <0xf4000000 0x400>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0000000 0x100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "uImage";
+ reg = <0x0100000 0x200000>;
+ };
+
+ partition@300000 {
+ label = "dtb";
+ reg = <0x0300000 0x100000>;
+ };
+
+ partition@400000 {
+ label = "root";
+ reg = <0x0400000 0x7d00000>;
+ };
+};
diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
index 1ad80d5865a9..f31b686d4556 100644
--- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
@@ -1,4 +1,4 @@
-Flexcan CAN contoller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
+Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
Required properties:
diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt
index de439517dff0..7ab9e1a2d8be 100644
--- a/Documentation/devicetree/bindings/net/fsl-fec.txt
+++ b/Documentation/devicetree/bindings/net/fsl-fec.txt
@@ -14,7 +14,7 @@ Optional properties:
Example:
-fec@83fec000 {
+ethernet@83fec000 {
compatible = "fsl,imx51-fec", "fsl,imx27-fec";
reg = <0x83fec000 0x4000>;
interrupts = <87>;
diff --git a/Documentation/devicetree/bindings/net/lpc-eth.txt b/Documentation/devicetree/bindings/net/lpc-eth.txt
new file mode 100644
index 000000000000..585021acd178
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/lpc-eth.txt
@@ -0,0 +1,24 @@
+* NXP LPC32xx SoC Ethernet Controller
+
+Required properties:
+- compatible: Should be "nxp,lpc-eth"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain ethernet controller interrupt
+
+Optional properties:
+- phy-mode: String, operation mode of the PHY interface.
+ Supported values are: "mii", "rmii" (default)
+- use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering
+- local-mac-address : 6 bytes, mac address
+
+Example:
+
+ mac: ethernet@31060000 {
+ compatible = "nxp,lpc-eth";
+ reg = <0x31060000 0x1000>;
+ interrupt-parent = <&mic>;
+ interrupts = <29 0>;
+
+ phy-mode = "rmii";
+ use-iram;
+ };
diff --git a/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt b/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt
new file mode 100644
index 000000000000..79384113c2b0
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt
@@ -0,0 +1,127 @@
+Properties for an MDIO bus multiplexer/switch controlled by GPIO pins.
+
+This is a special case of a MDIO bus multiplexer. One or more GPIO
+lines are used to control which child bus is connected.
+
+Required properties in addition to the generic multiplexer properties:
+
+- compatible : mdio-mux-gpio.
+- gpios : GPIO specifiers for each GPIO line. One or more must be specified.
+
+
+Example :
+
+ /* The parent MDIO bus. */
+ smi1: mdio@1180000001900 {
+ compatible = "cavium,octeon-3860-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x11800 0x00001900 0x0 0x40>;
+ };
+
+ /*
+ An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a
+ pair of GPIO lines. Child busses 2 and 3 populated with 4
+ PHYs each.
+ */
+ mdio-mux {
+ compatible = "mdio-mux-gpio";
+ gpios = <&gpio1 3 0>, <&gpio1 4 0>;
+ mdio-parent-bus = <&smi1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy11: ethernet-phy@1 {
+ reg = <1>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <10 8>; /* Pin 10, active low */
+ };
+ phy12: ethernet-phy@2 {
+ reg = <2>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <10 8>; /* Pin 10, active low */
+ };
+ phy13: ethernet-phy@3 {
+ reg = <3>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <10 8>; /* Pin 10, active low */
+ };
+ phy14: ethernet-phy@4 {
+ reg = <4>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <10 8>; /* Pin 10, active low */
+ };
+ };
+
+ mdio@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy21: ethernet-phy@1 {
+ reg = <1>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <12 8>; /* Pin 12, active low */
+ };
+ phy22: ethernet-phy@2 {
+ reg = <2>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <12 8>; /* Pin 12, active low */
+ };
+ phy23: ethernet-phy@3 {
+ reg = <3>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <12 8>; /* Pin 12, active low */
+ };
+ phy24: ethernet-phy@4 {
+ reg = <4>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <12 8>; /* Pin 12, active low */
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/net/mdio-mux.txt b/Documentation/devicetree/bindings/net/mdio-mux.txt
new file mode 100644
index 000000000000..f65606f8d632
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/mdio-mux.txt
@@ -0,0 +1,136 @@
+Common MDIO bus multiplexer/switch properties.
+
+An MDIO bus multiplexer/switch will have several child busses that are
+numbered uniquely in a device dependent manner. The nodes for an MDIO
+bus multiplexer/switch will have one child node for each child bus.
+
+Required properties:
+- mdio-parent-bus : phandle to the parent MDIO bus.
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+Optional properties:
+- Other properties specific to the multiplexer/switch hardware.
+
+Required properties for child nodes:
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg : The sub-bus number.
+
+
+Example :
+
+ /* The parent MDIO bus. */
+ smi1: mdio@1180000001900 {
+ compatible = "cavium,octeon-3860-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x11800 0x00001900 0x0 0x40>;
+ };
+
+ /*
+ An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a
+ pair of GPIO lines. Child busses 2 and 3 populated with 4
+ PHYs each.
+ */
+ mdio-mux {
+ compatible = "mdio-mux-gpio";
+ gpios = <&gpio1 3 0>, <&gpio1 4 0>;
+ mdio-parent-bus = <&smi1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy11: ethernet-phy@1 {
+ reg = <1>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <10 8>; /* Pin 10, active low */
+ };
+ phy12: ethernet-phy@2 {
+ reg = <2>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <10 8>; /* Pin 10, active low */
+ };
+ phy13: ethernet-phy@3 {
+ reg = <3>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <10 8>; /* Pin 10, active low */
+ };
+ phy14: ethernet-phy@4 {
+ reg = <4>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <10 8>; /* Pin 10, active low */
+ };
+ };
+
+ mdio@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy21: ethernet-phy@1 {
+ reg = <1>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <12 8>; /* Pin 12, active low */
+ };
+ phy22: ethernet-phy@2 {
+ reg = <2>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <12 8>; /* Pin 12, active low */
+ };
+ phy23: ethernet-phy@3 {
+ reg = <3>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <12 8>; /* Pin 12, active low */
+ };
+ phy24: ethernet-phy@4 {
+ reg = <4>;
+ compatible = "marvell,88e1149r";
+ marvell,reg-init = <3 0x10 0 0x5777>,
+ <3 0x11 0 0x00aa>,
+ <3 0x12 0 0x4105>,
+ <3 0x13 0 0x0a60>;
+ interrupt-parent = <&gpio>;
+ interrupts = <12 8>; /* Pin 12, active low */
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
new file mode 100644
index 000000000000..ab19e6bc7d3b
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
@@ -0,0 +1,95 @@
+* Freescale IOMUX Controller (IOMUXC) for i.MX
+
+The IOMUX Controller (IOMUXC), together with the IOMUX, enables the IC
+to share one PAD to several functional blocks. The sharing is done by
+multiplexing the PAD input/output signals. For each PAD there are up to
+8 muxing options (called ALT modes). Since different modules require
+different PAD settings (like pull up, keeper, etc) the IOMUXC controls
+also the PAD settings parameters.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+Freescale IMX pin configuration node is a node of a group of pins which can be
+used for a specific device or function. This node represents both mux and config
+of the pins in that group. The 'mux' selects the function mode(also named mux
+mode) this pin can work on and the 'config' configures various pad settings
+such as pull-up, open drain, drive strength, etc.
+
+Required properties for iomux controller:
+- compatible: "fsl,<soc>-iomuxc"
+ Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
+
+Required properties for pin configuration node:
+- fsl,pins: two integers array, represents a group of pins mux and config
+ setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
+ pin working on a specific function, CONFIG is the pad setting value like
+ pull-up on this pin. Please refer to fsl,<soc>-pinctrl.txt for the valid
+ pins and functions of each SoC.
+
+Bits used for CONFIG:
+NO_PAD_CTL(1 << 31): indicate this pin does not need config.
+
+SION(1 << 30): Software Input On Field.
+Force the selected mux mode input path no matter of MUX_MODE functionality.
+By default the input path is determined by functionality of the selected
+mux mode (regular).
+
+Other bits are used for PAD setting.
+Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part
+of bits definitions.
+
+NOTE:
+Some requirements for using fsl,imx-pinctrl binding:
+1. We have pin function node defined under iomux controller node to represent
+ what pinmux functions this SoC supports.
+2. The pin configuration node intends to work on a specific function should
+ to be defined under that specific function node.
+ The function node's name should represent well about what function
+ this group of pins in this pin configuration node are working on.
+3. The driver can use the function node's name and pin configuration node's
+ name describe the pin function and group hierarchy.
+ For example, Linux IMX pinctrl driver takes the function node's name
+ as the function name and pin configuration node's name as group name to
+ create the map table.
+4. Each pin configuration node should have a phandle, devices can set pins
+ configurations by referring to the phandle of that pin configuration node.
+
+Examples:
+usdhc@0219c000 { /* uSDHC4 */
+ fsl,card-wired;
+ vmmc-supply = <&reg_3p3v>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+};
+
+iomuxc@020e0000 {
+ compatible = "fsl,imx6q-iomuxc";
+ reg = <0x020e0000 0x4000>;
+
+ /* shared pinctrl settings */
+ usdhc4 {
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */
+ 1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */
+ 1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */
+ 1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */
+ 1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */
+ 1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */
+ 1493 0x17059 /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */
+ 1501 0x17059 /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */
+ 1509 0x17059 /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */
+ 1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
+ };
+ };
+ ....
+};
+Refer to the IOMUXC controller chapter in imx6q datasheet,
+0x17059 means enable hysteresis, 47KOhm Pull Up, 50Mhz speed,
+80Ohm driver strength and Fast Slew Rate.
+User should refer to each SoC spec to set the correct value.
+
+TODO: when dtc macro support is available, we can change above raw data
+to dt macro which can get better readability in dts file.
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt
new file mode 100644
index 000000000000..b96fa4c31745
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt
@@ -0,0 +1,787 @@
+* Freescale IMX51 IOMUX Controller
+
+Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
+and usage.
+
+Required properties:
+- compatible: "fsl,imx51-iomuxc"
+- fsl,pins: two integers array, represents a group of pins mux and config
+ setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
+ pin working on a specific function, CONFIG is the pad setting value like
+ pull-up for this pin. Please refer to imx51 datasheet for the valid pad
+ config settings.
+
+CONFIG bits definition:
+PAD_CTL_HVE (1 << 13)
+PAD_CTL_HYS (1 << 8)
+PAD_CTL_PKE (1 << 7)
+PAD_CTL_PUE (1 << 6)
+PAD_CTL_PUS_100K_DOWN (0 << 4)
+PAD_CTL_PUS_47K_UP (1 << 4)
+PAD_CTL_PUS_100K_UP (2 << 4)
+PAD_CTL_PUS_22K_UP (3 << 4)
+PAD_CTL_ODE (1 << 3)
+PAD_CTL_DSE_LOW (0 << 1)
+PAD_CTL_DSE_MED (1 << 1)
+PAD_CTL_DSE_HIGH (2 << 1)
+PAD_CTL_DSE_MAX (3 << 1)
+PAD_CTL_SRE_FAST (1 << 0)
+PAD_CTL_SRE_SLOW (0 << 0)
+
+See below for available PIN_FUNC_ID for imx51:
+MX51_PAD_EIM_D16__AUD4_RXFS 0
+MX51_PAD_EIM_D16__AUD5_TXD 1
+MX51_PAD_EIM_D16__EIM_D16 2
+MX51_PAD_EIM_D16__GPIO2_0 3
+MX51_PAD_EIM_D16__I2C1_SDA 4
+MX51_PAD_EIM_D16__UART2_CTS 5
+MX51_PAD_EIM_D16__USBH2_DATA0 6
+MX51_PAD_EIM_D17__AUD5_RXD 7
+MX51_PAD_EIM_D17__EIM_D17 8
+MX51_PAD_EIM_D17__GPIO2_1 9
+MX51_PAD_EIM_D17__UART2_RXD 10
+MX51_PAD_EIM_D17__UART3_CTS 11
+MX51_PAD_EIM_D17__USBH2_DATA1 12
+MX51_PAD_EIM_D18__AUD5_TXC 13
+MX51_PAD_EIM_D18__EIM_D18 14
+MX51_PAD_EIM_D18__GPIO2_2 15
+MX51_PAD_EIM_D18__UART2_TXD 16
+MX51_PAD_EIM_D18__UART3_RTS 17
+MX51_PAD_EIM_D18__USBH2_DATA2 18
+MX51_PAD_EIM_D19__AUD4_RXC 19
+MX51_PAD_EIM_D19__AUD5_TXFS 20
+MX51_PAD_EIM_D19__EIM_D19 21
+MX51_PAD_EIM_D19__GPIO2_3 22
+MX51_PAD_EIM_D19__I2C1_SCL 23
+MX51_PAD_EIM_D19__UART2_RTS 24
+MX51_PAD_EIM_D19__USBH2_DATA3 25
+MX51_PAD_EIM_D20__AUD4_TXD 26
+MX51_PAD_EIM_D20__EIM_D20 27
+MX51_PAD_EIM_D20__GPIO2_4 28
+MX51_PAD_EIM_D20__SRTC_ALARM_DEB 29
+MX51_PAD_EIM_D20__USBH2_DATA4 30
+MX51_PAD_EIM_D21__AUD4_RXD 31
+MX51_PAD_EIM_D21__EIM_D21 32
+MX51_PAD_EIM_D21__GPIO2_5 33
+MX51_PAD_EIM_D21__SRTC_ALARM_DEB 34
+MX51_PAD_EIM_D21__USBH2_DATA5 35
+MX51_PAD_EIM_D22__AUD4_TXC 36
+MX51_PAD_EIM_D22__EIM_D22 37
+MX51_PAD_EIM_D22__GPIO2_6 38
+MX51_PAD_EIM_D22__USBH2_DATA6 39
+MX51_PAD_EIM_D23__AUD4_TXFS 40
+MX51_PAD_EIM_D23__EIM_D23 41
+MX51_PAD_EIM_D23__GPIO2_7 42
+MX51_PAD_EIM_D23__SPDIF_OUT1 43
+MX51_PAD_EIM_D23__USBH2_DATA7 44
+MX51_PAD_EIM_D24__AUD6_RXFS 45
+MX51_PAD_EIM_D24__EIM_D24 46
+MX51_PAD_EIM_D24__GPIO2_8 47
+MX51_PAD_EIM_D24__I2C2_SDA 48
+MX51_PAD_EIM_D24__UART3_CTS 49
+MX51_PAD_EIM_D24__USBOTG_DATA0 50
+MX51_PAD_EIM_D25__EIM_D25 51
+MX51_PAD_EIM_D25__KEY_COL6 52
+MX51_PAD_EIM_D25__UART2_CTS 53
+MX51_PAD_EIM_D25__UART3_RXD 54
+MX51_PAD_EIM_D25__USBOTG_DATA1 55
+MX51_PAD_EIM_D26__EIM_D26 56
+MX51_PAD_EIM_D26__KEY_COL7 57
+MX51_PAD_EIM_D26__UART2_RTS 58
+MX51_PAD_EIM_D26__UART3_TXD 59
+MX51_PAD_EIM_D26__USBOTG_DATA2 60
+MX51_PAD_EIM_D27__AUD6_RXC 61
+MX51_PAD_EIM_D27__EIM_D27 62
+MX51_PAD_EIM_D27__GPIO2_9 63
+MX51_PAD_EIM_D27__I2C2_SCL 64
+MX51_PAD_EIM_D27__UART3_RTS 65
+MX51_PAD_EIM_D27__USBOTG_DATA3 66
+MX51_PAD_EIM_D28__AUD6_TXD 67
+MX51_PAD_EIM_D28__EIM_D28 68
+MX51_PAD_EIM_D28__KEY_ROW4 69
+MX51_PAD_EIM_D28__USBOTG_DATA4 70
+MX51_PAD_EIM_D29__AUD6_RXD 71
+MX51_PAD_EIM_D29__EIM_D29 72
+MX51_PAD_EIM_D29__KEY_ROW5 73
+MX51_PAD_EIM_D29__USBOTG_DATA5 74
+MX51_PAD_EIM_D30__AUD6_TXC 75
+MX51_PAD_EIM_D30__EIM_D30 76
+MX51_PAD_EIM_D30__KEY_ROW6 77
+MX51_PAD_EIM_D30__USBOTG_DATA6 78
+MX51_PAD_EIM_D31__AUD6_TXFS 79
+MX51_PAD_EIM_D31__EIM_D31 80
+MX51_PAD_EIM_D31__KEY_ROW7 81
+MX51_PAD_EIM_D31__USBOTG_DATA7 82
+MX51_PAD_EIM_A16__EIM_A16 83
+MX51_PAD_EIM_A16__GPIO2_10 84
+MX51_PAD_EIM_A16__OSC_FREQ_SEL0 85
+MX51_PAD_EIM_A17__EIM_A17 86
+MX51_PAD_EIM_A17__GPIO2_11 87
+MX51_PAD_EIM_A17__OSC_FREQ_SEL1 88
+MX51_PAD_EIM_A18__BOOT_LPB0 89
+MX51_PAD_EIM_A18__EIM_A18 90
+MX51_PAD_EIM_A18__GPIO2_12 91
+MX51_PAD_EIM_A19__BOOT_LPB1 92
+MX51_PAD_EIM_A19__EIM_A19 93
+MX51_PAD_EIM_A19__GPIO2_13 94
+MX51_PAD_EIM_A20__BOOT_UART_SRC0 95
+MX51_PAD_EIM_A20__EIM_A20 96
+MX51_PAD_EIM_A20__GPIO2_14 97
+MX51_PAD_EIM_A21__BOOT_UART_SRC1 98
+MX51_PAD_EIM_A21__EIM_A21 99
+MX51_PAD_EIM_A21__GPIO2_15 100
+MX51_PAD_EIM_A22__EIM_A22 101
+MX51_PAD_EIM_A22__GPIO2_16 102
+MX51_PAD_EIM_A23__BOOT_HPN_EN 103
+MX51_PAD_EIM_A23__EIM_A23 104
+MX51_PAD_EIM_A23__GPIO2_17 105
+MX51_PAD_EIM_A24__EIM_A24 106
+MX51_PAD_EIM_A24__GPIO2_18 107
+MX51_PAD_EIM_A24__USBH2_CLK 108
+MX51_PAD_EIM_A25__DISP1_PIN4 109
+MX51_PAD_EIM_A25__EIM_A25 110
+MX51_PAD_EIM_A25__GPIO2_19 111
+MX51_PAD_EIM_A25__USBH2_DIR 112
+MX51_PAD_EIM_A26__CSI1_DATA_EN 113
+MX51_PAD_EIM_A26__DISP2_EXT_CLK 114
+MX51_PAD_EIM_A26__EIM_A26 115
+MX51_PAD_EIM_A26__GPIO2_20 116
+MX51_PAD_EIM_A26__USBH2_STP 117
+MX51_PAD_EIM_A27__CSI2_DATA_EN 118
+MX51_PAD_EIM_A27__DISP1_PIN1 119
+MX51_PAD_EIM_A27__EIM_A27 120
+MX51_PAD_EIM_A27__GPIO2_21 121
+MX51_PAD_EIM_A27__USBH2_NXT 122
+MX51_PAD_EIM_EB0__EIM_EB0 123
+MX51_PAD_EIM_EB1__EIM_EB1 124
+MX51_PAD_EIM_EB2__AUD5_RXFS 125
+MX51_PAD_EIM_EB2__CSI1_D2 126
+MX51_PAD_EIM_EB2__EIM_EB2 127
+MX51_PAD_EIM_EB2__FEC_MDIO 128
+MX51_PAD_EIM_EB2__GPIO2_22 129
+MX51_PAD_EIM_EB2__GPT_CMPOUT1 130
+MX51_PAD_EIM_EB3__AUD5_RXC 131
+MX51_PAD_EIM_EB3__CSI1_D3 132
+MX51_PAD_EIM_EB3__EIM_EB3 133
+MX51_PAD_EIM_EB3__FEC_RDATA1 134
+MX51_PAD_EIM_EB3__GPIO2_23 135
+MX51_PAD_EIM_EB3__GPT_CMPOUT2 136
+MX51_PAD_EIM_OE__EIM_OE 137
+MX51_PAD_EIM_OE__GPIO2_24 138
+MX51_PAD_EIM_CS0__EIM_CS0 139
+MX51_PAD_EIM_CS0__GPIO2_25 140
+MX51_PAD_EIM_CS1__EIM_CS1 141
+MX51_PAD_EIM_CS1__GPIO2_26 142
+MX51_PAD_EIM_CS2__AUD5_TXD 143
+MX51_PAD_EIM_CS2__CSI1_D4 144
+MX51_PAD_EIM_CS2__EIM_CS2 145
+MX51_PAD_EIM_CS2__FEC_RDATA2 146
+MX51_PAD_EIM_CS2__GPIO2_27 147
+MX51_PAD_EIM_CS2__USBOTG_STP 148
+MX51_PAD_EIM_CS3__AUD5_RXD 149
+MX51_PAD_EIM_CS3__CSI1_D5 150
+MX51_PAD_EIM_CS3__EIM_CS3 151
+MX51_PAD_EIM_CS3__FEC_RDATA3 152
+MX51_PAD_EIM_CS3__GPIO2_28 153
+MX51_PAD_EIM_CS3__USBOTG_NXT 154
+MX51_PAD_EIM_CS4__AUD5_TXC 155
+MX51_PAD_EIM_CS4__CSI1_D6 156
+MX51_PAD_EIM_CS4__EIM_CS4 157
+MX51_PAD_EIM_CS4__FEC_RX_ER 158
+MX51_PAD_EIM_CS4__GPIO2_29 159
+MX51_PAD_EIM_CS4__USBOTG_CLK 160
+MX51_PAD_EIM_CS5__AUD5_TXFS 161
+MX51_PAD_EIM_CS5__CSI1_D7 162
+MX51_PAD_EIM_CS5__DISP1_EXT_CLK 163
+MX51_PAD_EIM_CS5__EIM_CS5 164
+MX51_PAD_EIM_CS5__FEC_CRS 165
+MX51_PAD_EIM_CS5__GPIO2_30 166
+MX51_PAD_EIM_CS5__USBOTG_DIR 167
+MX51_PAD_EIM_DTACK__EIM_DTACK 168
+MX51_PAD_EIM_DTACK__GPIO2_31 169
+MX51_PAD_EIM_LBA__EIM_LBA 170
+MX51_PAD_EIM_LBA__GPIO3_1 171
+MX51_PAD_EIM_CRE__EIM_CRE 172
+MX51_PAD_EIM_CRE__GPIO3_2 173
+MX51_PAD_DRAM_CS1__DRAM_CS1 174
+MX51_PAD_NANDF_WE_B__GPIO3_3 175
+MX51_PAD_NANDF_WE_B__NANDF_WE_B 176
+MX51_PAD_NANDF_WE_B__PATA_DIOW 177
+MX51_PAD_NANDF_WE_B__SD3_DATA0 178
+MX51_PAD_NANDF_RE_B__GPIO3_4 179
+MX51_PAD_NANDF_RE_B__NANDF_RE_B 180
+MX51_PAD_NANDF_RE_B__PATA_DIOR 181
+MX51_PAD_NANDF_RE_B__SD3_DATA1 182
+MX51_PAD_NANDF_ALE__GPIO3_5 183
+MX51_PAD_NANDF_ALE__NANDF_ALE 184
+MX51_PAD_NANDF_ALE__PATA_BUFFER_EN 185
+MX51_PAD_NANDF_CLE__GPIO3_6 186
+MX51_PAD_NANDF_CLE__NANDF_CLE 187
+MX51_PAD_NANDF_CLE__PATA_RESET_B 188
+MX51_PAD_NANDF_WP_B__GPIO3_7 189
+MX51_PAD_NANDF_WP_B__NANDF_WP_B 190
+MX51_PAD_NANDF_WP_B__PATA_DMACK 191
+MX51_PAD_NANDF_WP_B__SD3_DATA2 192
+MX51_PAD_NANDF_RB0__ECSPI2_SS1 193
+MX51_PAD_NANDF_RB0__GPIO3_8 194
+MX51_PAD_NANDF_RB0__NANDF_RB0 195
+MX51_PAD_NANDF_RB0__PATA_DMARQ 196
+MX51_PAD_NANDF_RB0__SD3_DATA3 197
+MX51_PAD_NANDF_RB1__CSPI_MOSI 198
+MX51_PAD_NANDF_RB1__ECSPI2_RDY 199
+MX51_PAD_NANDF_RB1__GPIO3_9 200
+MX51_PAD_NANDF_RB1__NANDF_RB1 201
+MX51_PAD_NANDF_RB1__PATA_IORDY 202
+MX51_PAD_NANDF_RB1__SD4_CMD 203
+MX51_PAD_NANDF_RB2__DISP2_WAIT 204
+MX51_PAD_NANDF_RB2__ECSPI2_SCLK 205
+MX51_PAD_NANDF_RB2__FEC_COL 206
+MX51_PAD_NANDF_RB2__GPIO3_10 207
+MX51_PAD_NANDF_RB2__NANDF_RB2 208
+MX51_PAD_NANDF_RB2__USBH3_H3_DP 209
+MX51_PAD_NANDF_RB2__USBH3_NXT 210
+MX51_PAD_NANDF_RB3__DISP1_WAIT 211
+MX51_PAD_NANDF_RB3__ECSPI2_MISO 212
+MX51_PAD_NANDF_RB3__FEC_RX_CLK 213
+MX51_PAD_NANDF_RB3__GPIO3_11 214
+MX51_PAD_NANDF_RB3__NANDF_RB3 215
+MX51_PAD_NANDF_RB3__USBH3_CLK 216
+MX51_PAD_NANDF_RB3__USBH3_H3_DM 217
+MX51_PAD_GPIO_NAND__GPIO_NAND 218
+MX51_PAD_GPIO_NAND__PATA_INTRQ 219
+MX51_PAD_NANDF_CS0__GPIO3_16 220
+MX51_PAD_NANDF_CS0__NANDF_CS0 221
+MX51_PAD_NANDF_CS1__GPIO3_17 222
+MX51_PAD_NANDF_CS1__NANDF_CS1 223
+MX51_PAD_NANDF_CS2__CSPI_SCLK 224
+MX51_PAD_NANDF_CS2__FEC_TX_ER 225
+MX51_PAD_NANDF_CS2__GPIO3_18 226
+MX51_PAD_NANDF_CS2__NANDF_CS2 227
+MX51_PAD_NANDF_CS2__PATA_CS_0 228
+MX51_PAD_NANDF_CS2__SD4_CLK 229
+MX51_PAD_NANDF_CS2__USBH3_H1_DP 230
+MX51_PAD_NANDF_CS3__FEC_MDC 231
+MX51_PAD_NANDF_CS3__GPIO3_19 232
+MX51_PAD_NANDF_CS3__NANDF_CS3 233
+MX51_PAD_NANDF_CS3__PATA_CS_1 234
+MX51_PAD_NANDF_CS3__SD4_DAT0 235
+MX51_PAD_NANDF_CS3__USBH3_H1_DM 236
+MX51_PAD_NANDF_CS4__FEC_TDATA1 237
+MX51_PAD_NANDF_CS4__GPIO3_20 238
+MX51_PAD_NANDF_CS4__NANDF_CS4 239
+MX51_PAD_NANDF_CS4__PATA_DA_0 240
+MX51_PAD_NANDF_CS4__SD4_DAT1 241
+MX51_PAD_NANDF_CS4__USBH3_STP 242
+MX51_PAD_NANDF_CS5__FEC_TDATA2 243
+MX51_PAD_NANDF_CS5__GPIO3_21 244
+MX51_PAD_NANDF_CS5__NANDF_CS5 245
+MX51_PAD_NANDF_CS5__PATA_DA_1 246
+MX51_PAD_NANDF_CS5__SD4_DAT2 247
+MX51_PAD_NANDF_CS5__USBH3_DIR 248
+MX51_PAD_NANDF_CS6__CSPI_SS3 249
+MX51_PAD_NANDF_CS6__FEC_TDATA3 250
+MX51_PAD_NANDF_CS6__GPIO3_22 251
+MX51_PAD_NANDF_CS6__NANDF_CS6 252
+MX51_PAD_NANDF_CS6__PATA_DA_2 253
+MX51_PAD_NANDF_CS6__SD4_DAT3 254
+MX51_PAD_NANDF_CS7__FEC_TX_EN 255
+MX51_PAD_NANDF_CS7__GPIO3_23 256
+MX51_PAD_NANDF_CS7__NANDF_CS7 257
+MX51_PAD_NANDF_CS7__SD3_CLK 258
+MX51_PAD_NANDF_RDY_INT__ECSPI2_SS0 259
+MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 260
+MX51_PAD_NANDF_RDY_INT__GPIO3_24 261
+MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT 262
+MX51_PAD_NANDF_RDY_INT__SD3_CMD 263
+MX51_PAD_NANDF_D15__ECSPI2_MOSI 264
+MX51_PAD_NANDF_D15__GPIO3_25 265
+MX51_PAD_NANDF_D15__NANDF_D15 266
+MX51_PAD_NANDF_D15__PATA_DATA15 267
+MX51_PAD_NANDF_D15__SD3_DAT7 268
+MX51_PAD_NANDF_D14__ECSPI2_SS3 269
+MX51_PAD_NANDF_D14__GPIO3_26 270
+MX51_PAD_NANDF_D14__NANDF_D14 271
+MX51_PAD_NANDF_D14__PATA_DATA14 272
+MX51_PAD_NANDF_D14__SD3_DAT6 273
+MX51_PAD_NANDF_D13__ECSPI2_SS2 274
+MX51_PAD_NANDF_D13__GPIO3_27 275
+MX51_PAD_NANDF_D13__NANDF_D13 276
+MX51_PAD_NANDF_D13__PATA_DATA13 277
+MX51_PAD_NANDF_D13__SD3_DAT5 278
+MX51_PAD_NANDF_D12__ECSPI2_SS1 279
+MX51_PAD_NANDF_D12__GPIO3_28 280
+MX51_PAD_NANDF_D12__NANDF_D12 281
+MX51_PAD_NANDF_D12__PATA_DATA12 282
+MX51_PAD_NANDF_D12__SD3_DAT4 283
+MX51_PAD_NANDF_D11__FEC_RX_DV 284
+MX51_PAD_NANDF_D11__GPIO3_29 285
+MX51_PAD_NANDF_D11__NANDF_D11 286
+MX51_PAD_NANDF_D11__PATA_DATA11 287
+MX51_PAD_NANDF_D11__SD3_DATA3 288
+MX51_PAD_NANDF_D10__GPIO3_30 289
+MX51_PAD_NANDF_D10__NANDF_D10 290
+MX51_PAD_NANDF_D10__PATA_DATA10 291
+MX51_PAD_NANDF_D10__SD3_DATA2 292
+MX51_PAD_NANDF_D9__FEC_RDATA0 293
+MX51_PAD_NANDF_D9__GPIO3_31 294
+MX51_PAD_NANDF_D9__NANDF_D9 295
+MX51_PAD_NANDF_D9__PATA_DATA9 296
+MX51_PAD_NANDF_D9__SD3_DATA1 297
+MX51_PAD_NANDF_D8__FEC_TDATA0 298
+MX51_PAD_NANDF_D8__GPIO4_0 299
+MX51_PAD_NANDF_D8__NANDF_D8 300
+MX51_PAD_NANDF_D8__PATA_DATA8 301
+MX51_PAD_NANDF_D8__SD3_DATA0 302
+MX51_PAD_NANDF_D7__GPIO4_1 303
+MX51_PAD_NANDF_D7__NANDF_D7 304
+MX51_PAD_NANDF_D7__PATA_DATA7 305
+MX51_PAD_NANDF_D7__USBH3_DATA0 306
+MX51_PAD_NANDF_D6__GPIO4_2 307
+MX51_PAD_NANDF_D6__NANDF_D6 308
+MX51_PAD_NANDF_D6__PATA_DATA6 309
+MX51_PAD_NANDF_D6__SD4_LCTL 310
+MX51_PAD_NANDF_D6__USBH3_DATA1 311
+MX51_PAD_NANDF_D5__GPIO4_3 312
+MX51_PAD_NANDF_D5__NANDF_D5 313
+MX51_PAD_NANDF_D5__PATA_DATA5 314
+MX51_PAD_NANDF_D5__SD4_WP 315
+MX51_PAD_NANDF_D5__USBH3_DATA2 316
+MX51_PAD_NANDF_D4__GPIO4_4 317
+MX51_PAD_NANDF_D4__NANDF_D4 318
+MX51_PAD_NANDF_D4__PATA_DATA4 319
+MX51_PAD_NANDF_D4__SD4_CD 320
+MX51_PAD_NANDF_D4__USBH3_DATA3 321
+MX51_PAD_NANDF_D3__GPIO4_5 322
+MX51_PAD_NANDF_D3__NANDF_D3 323
+MX51_PAD_NANDF_D3__PATA_DATA3 324
+MX51_PAD_NANDF_D3__SD4_DAT4 325
+MX51_PAD_NANDF_D3__USBH3_DATA4 326
+MX51_PAD_NANDF_D2__GPIO4_6 327
+MX51_PAD_NANDF_D2__NANDF_D2 328
+MX51_PAD_NANDF_D2__PATA_DATA2 329
+MX51_PAD_NANDF_D2__SD4_DAT5 330
+MX51_PAD_NANDF_D2__USBH3_DATA5 331
+MX51_PAD_NANDF_D1__GPIO4_7 332
+MX51_PAD_NANDF_D1__NANDF_D1 333
+MX51_PAD_NANDF_D1__PATA_DATA1 334
+MX51_PAD_NANDF_D1__SD4_DAT6 335
+MX51_PAD_NANDF_D1__USBH3_DATA6 336
+MX51_PAD_NANDF_D0__GPIO4_8 337
+MX51_PAD_NANDF_D0__NANDF_D0 338
+MX51_PAD_NANDF_D0__PATA_DATA0 339
+MX51_PAD_NANDF_D0__SD4_DAT7 340
+MX51_PAD_NANDF_D0__USBH3_DATA7 341
+MX51_PAD_CSI1_D8__CSI1_D8 342
+MX51_PAD_CSI1_D8__GPIO3_12 343
+MX51_PAD_CSI1_D9__CSI1_D9 344
+MX51_PAD_CSI1_D9__GPIO3_13 345
+MX51_PAD_CSI1_D10__CSI1_D10 346
+MX51_PAD_CSI1_D11__CSI1_D11 347
+MX51_PAD_CSI1_D12__CSI1_D12 348
+MX51_PAD_CSI1_D13__CSI1_D13 349
+MX51_PAD_CSI1_D14__CSI1_D14 350
+MX51_PAD_CSI1_D15__CSI1_D15 351
+MX51_PAD_CSI1_D16__CSI1_D16 352
+MX51_PAD_CSI1_D17__CSI1_D17 353
+MX51_PAD_CSI1_D18__CSI1_D18 354
+MX51_PAD_CSI1_D19__CSI1_D19 355
+MX51_PAD_CSI1_VSYNC__CSI1_VSYNC 356
+MX51_PAD_CSI1_VSYNC__GPIO3_14 357
+MX51_PAD_CSI1_HSYNC__CSI1_HSYNC 358
+MX51_PAD_CSI1_HSYNC__GPIO3_15 359
+MX51_PAD_CSI1_PIXCLK__CSI1_PIXCLK 360
+MX51_PAD_CSI1_MCLK__CSI1_MCLK 361
+MX51_PAD_CSI2_D12__CSI2_D12 362
+MX51_PAD_CSI2_D12__GPIO4_9 363
+MX51_PAD_CSI2_D13__CSI2_D13 364
+MX51_PAD_CSI2_D13__GPIO4_10 365
+MX51_PAD_CSI2_D14__CSI2_D14 366
+MX51_PAD_CSI2_D15__CSI2_D15 367
+MX51_PAD_CSI2_D16__CSI2_D16 368
+MX51_PAD_CSI2_D17__CSI2_D17 369
+MX51_PAD_CSI2_D18__CSI2_D18 370
+MX51_PAD_CSI2_D18__GPIO4_11 371
+MX51_PAD_CSI2_D19__CSI2_D19 372
+MX51_PAD_CSI2_D19__GPIO4_12 373
+MX51_PAD_CSI2_VSYNC__CSI2_VSYNC 374
+MX51_PAD_CSI2_VSYNC__GPIO4_13 375
+MX51_PAD_CSI2_HSYNC__CSI2_HSYNC 376
+MX51_PAD_CSI2_HSYNC__GPIO4_14 377
+MX51_PAD_CSI2_PIXCLK__CSI2_PIXCLK 378
+MX51_PAD_CSI2_PIXCLK__GPIO4_15 379
+MX51_PAD_I2C1_CLK__GPIO4_16 380
+MX51_PAD_I2C1_CLK__I2C1_CLK 381
+MX51_PAD_I2C1_DAT__GPIO4_17 382
+MX51_PAD_I2C1_DAT__I2C1_DAT 383
+MX51_PAD_AUD3_BB_TXD__AUD3_TXD 384
+MX51_PAD_AUD3_BB_TXD__GPIO4_18 385
+MX51_PAD_AUD3_BB_RXD__AUD3_RXD 386
+MX51_PAD_AUD3_BB_RXD__GPIO4_19 387
+MX51_PAD_AUD3_BB_RXD__UART3_RXD 388
+MX51_PAD_AUD3_BB_CK__AUD3_TXC 389
+MX51_PAD_AUD3_BB_CK__GPIO4_20 390
+MX51_PAD_AUD3_BB_FS__AUD3_TXFS 391
+MX51_PAD_AUD3_BB_FS__GPIO4_21 392
+MX51_PAD_AUD3_BB_FS__UART3_TXD 393
+MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 394
+MX51_PAD_CSPI1_MOSI__GPIO4_22 395
+MX51_PAD_CSPI1_MOSI__I2C1_SDA 396
+MX51_PAD_CSPI1_MISO__AUD4_RXD 397
+MX51_PAD_CSPI1_MISO__ECSPI1_MISO 398
+MX51_PAD_CSPI1_MISO__GPIO4_23 399
+MX51_PAD_CSPI1_SS0__AUD4_TXC 400
+MX51_PAD_CSPI1_SS0__ECSPI1_SS0 401
+MX51_PAD_CSPI1_SS0__GPIO4_24 402
+MX51_PAD_CSPI1_SS1__AUD4_TXD 403
+MX51_PAD_CSPI1_SS1__ECSPI1_SS1 404
+MX51_PAD_CSPI1_SS1__GPIO4_25 405
+MX51_PAD_CSPI1_RDY__AUD4_TXFS 406
+MX51_PAD_CSPI1_RDY__ECSPI1_RDY 407
+MX51_PAD_CSPI1_RDY__GPIO4_26 408
+MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 409
+MX51_PAD_CSPI1_SCLK__GPIO4_27 410
+MX51_PAD_CSPI1_SCLK__I2C1_SCL 411
+MX51_PAD_UART1_RXD__GPIO4_28 412
+MX51_PAD_UART1_RXD__UART1_RXD 413
+MX51_PAD_UART1_TXD__GPIO4_29 414
+MX51_PAD_UART1_TXD__PWM2_PWMO 415
+MX51_PAD_UART1_TXD__UART1_TXD 416
+MX51_PAD_UART1_RTS__GPIO4_30 417
+MX51_PAD_UART1_RTS__UART1_RTS 418
+MX51_PAD_UART1_CTS__GPIO4_31 419
+MX51_PAD_UART1_CTS__UART1_CTS 420
+MX51_PAD_UART2_RXD__FIRI_TXD 421
+MX51_PAD_UART2_RXD__GPIO1_20 422
+MX51_PAD_UART2_RXD__UART2_RXD 423
+MX51_PAD_UART2_TXD__FIRI_RXD 424
+MX51_PAD_UART2_TXD__GPIO1_21 425
+MX51_PAD_UART2_TXD__UART2_TXD 426
+MX51_PAD_UART3_RXD__CSI1_D0 427
+MX51_PAD_UART3_RXD__GPIO1_22 428
+MX51_PAD_UART3_RXD__UART1_DTR 429
+MX51_PAD_UART3_RXD__UART3_RXD 430
+MX51_PAD_UART3_TXD__CSI1_D1 431
+MX51_PAD_UART3_TXD__GPIO1_23 432
+MX51_PAD_UART3_TXD__UART1_DSR 433
+MX51_PAD_UART3_TXD__UART3_TXD 434
+MX51_PAD_OWIRE_LINE__GPIO1_24 435
+MX51_PAD_OWIRE_LINE__OWIRE_LINE 436
+MX51_PAD_OWIRE_LINE__SPDIF_OUT 437
+MX51_PAD_KEY_ROW0__KEY_ROW0 438
+MX51_PAD_KEY_ROW1__KEY_ROW1 439
+MX51_PAD_KEY_ROW2__KEY_ROW2 440
+MX51_PAD_KEY_ROW3__KEY_ROW3 441
+MX51_PAD_KEY_COL0__KEY_COL0 442
+MX51_PAD_KEY_COL0__PLL1_BYP 443
+MX51_PAD_KEY_COL1__KEY_COL1 444
+MX51_PAD_KEY_COL1__PLL2_BYP 445
+MX51_PAD_KEY_COL2__KEY_COL2 446
+MX51_PAD_KEY_COL2__PLL3_BYP 447
+MX51_PAD_KEY_COL3__KEY_COL3 448
+MX51_PAD_KEY_COL4__I2C2_SCL 449
+MX51_PAD_KEY_COL4__KEY_COL4 450
+MX51_PAD_KEY_COL4__SPDIF_OUT1 451
+MX51_PAD_KEY_COL4__UART1_RI 452
+MX51_PAD_KEY_COL4__UART3_RTS 453
+MX51_PAD_KEY_COL5__I2C2_SDA 454
+MX51_PAD_KEY_COL5__KEY_COL5 455
+MX51_PAD_KEY_COL5__UART1_DCD 456
+MX51_PAD_KEY_COL5__UART3_CTS 457
+MX51_PAD_USBH1_CLK__CSPI_SCLK 458
+MX51_PAD_USBH1_CLK__GPIO1_25 459
+MX51_PAD_USBH1_CLK__I2C2_SCL 460
+MX51_PAD_USBH1_CLK__USBH1_CLK 461
+MX51_PAD_USBH1_DIR__CSPI_MOSI 462
+MX51_PAD_USBH1_DIR__GPIO1_26 463
+MX51_PAD_USBH1_DIR__I2C2_SDA 464
+MX51_PAD_USBH1_DIR__USBH1_DIR 465
+MX51_PAD_USBH1_STP__CSPI_RDY 466
+MX51_PAD_USBH1_STP__GPIO1_27 467
+MX51_PAD_USBH1_STP__UART3_RXD 468
+MX51_PAD_USBH1_STP__USBH1_STP 469
+MX51_PAD_USBH1_NXT__CSPI_MISO 470
+MX51_PAD_USBH1_NXT__GPIO1_28 471
+MX51_PAD_USBH1_NXT__UART3_TXD 472
+MX51_PAD_USBH1_NXT__USBH1_NXT 473
+MX51_PAD_USBH1_DATA0__GPIO1_11 474
+MX51_PAD_USBH1_DATA0__UART2_CTS 475
+MX51_PAD_USBH1_DATA0__USBH1_DATA0 476
+MX51_PAD_USBH1_DATA1__GPIO1_12 477
+MX51_PAD_USBH1_DATA1__UART2_RXD 478
+MX51_PAD_USBH1_DATA1__USBH1_DATA1 479
+MX51_PAD_USBH1_DATA2__GPIO1_13 480
+MX51_PAD_USBH1_DATA2__UART2_TXD 481
+MX51_PAD_USBH1_DATA2__USBH1_DATA2 482
+MX51_PAD_USBH1_DATA3__GPIO1_14 483
+MX51_PAD_USBH1_DATA3__UART2_RTS 484
+MX51_PAD_USBH1_DATA3__USBH1_DATA3 485
+MX51_PAD_USBH1_DATA4__CSPI_SS0 486
+MX51_PAD_USBH1_DATA4__GPIO1_15 487
+MX51_PAD_USBH1_DATA4__USBH1_DATA4 488
+MX51_PAD_USBH1_DATA5__CSPI_SS1 489
+MX51_PAD_USBH1_DATA5__GPIO1_16 490
+MX51_PAD_USBH1_DATA5__USBH1_DATA5 491
+MX51_PAD_USBH1_DATA6__CSPI_SS3 492
+MX51_PAD_USBH1_DATA6__GPIO1_17 493
+MX51_PAD_USBH1_DATA6__USBH1_DATA6 494
+MX51_PAD_USBH1_DATA7__ECSPI1_SS3 495
+MX51_PAD_USBH1_DATA7__ECSPI2_SS3 496
+MX51_PAD_USBH1_DATA7__GPIO1_18 497
+MX51_PAD_USBH1_DATA7__USBH1_DATA7 498
+MX51_PAD_DI1_PIN11__DI1_PIN11 499
+MX51_PAD_DI1_PIN11__ECSPI1_SS2 500
+MX51_PAD_DI1_PIN11__GPIO3_0 501
+MX51_PAD_DI1_PIN12__DI1_PIN12 502
+MX51_PAD_DI1_PIN12__GPIO3_1 503
+MX51_PAD_DI1_PIN13__DI1_PIN13 504
+MX51_PAD_DI1_PIN13__GPIO3_2 505
+MX51_PAD_DI1_D0_CS__DI1_D0_CS 506
+MX51_PAD_DI1_D0_CS__GPIO3_3 507
+MX51_PAD_DI1_D1_CS__DI1_D1_CS 508
+MX51_PAD_DI1_D1_CS__DISP1_PIN14 509
+MX51_PAD_DI1_D1_CS__DISP1_PIN5 510
+MX51_PAD_DI1_D1_CS__GPIO3_4 511
+MX51_PAD_DISPB2_SER_DIN__DISP1_PIN1 512
+MX51_PAD_DISPB2_SER_DIN__DISPB2_SER_DIN 513
+MX51_PAD_DISPB2_SER_DIN__GPIO3_5 514
+MX51_PAD_DISPB2_SER_DIO__DISP1_PIN6 515
+MX51_PAD_DISPB2_SER_DIO__DISPB2_SER_DIO 516
+MX51_PAD_DISPB2_SER_DIO__GPIO3_6 517
+MX51_PAD_DISPB2_SER_CLK__DISP1_PIN17 518
+MX51_PAD_DISPB2_SER_CLK__DISP1_PIN7 519
+MX51_PAD_DISPB2_SER_CLK__DISPB2_SER_CLK 520
+MX51_PAD_DISPB2_SER_CLK__GPIO3_7 521
+MX51_PAD_DISPB2_SER_RS__DISP1_EXT_CLK 522
+MX51_PAD_DISPB2_SER_RS__DISP1_PIN16 523
+MX51_PAD_DISPB2_SER_RS__DISP1_PIN8 524
+MX51_PAD_DISPB2_SER_RS__DISPB2_SER_RS 525
+MX51_PAD_DISPB2_SER_RS__DISPB2_SER_RS 526
+MX51_PAD_DISPB2_SER_RS__GPIO3_8 527
+MX51_PAD_DISP1_DAT0__DISP1_DAT0 528
+MX51_PAD_DISP1_DAT1__DISP1_DAT1 529
+MX51_PAD_DISP1_DAT2__DISP1_DAT2 530
+MX51_PAD_DISP1_DAT3__DISP1_DAT3 531
+MX51_PAD_DISP1_DAT4__DISP1_DAT4 532
+MX51_PAD_DISP1_DAT5__DISP1_DAT5 533
+MX51_PAD_DISP1_DAT6__BOOT_USB_SRC 534
+MX51_PAD_DISP1_DAT6__DISP1_DAT6 535
+MX51_PAD_DISP1_DAT7__BOOT_EEPROM_CFG 536
+MX51_PAD_DISP1_DAT7__DISP1_DAT7 537
+MX51_PAD_DISP1_DAT8__BOOT_SRC0 538
+MX51_PAD_DISP1_DAT8__DISP1_DAT8 539
+MX51_PAD_DISP1_DAT9__BOOT_SRC1 540
+MX51_PAD_DISP1_DAT9__DISP1_DAT9 541
+MX51_PAD_DISP1_DAT10__BOOT_SPARE_SIZE 542
+MX51_PAD_DISP1_DAT10__DISP1_DAT10 543
+MX51_PAD_DISP1_DAT11__BOOT_LPB_FREQ2 544
+MX51_PAD_DISP1_DAT11__DISP1_DAT11 545
+MX51_PAD_DISP1_DAT12__BOOT_MLC_SEL 546
+MX51_PAD_DISP1_DAT12__DISP1_DAT12 547
+MX51_PAD_DISP1_DAT13__BOOT_MEM_CTL0 548
+MX51_PAD_DISP1_DAT13__DISP1_DAT13 549
+MX51_PAD_DISP1_DAT14__BOOT_MEM_CTL1 550
+MX51_PAD_DISP1_DAT14__DISP1_DAT14 551
+MX51_PAD_DISP1_DAT15__BOOT_BUS_WIDTH 552
+MX51_PAD_DISP1_DAT15__DISP1_DAT15 553
+MX51_PAD_DISP1_DAT16__BOOT_PAGE_SIZE0 554
+MX51_PAD_DISP1_DAT16__DISP1_DAT16 555
+MX51_PAD_DISP1_DAT17__BOOT_PAGE_SIZE1 556
+MX51_PAD_DISP1_DAT17__DISP1_DAT17 557
+MX51_PAD_DISP1_DAT18__BOOT_WEIM_MUXED0 558
+MX51_PAD_DISP1_DAT18__DISP1_DAT18 559
+MX51_PAD_DISP1_DAT18__DISP2_PIN11 560
+MX51_PAD_DISP1_DAT18__DISP2_PIN5 561
+MX51_PAD_DISP1_DAT19__BOOT_WEIM_MUXED1 562
+MX51_PAD_DISP1_DAT19__DISP1_DAT19 563
+MX51_PAD_DISP1_DAT19__DISP2_PIN12 564
+MX51_PAD_DISP1_DAT19__DISP2_PIN6 565
+MX51_PAD_DISP1_DAT20__BOOT_MEM_TYPE0 566
+MX51_PAD_DISP1_DAT20__DISP1_DAT20 567
+MX51_PAD_DISP1_DAT20__DISP2_PIN13 568
+MX51_PAD_DISP1_DAT20__DISP2_PIN7 569
+MX51_PAD_DISP1_DAT21__BOOT_MEM_TYPE1 570
+MX51_PAD_DISP1_DAT21__DISP1_DAT21 571
+MX51_PAD_DISP1_DAT21__DISP2_PIN14 572
+MX51_PAD_DISP1_DAT21__DISP2_PIN8 573
+MX51_PAD_DISP1_DAT22__BOOT_LPB_FREQ0 574
+MX51_PAD_DISP1_DAT22__DISP1_DAT22 575
+MX51_PAD_DISP1_DAT22__DISP2_D0_CS 576
+MX51_PAD_DISP1_DAT22__DISP2_DAT16 577
+MX51_PAD_DISP1_DAT23__BOOT_LPB_FREQ1 578
+MX51_PAD_DISP1_DAT23__DISP1_DAT23 579
+MX51_PAD_DISP1_DAT23__DISP2_D1_CS 580
+MX51_PAD_DISP1_DAT23__DISP2_DAT17 581
+MX51_PAD_DISP1_DAT23__DISP2_SER_CS 582
+MX51_PAD_DI1_PIN3__DI1_PIN3 583
+MX51_PAD_DI1_PIN2__DI1_PIN2 584
+MX51_PAD_DI_GP2__DISP1_SER_CLK 585
+MX51_PAD_DI_GP2__DISP2_WAIT 586
+MX51_PAD_DI_GP3__CSI1_DATA_EN 587
+MX51_PAD_DI_GP3__DISP1_SER_DIO 588
+MX51_PAD_DI_GP3__FEC_TX_ER 589
+MX51_PAD_DI2_PIN4__CSI2_DATA_EN 590
+MX51_PAD_DI2_PIN4__DI2_PIN4 591
+MX51_PAD_DI2_PIN4__FEC_CRS 592
+MX51_PAD_DI2_PIN2__DI2_PIN2 593
+MX51_PAD_DI2_PIN2__FEC_MDC 594
+MX51_PAD_DI2_PIN3__DI2_PIN3 595
+MX51_PAD_DI2_PIN3__FEC_MDIO 596
+MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 597
+MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 598
+MX51_PAD_DI_GP4__DI2_PIN15 599
+MX51_PAD_DI_GP4__DISP1_SER_DIN 600
+MX51_PAD_DI_GP4__DISP2_PIN1 601
+MX51_PAD_DI_GP4__FEC_RDATA2 602
+MX51_PAD_DISP2_DAT0__DISP2_DAT0 603
+MX51_PAD_DISP2_DAT0__FEC_RDATA3 604
+MX51_PAD_DISP2_DAT0__KEY_COL6 605
+MX51_PAD_DISP2_DAT0__UART3_RXD 606
+MX51_PAD_DISP2_DAT0__USBH3_CLK 607
+MX51_PAD_DISP2_DAT1__DISP2_DAT1 608
+MX51_PAD_DISP2_DAT1__FEC_RX_ER 609
+MX51_PAD_DISP2_DAT1__KEY_COL7 610
+MX51_PAD_DISP2_DAT1__UART3_TXD 611
+MX51_PAD_DISP2_DAT1__USBH3_DIR 612
+MX51_PAD_DISP2_DAT2__DISP2_DAT2 613
+MX51_PAD_DISP2_DAT3__DISP2_DAT3 614
+MX51_PAD_DISP2_DAT4__DISP2_DAT4 615
+MX51_PAD_DISP2_DAT5__DISP2_DAT5 616
+MX51_PAD_DISP2_DAT6__DISP2_DAT6 617
+MX51_PAD_DISP2_DAT6__FEC_TDATA1 618
+MX51_PAD_DISP2_DAT6__GPIO1_19 619
+MX51_PAD_DISP2_DAT6__KEY_ROW4 620
+MX51_PAD_DISP2_DAT6__USBH3_STP 621
+MX51_PAD_DISP2_DAT7__DISP2_DAT7 622
+MX51_PAD_DISP2_DAT7__FEC_TDATA2 623
+MX51_PAD_DISP2_DAT7__GPIO1_29 624
+MX51_PAD_DISP2_DAT7__KEY_ROW5 625
+MX51_PAD_DISP2_DAT7__USBH3_NXT 626
+MX51_PAD_DISP2_DAT8__DISP2_DAT8 627
+MX51_PAD_DISP2_DAT8__FEC_TDATA3 628
+MX51_PAD_DISP2_DAT8__GPIO1_30 629
+MX51_PAD_DISP2_DAT8__KEY_ROW6 630
+MX51_PAD_DISP2_DAT8__USBH3_DATA0 631
+MX51_PAD_DISP2_DAT9__AUD6_RXC 632
+MX51_PAD_DISP2_DAT9__DISP2_DAT9 633
+MX51_PAD_DISP2_DAT9__FEC_TX_EN 634
+MX51_PAD_DISP2_DAT9__GPIO1_31 635
+MX51_PAD_DISP2_DAT9__USBH3_DATA1 636
+MX51_PAD_DISP2_DAT10__DISP2_DAT10 637
+MX51_PAD_DISP2_DAT10__DISP2_SER_CS 638
+MX51_PAD_DISP2_DAT10__FEC_COL 639
+MX51_PAD_DISP2_DAT10__KEY_ROW7 640
+MX51_PAD_DISP2_DAT10__USBH3_DATA2 641
+MX51_PAD_DISP2_DAT11__AUD6_TXD 642
+MX51_PAD_DISP2_DAT11__DISP2_DAT11 643
+MX51_PAD_DISP2_DAT11__FEC_RX_CLK 644
+MX51_PAD_DISP2_DAT11__GPIO1_10 645
+MX51_PAD_DISP2_DAT11__USBH3_DATA3 646
+MX51_PAD_DISP2_DAT12__AUD6_RXD 647
+MX51_PAD_DISP2_DAT12__DISP2_DAT12 648
+MX51_PAD_DISP2_DAT12__FEC_RX_DV 649
+MX51_PAD_DISP2_DAT12__USBH3_DATA4 650
+MX51_PAD_DISP2_DAT13__AUD6_TXC 651
+MX51_PAD_DISP2_DAT13__DISP2_DAT13 652
+MX51_PAD_DISP2_DAT13__FEC_TX_CLK 653
+MX51_PAD_DISP2_DAT13__USBH3_DATA5 654
+MX51_PAD_DISP2_DAT14__AUD6_TXFS 655
+MX51_PAD_DISP2_DAT14__DISP2_DAT14 656
+MX51_PAD_DISP2_DAT14__FEC_RDATA0 657
+MX51_PAD_DISP2_DAT14__USBH3_DATA6 658
+MX51_PAD_DISP2_DAT15__AUD6_RXFS 659
+MX51_PAD_DISP2_DAT15__DISP1_SER_CS 660
+MX51_PAD_DISP2_DAT15__DISP2_DAT15 661
+MX51_PAD_DISP2_DAT15__FEC_TDATA0 662
+MX51_PAD_DISP2_DAT15__USBH3_DATA7 663
+MX51_PAD_SD1_CMD__AUD5_RXFS 664
+MX51_PAD_SD1_CMD__CSPI_MOSI 665
+MX51_PAD_SD1_CMD__SD1_CMD 666
+MX51_PAD_SD1_CLK__AUD5_RXC 667
+MX51_PAD_SD1_CLK__CSPI_SCLK 668
+MX51_PAD_SD1_CLK__SD1_CLK 669
+MX51_PAD_SD1_DATA0__AUD5_TXD 670
+MX51_PAD_SD1_DATA0__CSPI_MISO 671
+MX51_PAD_SD1_DATA0__SD1_DATA0 672
+MX51_PAD_EIM_DA0__EIM_DA0 673
+MX51_PAD_EIM_DA1__EIM_DA1 674
+MX51_PAD_EIM_DA2__EIM_DA2 675
+MX51_PAD_EIM_DA3__EIM_DA3 676
+MX51_PAD_SD1_DATA1__AUD5_RXD 677
+MX51_PAD_SD1_DATA1__SD1_DATA1 678
+MX51_PAD_EIM_DA4__EIM_DA4 679
+MX51_PAD_EIM_DA5__EIM_DA5 680
+MX51_PAD_EIM_DA6__EIM_DA6 681
+MX51_PAD_EIM_DA7__EIM_DA7 682
+MX51_PAD_SD1_DATA2__AUD5_TXC 683
+MX51_PAD_SD1_DATA2__SD1_DATA2 684
+MX51_PAD_EIM_DA10__EIM_DA10 685
+MX51_PAD_EIM_DA11__EIM_DA11 686
+MX51_PAD_EIM_DA8__EIM_DA8 687
+MX51_PAD_EIM_DA9__EIM_DA9 688
+MX51_PAD_SD1_DATA3__AUD5_TXFS 689
+MX51_PAD_SD1_DATA3__CSPI_SS1 690
+MX51_PAD_SD1_DATA3__SD1_DATA3 691
+MX51_PAD_GPIO1_0__CSPI_SS2 692
+MX51_PAD_GPIO1_0__GPIO1_0 693
+MX51_PAD_GPIO1_0__SD1_CD 694
+MX51_PAD_GPIO1_1__CSPI_MISO 695
+MX51_PAD_GPIO1_1__GPIO1_1 696
+MX51_PAD_GPIO1_1__SD1_WP 697
+MX51_PAD_EIM_DA12__EIM_DA12 698
+MX51_PAD_EIM_DA13__EIM_DA13 699
+MX51_PAD_EIM_DA14__EIM_DA14 700
+MX51_PAD_EIM_DA15__EIM_DA15 701
+MX51_PAD_SD2_CMD__CSPI_MOSI 702
+MX51_PAD_SD2_CMD__I2C1_SCL 703
+MX51_PAD_SD2_CMD__SD2_CMD 704
+MX51_PAD_SD2_CLK__CSPI_SCLK 705
+MX51_PAD_SD2_CLK__I2C1_SDA 706
+MX51_PAD_SD2_CLK__SD2_CLK 707
+MX51_PAD_SD2_DATA0__CSPI_MISO 708
+MX51_PAD_SD2_DATA0__SD1_DAT4 709
+MX51_PAD_SD2_DATA0__SD2_DATA0 710
+MX51_PAD_SD2_DATA1__SD1_DAT5 711
+MX51_PAD_SD2_DATA1__SD2_DATA1 712
+MX51_PAD_SD2_DATA1__USBH3_H2_DP 713
+MX51_PAD_SD2_DATA2__SD1_DAT6 714
+MX51_PAD_SD2_DATA2__SD2_DATA2 715
+MX51_PAD_SD2_DATA2__USBH3_H2_DM 716
+MX51_PAD_SD2_DATA3__CSPI_SS2 717
+MX51_PAD_SD2_DATA3__SD1_DAT7 718
+MX51_PAD_SD2_DATA3__SD2_DATA3 719
+MX51_PAD_GPIO1_2__CCM_OUT_2 720
+MX51_PAD_GPIO1_2__GPIO1_2 721
+MX51_PAD_GPIO1_2__I2C2_SCL 722
+MX51_PAD_GPIO1_2__PLL1_BYP 723
+MX51_PAD_GPIO1_2__PWM1_PWMO 724
+MX51_PAD_GPIO1_3__GPIO1_3 725
+MX51_PAD_GPIO1_3__I2C2_SDA 726
+MX51_PAD_GPIO1_3__PLL2_BYP 727
+MX51_PAD_GPIO1_3__PWM2_PWMO 728
+MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ 729
+MX51_PAD_PMIC_INT_REQ__PMIC_PMU_IRQ_B 730
+MX51_PAD_GPIO1_4__DISP2_EXT_CLK 731
+MX51_PAD_GPIO1_4__EIM_RDY 732
+MX51_PAD_GPIO1_4__GPIO1_4 733
+MX51_PAD_GPIO1_4__WDOG1_WDOG_B 734
+MX51_PAD_GPIO1_5__CSI2_MCLK 735
+MX51_PAD_GPIO1_5__DISP2_PIN16 736
+MX51_PAD_GPIO1_5__GPIO1_5 737
+MX51_PAD_GPIO1_5__WDOG2_WDOG_B 738
+MX51_PAD_GPIO1_6__DISP2_PIN17 739
+MX51_PAD_GPIO1_6__GPIO1_6 740
+MX51_PAD_GPIO1_6__REF_EN_B 741
+MX51_PAD_GPIO1_7__CCM_OUT_0 742
+MX51_PAD_GPIO1_7__GPIO1_7 743
+MX51_PAD_GPIO1_7__SD2_WP 744
+MX51_PAD_GPIO1_7__SPDIF_OUT1 745
+MX51_PAD_GPIO1_8__CSI2_DATA_EN 746
+MX51_PAD_GPIO1_8__GPIO1_8 747
+MX51_PAD_GPIO1_8__SD2_CD 748
+MX51_PAD_GPIO1_8__USBH3_PWR 749
+MX51_PAD_GPIO1_9__CCM_OUT_1 750
+MX51_PAD_GPIO1_9__DISP2_D1_CS 751
+MX51_PAD_GPIO1_9__DISP2_SER_CS 752
+MX51_PAD_GPIO1_9__GPIO1_9 753
+MX51_PAD_GPIO1_9__SD2_LCTL 754
+MX51_PAD_GPIO1_9__USBH3_OC 755
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt
new file mode 100644
index 000000000000..ca85ca432ef0
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt
@@ -0,0 +1,1202 @@
+* Freescale IMX53 IOMUX Controller
+
+Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
+and usage.
+
+Required properties:
+- compatible: "fsl,imx53-iomuxc"
+- fsl,pins: two integers array, represents a group of pins mux and config
+ setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
+ pin working on a specific function, CONFIG is the pad setting value like
+ pull-up for this pin. Please refer to imx53 datasheet for the valid pad
+ config settings.
+
+CONFIG bits definition:
+PAD_CTL_HVE (1 << 13)
+PAD_CTL_HYS (1 << 8)
+PAD_CTL_PKE (1 << 7)
+PAD_CTL_PUE (1 << 6)
+PAD_CTL_PUS_100K_DOWN (0 << 4)
+PAD_CTL_PUS_47K_UP (1 << 4)
+PAD_CTL_PUS_100K_UP (2 << 4)
+PAD_CTL_PUS_22K_UP (3 << 4)
+PAD_CTL_ODE (1 << 3)
+PAD_CTL_DSE_LOW (0 << 1)
+PAD_CTL_DSE_MED (1 << 1)
+PAD_CTL_DSE_HIGH (2 << 1)
+PAD_CTL_DSE_MAX (3 << 1)
+PAD_CTL_SRE_FAST (1 << 0)
+PAD_CTL_SRE_SLOW (0 << 0)
+
+See below for available PIN_FUNC_ID for imx53:
+MX53_PAD_GPIO_19__KPP_COL_5 0
+MX53_PAD_GPIO_19__GPIO4_5 1
+MX53_PAD_GPIO_19__CCM_CLKO 2
+MX53_PAD_GPIO_19__SPDIF_OUT1 3
+MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 4
+MX53_PAD_GPIO_19__ECSPI1_RDY 5
+MX53_PAD_GPIO_19__FEC_TDATA_3 6
+MX53_PAD_GPIO_19__SRC_INT_BOOT 7
+MX53_PAD_KEY_COL0__KPP_COL_0 8
+MX53_PAD_KEY_COL0__GPIO4_6 9
+MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 10
+MX53_PAD_KEY_COL0__UART4_TXD_MUX 11
+MX53_PAD_KEY_COL0__ECSPI1_SCLK 12
+MX53_PAD_KEY_COL0__FEC_RDATA_3 13
+MX53_PAD_KEY_COL0__SRC_ANY_PU_RST 14
+MX53_PAD_KEY_ROW0__KPP_ROW_0 15
+MX53_PAD_KEY_ROW0__GPIO4_7 16
+MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 17
+MX53_PAD_KEY_ROW0__UART4_RXD_MUX 18
+MX53_PAD_KEY_ROW0__ECSPI1_MOSI 19
+MX53_PAD_KEY_ROW0__FEC_TX_ER 20
+MX53_PAD_KEY_COL1__KPP_COL_1 21
+MX53_PAD_KEY_COL1__GPIO4_8 22
+MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 23
+MX53_PAD_KEY_COL1__UART5_TXD_MUX 24
+MX53_PAD_KEY_COL1__ECSPI1_MISO 25
+MX53_PAD_KEY_COL1__FEC_RX_CLK 26
+MX53_PAD_KEY_COL1__USBPHY1_TXREADY 27
+MX53_PAD_KEY_ROW1__KPP_ROW_1 28
+MX53_PAD_KEY_ROW1__GPIO4_9 29
+MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 30
+MX53_PAD_KEY_ROW1__UART5_RXD_MUX 31
+MX53_PAD_KEY_ROW1__ECSPI1_SS0 32
+MX53_PAD_KEY_ROW1__FEC_COL 33
+MX53_PAD_KEY_ROW1__USBPHY1_RXVALID 34
+MX53_PAD_KEY_COL2__KPP_COL_2 35
+MX53_PAD_KEY_COL2__GPIO4_10 36
+MX53_PAD_KEY_COL2__CAN1_TXCAN 37
+MX53_PAD_KEY_COL2__FEC_MDIO 38
+MX53_PAD_KEY_COL2__ECSPI1_SS1 39
+MX53_PAD_KEY_COL2__FEC_RDATA_2 40
+MX53_PAD_KEY_COL2__USBPHY1_RXACTIVE 41
+MX53_PAD_KEY_ROW2__KPP_ROW_2 42
+MX53_PAD_KEY_ROW2__GPIO4_11 43
+MX53_PAD_KEY_ROW2__CAN1_RXCAN 44
+MX53_PAD_KEY_ROW2__FEC_MDC 45
+MX53_PAD_KEY_ROW2__ECSPI1_SS2 46
+MX53_PAD_KEY_ROW2__FEC_TDATA_2 47
+MX53_PAD_KEY_ROW2__USBPHY1_RXERROR 48
+MX53_PAD_KEY_COL3__KPP_COL_3 49
+MX53_PAD_KEY_COL3__GPIO4_12 50
+MX53_PAD_KEY_COL3__USBOH3_H2_DP 51
+MX53_PAD_KEY_COL3__SPDIF_IN1 52
+MX53_PAD_KEY_COL3__I2C2_SCL 53
+MX53_PAD_KEY_COL3__ECSPI1_SS3 54
+MX53_PAD_KEY_COL3__FEC_CRS 55
+MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK 56
+MX53_PAD_KEY_ROW3__KPP_ROW_3 57
+MX53_PAD_KEY_ROW3__GPIO4_13 58
+MX53_PAD_KEY_ROW3__USBOH3_H2_DM 59
+MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK 60
+MX53_PAD_KEY_ROW3__I2C2_SDA 61
+MX53_PAD_KEY_ROW3__OSC32K_32K_OUT 62
+MX53_PAD_KEY_ROW3__CCM_PLL4_BYP 63
+MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 64
+MX53_PAD_KEY_COL4__KPP_COL_4 65
+MX53_PAD_KEY_COL4__GPIO4_14 66
+MX53_PAD_KEY_COL4__CAN2_TXCAN 67
+MX53_PAD_KEY_COL4__IPU_SISG_4 68
+MX53_PAD_KEY_COL4__UART5_RTS 69
+MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC 70
+MX53_PAD_KEY_COL4__USBPHY1_LINESTATE_1 71
+MX53_PAD_KEY_ROW4__KPP_ROW_4 72
+MX53_PAD_KEY_ROW4__GPIO4_15 73
+MX53_PAD_KEY_ROW4__CAN2_RXCAN 74
+MX53_PAD_KEY_ROW4__IPU_SISG_5 75
+MX53_PAD_KEY_ROW4__UART5_CTS 76
+MX53_PAD_KEY_ROW4__USBOH3_USBOTG_PWR 77
+MX53_PAD_KEY_ROW4__USBPHY1_VBUSVALID 78
+MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 79
+MX53_PAD_DI0_DISP_CLK__GPIO4_16 80
+MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR 81
+MX53_PAD_DI0_DISP_CLK__SDMA_DEBUG_CORE_STATE_0 82
+MX53_PAD_DI0_DISP_CLK__EMI_EMI_DEBUG_0 83
+MX53_PAD_DI0_DISP_CLK__USBPHY1_AVALID 84
+MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 85
+MX53_PAD_DI0_PIN15__GPIO4_17 86
+MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC 87
+MX53_PAD_DI0_PIN15__SDMA_DEBUG_CORE_STATE_1 88
+MX53_PAD_DI0_PIN15__EMI_EMI_DEBUG_1 89
+MX53_PAD_DI0_PIN15__USBPHY1_BVALID 90
+MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 91
+MX53_PAD_DI0_PIN2__GPIO4_18 92
+MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD 93
+MX53_PAD_DI0_PIN2__SDMA_DEBUG_CORE_STATE_2 94
+MX53_PAD_DI0_PIN2__EMI_EMI_DEBUG_2 95
+MX53_PAD_DI0_PIN2__USBPHY1_ENDSESSION 96
+MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 97
+MX53_PAD_DI0_PIN3__GPIO4_19 98
+MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS 99
+MX53_PAD_DI0_PIN3__SDMA_DEBUG_CORE_STATE_3 100
+MX53_PAD_DI0_PIN3__EMI_EMI_DEBUG_3 101
+MX53_PAD_DI0_PIN3__USBPHY1_IDDIG 102
+MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 103
+MX53_PAD_DI0_PIN4__GPIO4_20 104
+MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD 105
+MX53_PAD_DI0_PIN4__ESDHC1_WP 106
+MX53_PAD_DI0_PIN4__SDMA_DEBUG_YIELD 107
+MX53_PAD_DI0_PIN4__EMI_EMI_DEBUG_4 108
+MX53_PAD_DI0_PIN4__USBPHY1_HOSTDISCONNECT 109
+MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 110
+MX53_PAD_DISP0_DAT0__GPIO4_21 111
+MX53_PAD_DISP0_DAT0__CSPI_SCLK 112
+MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0 113
+MX53_PAD_DISP0_DAT0__SDMA_DEBUG_CORE_RUN 114
+MX53_PAD_DISP0_DAT0__EMI_EMI_DEBUG_5 115
+MX53_PAD_DISP0_DAT0__USBPHY2_TXREADY 116
+MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 117
+MX53_PAD_DISP0_DAT1__GPIO4_22 118
+MX53_PAD_DISP0_DAT1__CSPI_MOSI 119
+MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1 120
+MX53_PAD_DISP0_DAT1__SDMA_DEBUG_EVENT_CHANNEL_SEL 121
+MX53_PAD_DISP0_DAT1__EMI_EMI_DEBUG_6 122
+MX53_PAD_DISP0_DAT1__USBPHY2_RXVALID 123
+MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 124
+MX53_PAD_DISP0_DAT2__GPIO4_23 125
+MX53_PAD_DISP0_DAT2__CSPI_MISO 126
+MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2 127
+MX53_PAD_DISP0_DAT2__SDMA_DEBUG_MODE 128
+MX53_PAD_DISP0_DAT2__EMI_EMI_DEBUG_7 129
+MX53_PAD_DISP0_DAT2__USBPHY2_RXACTIVE 130
+MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 131
+MX53_PAD_DISP0_DAT3__GPIO4_24 132
+MX53_PAD_DISP0_DAT3__CSPI_SS0 133
+MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3 134
+MX53_PAD_DISP0_DAT3__SDMA_DEBUG_BUS_ERROR 135
+MX53_PAD_DISP0_DAT3__EMI_EMI_DEBUG_8 136
+MX53_PAD_DISP0_DAT3__USBPHY2_RXERROR 137
+MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 138
+MX53_PAD_DISP0_DAT4__GPIO4_25 139
+MX53_PAD_DISP0_DAT4__CSPI_SS1 140
+MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4 141
+MX53_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB 142
+MX53_PAD_DISP0_DAT4__EMI_EMI_DEBUG_9 143
+MX53_PAD_DISP0_DAT4__USBPHY2_SIECLOCK 144
+MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 145
+MX53_PAD_DISP0_DAT5__GPIO4_26 146
+MX53_PAD_DISP0_DAT5__CSPI_SS2 147
+MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5 148
+MX53_PAD_DISP0_DAT5__SDMA_DEBUG_MATCHED_DMBUS 149
+MX53_PAD_DISP0_DAT5__EMI_EMI_DEBUG_10 150
+MX53_PAD_DISP0_DAT5__USBPHY2_LINESTATE_0 151
+MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 152
+MX53_PAD_DISP0_DAT6__GPIO4_27 153
+MX53_PAD_DISP0_DAT6__CSPI_SS3 154
+MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6 155
+MX53_PAD_DISP0_DAT6__SDMA_DEBUG_RTBUFFER_WRITE 156
+MX53_PAD_DISP0_DAT6__EMI_EMI_DEBUG_11 157
+MX53_PAD_DISP0_DAT6__USBPHY2_LINESTATE_1 158
+MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 159
+MX53_PAD_DISP0_DAT7__GPIO4_28 160
+MX53_PAD_DISP0_DAT7__CSPI_RDY 161
+MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7 162
+MX53_PAD_DISP0_DAT7__SDMA_DEBUG_EVENT_CHANNEL_0 163
+MX53_PAD_DISP0_DAT7__EMI_EMI_DEBUG_12 164
+MX53_PAD_DISP0_DAT7__USBPHY2_VBUSVALID 165
+MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 166
+MX53_PAD_DISP0_DAT8__GPIO4_29 167
+MX53_PAD_DISP0_DAT8__PWM1_PWMO 168
+MX53_PAD_DISP0_DAT8__WDOG1_WDOG_B 169
+MX53_PAD_DISP0_DAT8__SDMA_DEBUG_EVENT_CHANNEL_1 170
+MX53_PAD_DISP0_DAT8__EMI_EMI_DEBUG_13 171
+MX53_PAD_DISP0_DAT8__USBPHY2_AVALID 172
+MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 173
+MX53_PAD_DISP0_DAT9__GPIO4_30 174
+MX53_PAD_DISP0_DAT9__PWM2_PWMO 175
+MX53_PAD_DISP0_DAT9__WDOG2_WDOG_B 176
+MX53_PAD_DISP0_DAT9__SDMA_DEBUG_EVENT_CHANNEL_2 177
+MX53_PAD_DISP0_DAT9__EMI_EMI_DEBUG_14 178
+MX53_PAD_DISP0_DAT9__USBPHY2_VSTATUS_0 179
+MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 180
+MX53_PAD_DISP0_DAT10__GPIO4_31 181
+MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP 182
+MX53_PAD_DISP0_DAT10__SDMA_DEBUG_EVENT_CHANNEL_3 183
+MX53_PAD_DISP0_DAT10__EMI_EMI_DEBUG_15 184
+MX53_PAD_DISP0_DAT10__USBPHY2_VSTATUS_1 185
+MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 186
+MX53_PAD_DISP0_DAT11__GPIO5_5 187
+MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT 188
+MX53_PAD_DISP0_DAT11__SDMA_DEBUG_EVENT_CHANNEL_4 189
+MX53_PAD_DISP0_DAT11__EMI_EMI_DEBUG_16 190
+MX53_PAD_DISP0_DAT11__USBPHY2_VSTATUS_2 191
+MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 192
+MX53_PAD_DISP0_DAT12__GPIO5_6 193
+MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK 194
+MX53_PAD_DISP0_DAT12__SDMA_DEBUG_EVENT_CHANNEL_5 195
+MX53_PAD_DISP0_DAT12__EMI_EMI_DEBUG_17 196
+MX53_PAD_DISP0_DAT12__USBPHY2_VSTATUS_3 197
+MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 198
+MX53_PAD_DISP0_DAT13__GPIO5_7 199
+MX53_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS 200
+MX53_PAD_DISP0_DAT13__SDMA_DEBUG_EVT_CHN_LINES_0 201
+MX53_PAD_DISP0_DAT13__EMI_EMI_DEBUG_18 202
+MX53_PAD_DISP0_DAT13__USBPHY2_VSTATUS_4 203
+MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 204
+MX53_PAD_DISP0_DAT14__GPIO5_8 205
+MX53_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC 206
+MX53_PAD_DISP0_DAT14__SDMA_DEBUG_EVT_CHN_LINES_1 207
+MX53_PAD_DISP0_DAT14__EMI_EMI_DEBUG_19 208
+MX53_PAD_DISP0_DAT14__USBPHY2_VSTATUS_5 209
+MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 210
+MX53_PAD_DISP0_DAT15__GPIO5_9 211
+MX53_PAD_DISP0_DAT15__ECSPI1_SS1 212
+MX53_PAD_DISP0_DAT15__ECSPI2_SS1 213
+MX53_PAD_DISP0_DAT15__SDMA_DEBUG_EVT_CHN_LINES_2 214
+MX53_PAD_DISP0_DAT15__EMI_EMI_DEBUG_20 215
+MX53_PAD_DISP0_DAT15__USBPHY2_VSTATUS_6 216
+MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 217
+MX53_PAD_DISP0_DAT16__GPIO5_10 218
+MX53_PAD_DISP0_DAT16__ECSPI2_MOSI 219
+MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC 220
+MX53_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0 221
+MX53_PAD_DISP0_DAT16__SDMA_DEBUG_EVT_CHN_LINES_3 222
+MX53_PAD_DISP0_DAT16__EMI_EMI_DEBUG_21 223
+MX53_PAD_DISP0_DAT16__USBPHY2_VSTATUS_7 224
+MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 225
+MX53_PAD_DISP0_DAT17__GPIO5_11 226
+MX53_PAD_DISP0_DAT17__ECSPI2_MISO 227
+MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD 228
+MX53_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1 229
+MX53_PAD_DISP0_DAT17__SDMA_DEBUG_EVT_CHN_LINES_4 230
+MX53_PAD_DISP0_DAT17__EMI_EMI_DEBUG_22 231
+MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 232
+MX53_PAD_DISP0_DAT18__GPIO5_12 233
+MX53_PAD_DISP0_DAT18__ECSPI2_SS0 234
+MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS 235
+MX53_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS 236
+MX53_PAD_DISP0_DAT18__SDMA_DEBUG_EVT_CHN_LINES_5 237
+MX53_PAD_DISP0_DAT18__EMI_EMI_DEBUG_23 238
+MX53_PAD_DISP0_DAT18__EMI_WEIM_CS_2 239
+MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 240
+MX53_PAD_DISP0_DAT19__GPIO5_13 241
+MX53_PAD_DISP0_DAT19__ECSPI2_SCLK 242
+MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD 243
+MX53_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC 244
+MX53_PAD_DISP0_DAT19__SDMA_DEBUG_EVT_CHN_LINES_6 245
+MX53_PAD_DISP0_DAT19__EMI_EMI_DEBUG_24 246
+MX53_PAD_DISP0_DAT19__EMI_WEIM_CS_3 247
+MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 248
+MX53_PAD_DISP0_DAT20__GPIO5_14 249
+MX53_PAD_DISP0_DAT20__ECSPI1_SCLK 250
+MX53_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC 251
+MX53_PAD_DISP0_DAT20__SDMA_DEBUG_EVT_CHN_LINES_7 252
+MX53_PAD_DISP0_DAT20__EMI_EMI_DEBUG_25 253
+MX53_PAD_DISP0_DAT20__SATA_PHY_TDI 254
+MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 255
+MX53_PAD_DISP0_DAT21__GPIO5_15 256
+MX53_PAD_DISP0_DAT21__ECSPI1_MOSI 257
+MX53_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD 258
+MX53_PAD_DISP0_DAT21__SDMA_DEBUG_BUS_DEVICE_0 259
+MX53_PAD_DISP0_DAT21__EMI_EMI_DEBUG_26 260
+MX53_PAD_DISP0_DAT21__SATA_PHY_TDO 261
+MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 262
+MX53_PAD_DISP0_DAT22__GPIO5_16 263
+MX53_PAD_DISP0_DAT22__ECSPI1_MISO 264
+MX53_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS 265
+MX53_PAD_DISP0_DAT22__SDMA_DEBUG_BUS_DEVICE_1 266
+MX53_PAD_DISP0_DAT22__EMI_EMI_DEBUG_27 267
+MX53_PAD_DISP0_DAT22__SATA_PHY_TCK 268
+MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 269
+MX53_PAD_DISP0_DAT23__GPIO5_17 270
+MX53_PAD_DISP0_DAT23__ECSPI1_SS0 271
+MX53_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD 272
+MX53_PAD_DISP0_DAT23__SDMA_DEBUG_BUS_DEVICE_2 273
+MX53_PAD_DISP0_DAT23__EMI_EMI_DEBUG_28 274
+MX53_PAD_DISP0_DAT23__SATA_PHY_TMS 275
+MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 276
+MX53_PAD_CSI0_PIXCLK__GPIO5_18 277
+MX53_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0 278
+MX53_PAD_CSI0_PIXCLK__EMI_EMI_DEBUG_29 279
+MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC 280
+MX53_PAD_CSI0_MCLK__GPIO5_19 281
+MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK 282
+MX53_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1 283
+MX53_PAD_CSI0_MCLK__EMI_EMI_DEBUG_30 284
+MX53_PAD_CSI0_MCLK__TPIU_TRCTL 285
+MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 286
+MX53_PAD_CSI0_DATA_EN__GPIO5_20 287
+MX53_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2 288
+MX53_PAD_CSI0_DATA_EN__EMI_EMI_DEBUG_31 289
+MX53_PAD_CSI0_DATA_EN__TPIU_TRCLK 290
+MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC 291
+MX53_PAD_CSI0_VSYNC__GPIO5_21 292
+MX53_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3 293
+MX53_PAD_CSI0_VSYNC__EMI_EMI_DEBUG_32 294
+MX53_PAD_CSI0_VSYNC__TPIU_TRACE_0 295
+MX53_PAD_CSI0_DAT4__IPU_CSI0_D_4 296
+MX53_PAD_CSI0_DAT4__GPIO5_22 297
+MX53_PAD_CSI0_DAT4__KPP_COL_5 298
+MX53_PAD_CSI0_DAT4__ECSPI1_SCLK 299
+MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP 300
+MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 301
+MX53_PAD_CSI0_DAT4__EMI_EMI_DEBUG_33 302
+MX53_PAD_CSI0_DAT4__TPIU_TRACE_1 303
+MX53_PAD_CSI0_DAT5__IPU_CSI0_D_5 304
+MX53_PAD_CSI0_DAT5__GPIO5_23 305
+MX53_PAD_CSI0_DAT5__KPP_ROW_5 306
+MX53_PAD_CSI0_DAT5__ECSPI1_MOSI 307
+MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT 308
+MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 309
+MX53_PAD_CSI0_DAT5__EMI_EMI_DEBUG_34 310
+MX53_PAD_CSI0_DAT5__TPIU_TRACE_2 311
+MX53_PAD_CSI0_DAT6__IPU_CSI0_D_6 312
+MX53_PAD_CSI0_DAT6__GPIO5_24 313
+MX53_PAD_CSI0_DAT6__KPP_COL_6 314
+MX53_PAD_CSI0_DAT6__ECSPI1_MISO 315
+MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK 316
+MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 317
+MX53_PAD_CSI0_DAT6__EMI_EMI_DEBUG_35 318
+MX53_PAD_CSI0_DAT6__TPIU_TRACE_3 319
+MX53_PAD_CSI0_DAT7__IPU_CSI0_D_7 320
+MX53_PAD_CSI0_DAT7__GPIO5_25 321
+MX53_PAD_CSI0_DAT7__KPP_ROW_6 322
+MX53_PAD_CSI0_DAT7__ECSPI1_SS0 323
+MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR 324
+MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 325
+MX53_PAD_CSI0_DAT7__EMI_EMI_DEBUG_36 326
+MX53_PAD_CSI0_DAT7__TPIU_TRACE_4 327
+MX53_PAD_CSI0_DAT8__IPU_CSI0_D_8 328
+MX53_PAD_CSI0_DAT8__GPIO5_26 329
+MX53_PAD_CSI0_DAT8__KPP_COL_7 330
+MX53_PAD_CSI0_DAT8__ECSPI2_SCLK 331
+MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC 332
+MX53_PAD_CSI0_DAT8__I2C1_SDA 333
+MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 334
+MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 335
+MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 336
+MX53_PAD_CSI0_DAT9__GPIO5_27 337
+MX53_PAD_CSI0_DAT9__KPP_ROW_7 338
+MX53_PAD_CSI0_DAT9__ECSPI2_MOSI 339
+MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR 340
+MX53_PAD_CSI0_DAT9__I2C1_SCL 341
+MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 342
+MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 343
+MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 344
+MX53_PAD_CSI0_DAT10__GPIO5_28 345
+MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 346
+MX53_PAD_CSI0_DAT10__ECSPI2_MISO 347
+MX53_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC 348
+MX53_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4 349
+MX53_PAD_CSI0_DAT10__EMI_EMI_DEBUG_39 350
+MX53_PAD_CSI0_DAT10__TPIU_TRACE_7 351
+MX53_PAD_CSI0_DAT11__IPU_CSI0_D_11 352
+MX53_PAD_CSI0_DAT11__GPIO5_29 353
+MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 354
+MX53_PAD_CSI0_DAT11__ECSPI2_SS0 355
+MX53_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS 356
+MX53_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5 357
+MX53_PAD_CSI0_DAT11__EMI_EMI_DEBUG_40 358
+MX53_PAD_CSI0_DAT11__TPIU_TRACE_8 359
+MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 360
+MX53_PAD_CSI0_DAT12__GPIO5_30 361
+MX53_PAD_CSI0_DAT12__UART4_TXD_MUX 362
+MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0 363
+MX53_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6 364
+MX53_PAD_CSI0_DAT12__EMI_EMI_DEBUG_41 365
+MX53_PAD_CSI0_DAT12__TPIU_TRACE_9 366
+MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 367
+MX53_PAD_CSI0_DAT13__GPIO5_31 368
+MX53_PAD_CSI0_DAT13__UART4_RXD_MUX 369
+MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1 370
+MX53_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7 371
+MX53_PAD_CSI0_DAT13__EMI_EMI_DEBUG_42 372
+MX53_PAD_CSI0_DAT13__TPIU_TRACE_10 373
+MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 374
+MX53_PAD_CSI0_DAT14__GPIO6_0 375
+MX53_PAD_CSI0_DAT14__UART5_TXD_MUX 376
+MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2 377
+MX53_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8 378
+MX53_PAD_CSI0_DAT14__EMI_EMI_DEBUG_43 379
+MX53_PAD_CSI0_DAT14__TPIU_TRACE_11 380
+MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 381
+MX53_PAD_CSI0_DAT15__GPIO6_1 382
+MX53_PAD_CSI0_DAT15__UART5_RXD_MUX 383
+MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3 384
+MX53_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9 385
+MX53_PAD_CSI0_DAT15__EMI_EMI_DEBUG_44 386
+MX53_PAD_CSI0_DAT15__TPIU_TRACE_12 387
+MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 388
+MX53_PAD_CSI0_DAT16__GPIO6_2 389
+MX53_PAD_CSI0_DAT16__UART4_RTS 390
+MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4 391
+MX53_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10 392
+MX53_PAD_CSI0_DAT16__EMI_EMI_DEBUG_45 393
+MX53_PAD_CSI0_DAT16__TPIU_TRACE_13 394
+MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 395
+MX53_PAD_CSI0_DAT17__GPIO6_3 396
+MX53_PAD_CSI0_DAT17__UART4_CTS 397
+MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5 398
+MX53_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11 399
+MX53_PAD_CSI0_DAT17__EMI_EMI_DEBUG_46 400
+MX53_PAD_CSI0_DAT17__TPIU_TRACE_14 401
+MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 402
+MX53_PAD_CSI0_DAT18__GPIO6_4 403
+MX53_PAD_CSI0_DAT18__UART5_RTS 404
+MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6 405
+MX53_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12 406
+MX53_PAD_CSI0_DAT18__EMI_EMI_DEBUG_47 407
+MX53_PAD_CSI0_DAT18__TPIU_TRACE_15 408
+MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 409
+MX53_PAD_CSI0_DAT19__GPIO6_5 410
+MX53_PAD_CSI0_DAT19__UART5_CTS 411
+MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7 412
+MX53_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13 413
+MX53_PAD_CSI0_DAT19__EMI_EMI_DEBUG_48 414
+MX53_PAD_CSI0_DAT19__USBPHY2_BISTOK 415
+MX53_PAD_EIM_A25__EMI_WEIM_A_25 416
+MX53_PAD_EIM_A25__GPIO5_2 417
+MX53_PAD_EIM_A25__ECSPI2_RDY 418
+MX53_PAD_EIM_A25__IPU_DI1_PIN12 419
+MX53_PAD_EIM_A25__CSPI_SS1 420
+MX53_PAD_EIM_A25__IPU_DI0_D1_CS 421
+MX53_PAD_EIM_A25__USBPHY1_BISTOK 422
+MX53_PAD_EIM_EB2__EMI_WEIM_EB_2 423
+MX53_PAD_EIM_EB2__GPIO2_30 424
+MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK 425
+MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS 426
+MX53_PAD_EIM_EB2__ECSPI1_SS0 427
+MX53_PAD_EIM_EB2__I2C2_SCL 428
+MX53_PAD_EIM_D16__EMI_WEIM_D_16 429
+MX53_PAD_EIM_D16__GPIO3_16 430
+MX53_PAD_EIM_D16__IPU_DI0_PIN5 431
+MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK 432
+MX53_PAD_EIM_D16__ECSPI1_SCLK 433
+MX53_PAD_EIM_D16__I2C2_SDA 434
+MX53_PAD_EIM_D17__EMI_WEIM_D_17 435
+MX53_PAD_EIM_D17__GPIO3_17 436
+MX53_PAD_EIM_D17__IPU_DI0_PIN6 437
+MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN 438
+MX53_PAD_EIM_D17__ECSPI1_MISO 439
+MX53_PAD_EIM_D17__I2C3_SCL 440
+MX53_PAD_EIM_D18__EMI_WEIM_D_18 441
+MX53_PAD_EIM_D18__GPIO3_18 442
+MX53_PAD_EIM_D18__IPU_DI0_PIN7 443
+MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO 444
+MX53_PAD_EIM_D18__ECSPI1_MOSI 445
+MX53_PAD_EIM_D18__I2C3_SDA 446
+MX53_PAD_EIM_D18__IPU_DI1_D0_CS 447
+MX53_PAD_EIM_D19__EMI_WEIM_D_19 448
+MX53_PAD_EIM_D19__GPIO3_19 449
+MX53_PAD_EIM_D19__IPU_DI0_PIN8 450
+MX53_PAD_EIM_D19__IPU_DISPB1_SER_RS 451
+MX53_PAD_EIM_D19__ECSPI1_SS1 452
+MX53_PAD_EIM_D19__EPIT1_EPITO 453
+MX53_PAD_EIM_D19__UART1_CTS 454
+MX53_PAD_EIM_D19__USBOH3_USBH2_OC 455
+MX53_PAD_EIM_D20__EMI_WEIM_D_20 456
+MX53_PAD_EIM_D20__GPIO3_20 457
+MX53_PAD_EIM_D20__IPU_DI0_PIN16 458
+MX53_PAD_EIM_D20__IPU_SER_DISP0_CS 459
+MX53_PAD_EIM_D20__CSPI_SS0 460
+MX53_PAD_EIM_D20__EPIT2_EPITO 461
+MX53_PAD_EIM_D20__UART1_RTS 462
+MX53_PAD_EIM_D20__USBOH3_USBH2_PWR 463
+MX53_PAD_EIM_D21__EMI_WEIM_D_21 464
+MX53_PAD_EIM_D21__GPIO3_21 465
+MX53_PAD_EIM_D21__IPU_DI0_PIN17 466
+MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK 467
+MX53_PAD_EIM_D21__CSPI_SCLK 468
+MX53_PAD_EIM_D21__I2C1_SCL 469
+MX53_PAD_EIM_D21__USBOH3_USBOTG_OC 470
+MX53_PAD_EIM_D22__EMI_WEIM_D_22 471
+MX53_PAD_EIM_D22__GPIO3_22 472
+MX53_PAD_EIM_D22__IPU_DI0_PIN1 473
+MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN 474
+MX53_PAD_EIM_D22__CSPI_MISO 475
+MX53_PAD_EIM_D22__USBOH3_USBOTG_PWR 476
+MX53_PAD_EIM_D23__EMI_WEIM_D_23 477
+MX53_PAD_EIM_D23__GPIO3_23 478
+MX53_PAD_EIM_D23__UART3_CTS 479
+MX53_PAD_EIM_D23__UART1_DCD 480
+MX53_PAD_EIM_D23__IPU_DI0_D0_CS 481
+MX53_PAD_EIM_D23__IPU_DI1_PIN2 482
+MX53_PAD_EIM_D23__IPU_CSI1_DATA_EN 483
+MX53_PAD_EIM_D23__IPU_DI1_PIN14 484
+MX53_PAD_EIM_EB3__EMI_WEIM_EB_3 485
+MX53_PAD_EIM_EB3__GPIO2_31 486
+MX53_PAD_EIM_EB3__UART3_RTS 487
+MX53_PAD_EIM_EB3__UART1_RI 488
+MX53_PAD_EIM_EB3__IPU_DI1_PIN3 489
+MX53_PAD_EIM_EB3__IPU_CSI1_HSYNC 490
+MX53_PAD_EIM_EB3__IPU_DI1_PIN16 491
+MX53_PAD_EIM_D24__EMI_WEIM_D_24 492
+MX53_PAD_EIM_D24__GPIO3_24 493
+MX53_PAD_EIM_D24__UART3_TXD_MUX 494
+MX53_PAD_EIM_D24__ECSPI1_SS2 495
+MX53_PAD_EIM_D24__CSPI_SS2 496
+MX53_PAD_EIM_D24__AUDMUX_AUD5_RXFS 497
+MX53_PAD_EIM_D24__ECSPI2_SS2 498
+MX53_PAD_EIM_D24__UART1_DTR 499
+MX53_PAD_EIM_D25__EMI_WEIM_D_25 500
+MX53_PAD_EIM_D25__GPIO3_25 501
+MX53_PAD_EIM_D25__UART3_RXD_MUX 502
+MX53_PAD_EIM_D25__ECSPI1_SS3 503
+MX53_PAD_EIM_D25__CSPI_SS3 504
+MX53_PAD_EIM_D25__AUDMUX_AUD5_RXC 505
+MX53_PAD_EIM_D25__ECSPI2_SS3 506
+MX53_PAD_EIM_D25__UART1_DSR 507
+MX53_PAD_EIM_D26__EMI_WEIM_D_26 508
+MX53_PAD_EIM_D26__GPIO3_26 509
+MX53_PAD_EIM_D26__UART2_TXD_MUX 510
+MX53_PAD_EIM_D26__FIRI_RXD 511
+MX53_PAD_EIM_D26__IPU_CSI0_D_1 512
+MX53_PAD_EIM_D26__IPU_DI1_PIN11 513
+MX53_PAD_EIM_D26__IPU_SISG_2 514
+MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 515
+MX53_PAD_EIM_D27__EMI_WEIM_D_27 516
+MX53_PAD_EIM_D27__GPIO3_27 517
+MX53_PAD_EIM_D27__UART2_RXD_MUX 518
+MX53_PAD_EIM_D27__FIRI_TXD 519
+MX53_PAD_EIM_D27__IPU_CSI0_D_0 520
+MX53_PAD_EIM_D27__IPU_DI1_PIN13 521
+MX53_PAD_EIM_D27__IPU_SISG_3 522
+MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 523
+MX53_PAD_EIM_D28__EMI_WEIM_D_28 524
+MX53_PAD_EIM_D28__GPIO3_28 525
+MX53_PAD_EIM_D28__UART2_CTS 526
+MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO 527
+MX53_PAD_EIM_D28__CSPI_MOSI 528
+MX53_PAD_EIM_D28__I2C1_SDA 529
+MX53_PAD_EIM_D28__IPU_EXT_TRIG 530
+MX53_PAD_EIM_D28__IPU_DI0_PIN13 531
+MX53_PAD_EIM_D29__EMI_WEIM_D_29 532
+MX53_PAD_EIM_D29__GPIO3_29 533
+MX53_PAD_EIM_D29__UART2_RTS 534
+MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS 535
+MX53_PAD_EIM_D29__CSPI_SS0 536
+MX53_PAD_EIM_D29__IPU_DI1_PIN15 537
+MX53_PAD_EIM_D29__IPU_CSI1_VSYNC 538
+MX53_PAD_EIM_D29__IPU_DI0_PIN14 539
+MX53_PAD_EIM_D30__EMI_WEIM_D_30 540
+MX53_PAD_EIM_D30__GPIO3_30 541
+MX53_PAD_EIM_D30__UART3_CTS 542
+MX53_PAD_EIM_D30__IPU_CSI0_D_3 543
+MX53_PAD_EIM_D30__IPU_DI0_PIN11 544
+MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 545
+MX53_PAD_EIM_D30__USBOH3_USBH1_OC 546
+MX53_PAD_EIM_D30__USBOH3_USBH2_OC 547
+MX53_PAD_EIM_D31__EMI_WEIM_D_31 548
+MX53_PAD_EIM_D31__GPIO3_31 549
+MX53_PAD_EIM_D31__UART3_RTS 550
+MX53_PAD_EIM_D31__IPU_CSI0_D_2 551
+MX53_PAD_EIM_D31__IPU_DI0_PIN12 552
+MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 553
+MX53_PAD_EIM_D31__USBOH3_USBH1_PWR 554
+MX53_PAD_EIM_D31__USBOH3_USBH2_PWR 555
+MX53_PAD_EIM_A24__EMI_WEIM_A_24 556
+MX53_PAD_EIM_A24__GPIO5_4 557
+MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 558
+MX53_PAD_EIM_A24__IPU_CSI1_D_19 559
+MX53_PAD_EIM_A24__IPU_SISG_2 560
+MX53_PAD_EIM_A24__USBPHY2_BVALID 561
+MX53_PAD_EIM_A23__EMI_WEIM_A_23 562
+MX53_PAD_EIM_A23__GPIO6_6 563
+MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 564
+MX53_PAD_EIM_A23__IPU_CSI1_D_18 565
+MX53_PAD_EIM_A23__IPU_SISG_3 566
+MX53_PAD_EIM_A23__USBPHY2_ENDSESSION 567
+MX53_PAD_EIM_A22__EMI_WEIM_A_22 568
+MX53_PAD_EIM_A22__GPIO2_16 569
+MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 570
+MX53_PAD_EIM_A22__IPU_CSI1_D_17 571
+MX53_PAD_EIM_A22__SRC_BT_CFG1_7 572
+MX53_PAD_EIM_A21__EMI_WEIM_A_21 573
+MX53_PAD_EIM_A21__GPIO2_17 574
+MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 575
+MX53_PAD_EIM_A21__IPU_CSI1_D_16 576
+MX53_PAD_EIM_A21__SRC_BT_CFG1_6 577
+MX53_PAD_EIM_A20__EMI_WEIM_A_20 578
+MX53_PAD_EIM_A20__GPIO2_18 579
+MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 580
+MX53_PAD_EIM_A20__IPU_CSI1_D_15 581
+MX53_PAD_EIM_A20__SRC_BT_CFG1_5 582
+MX53_PAD_EIM_A19__EMI_WEIM_A_19 583
+MX53_PAD_EIM_A19__GPIO2_19 584
+MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 585
+MX53_PAD_EIM_A19__IPU_CSI1_D_14 586
+MX53_PAD_EIM_A19__SRC_BT_CFG1_4 587
+MX53_PAD_EIM_A18__EMI_WEIM_A_18 588
+MX53_PAD_EIM_A18__GPIO2_20 589
+MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 590
+MX53_PAD_EIM_A18__IPU_CSI1_D_13 591
+MX53_PAD_EIM_A18__SRC_BT_CFG1_3 592
+MX53_PAD_EIM_A17__EMI_WEIM_A_17 593
+MX53_PAD_EIM_A17__GPIO2_21 594
+MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 595
+MX53_PAD_EIM_A17__IPU_CSI1_D_12 596
+MX53_PAD_EIM_A17__SRC_BT_CFG1_2 597
+MX53_PAD_EIM_A16__EMI_WEIM_A_16 598
+MX53_PAD_EIM_A16__GPIO2_22 599
+MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 600
+MX53_PAD_EIM_A16__IPU_CSI1_PIXCLK 601
+MX53_PAD_EIM_A16__SRC_BT_CFG1_1 602
+MX53_PAD_EIM_CS0__EMI_WEIM_CS_0 603
+MX53_PAD_EIM_CS0__GPIO2_23 604
+MX53_PAD_EIM_CS0__ECSPI2_SCLK 605
+MX53_PAD_EIM_CS0__IPU_DI1_PIN5 606
+MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 607
+MX53_PAD_EIM_CS1__GPIO2_24 608
+MX53_PAD_EIM_CS1__ECSPI2_MOSI 609
+MX53_PAD_EIM_CS1__IPU_DI1_PIN6 610
+MX53_PAD_EIM_OE__EMI_WEIM_OE 611
+MX53_PAD_EIM_OE__GPIO2_25 612
+MX53_PAD_EIM_OE__ECSPI2_MISO 613
+MX53_PAD_EIM_OE__IPU_DI1_PIN7 614
+MX53_PAD_EIM_OE__USBPHY2_IDDIG 615
+MX53_PAD_EIM_RW__EMI_WEIM_RW 616
+MX53_PAD_EIM_RW__GPIO2_26 617
+MX53_PAD_EIM_RW__ECSPI2_SS0 618
+MX53_PAD_EIM_RW__IPU_DI1_PIN8 619
+MX53_PAD_EIM_RW__USBPHY2_HOSTDISCONNECT 620
+MX53_PAD_EIM_LBA__EMI_WEIM_LBA 621
+MX53_PAD_EIM_LBA__GPIO2_27 622
+MX53_PAD_EIM_LBA__ECSPI2_SS1 623
+MX53_PAD_EIM_LBA__IPU_DI1_PIN17 624
+MX53_PAD_EIM_LBA__SRC_BT_CFG1_0 625
+MX53_PAD_EIM_EB0__EMI_WEIM_EB_0 626
+MX53_PAD_EIM_EB0__GPIO2_28 627
+MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 628
+MX53_PAD_EIM_EB0__IPU_CSI1_D_11 629
+MX53_PAD_EIM_EB0__GPC_PMIC_RDY 630
+MX53_PAD_EIM_EB0__SRC_BT_CFG2_7 631
+MX53_PAD_EIM_EB1__EMI_WEIM_EB_1 632
+MX53_PAD_EIM_EB1__GPIO2_29 633
+MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 634
+MX53_PAD_EIM_EB1__IPU_CSI1_D_10 635
+MX53_PAD_EIM_EB1__SRC_BT_CFG2_6 636
+MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 637
+MX53_PAD_EIM_DA0__GPIO3_0 638
+MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 639
+MX53_PAD_EIM_DA0__IPU_CSI1_D_9 640
+MX53_PAD_EIM_DA0__SRC_BT_CFG2_5 641
+MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 642
+MX53_PAD_EIM_DA1__GPIO3_1 643
+MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 644
+MX53_PAD_EIM_DA1__IPU_CSI1_D_8 645
+MX53_PAD_EIM_DA1__SRC_BT_CFG2_4 646
+MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 647
+MX53_PAD_EIM_DA2__GPIO3_2 648
+MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 649
+MX53_PAD_EIM_DA2__IPU_CSI1_D_7 650
+MX53_PAD_EIM_DA2__SRC_BT_CFG2_3 651
+MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 652
+MX53_PAD_EIM_DA3__GPIO3_3 653
+MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 654
+MX53_PAD_EIM_DA3__IPU_CSI1_D_6 655
+MX53_PAD_EIM_DA3__SRC_BT_CFG2_2 656
+MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 657
+MX53_PAD_EIM_DA4__GPIO3_4 658
+MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 659
+MX53_PAD_EIM_DA4__IPU_CSI1_D_5 660
+MX53_PAD_EIM_DA4__SRC_BT_CFG3_7 661
+MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 662
+MX53_PAD_EIM_DA5__GPIO3_5 663
+MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 664
+MX53_PAD_EIM_DA5__IPU_CSI1_D_4 665
+MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 666
+MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 667
+MX53_PAD_EIM_DA6__GPIO3_6 668
+MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 669
+MX53_PAD_EIM_DA6__IPU_CSI1_D_3 670
+MX53_PAD_EIM_DA6__SRC_BT_CFG3_5 671
+MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 672
+MX53_PAD_EIM_DA7__GPIO3_7 673
+MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 674
+MX53_PAD_EIM_DA7__IPU_CSI1_D_2 675
+MX53_PAD_EIM_DA7__SRC_BT_CFG3_4 676
+MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8 677
+MX53_PAD_EIM_DA8__GPIO3_8 678
+MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 679
+MX53_PAD_EIM_DA8__IPU_CSI1_D_1 680
+MX53_PAD_EIM_DA8__SRC_BT_CFG3_3 681
+MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9 682
+MX53_PAD_EIM_DA9__GPIO3_9 683
+MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 684
+MX53_PAD_EIM_DA9__IPU_CSI1_D_0 685
+MX53_PAD_EIM_DA9__SRC_BT_CFG3_2 686
+MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10 687
+MX53_PAD_EIM_DA10__GPIO3_10 688
+MX53_PAD_EIM_DA10__IPU_DI1_PIN15 689
+MX53_PAD_EIM_DA10__IPU_CSI1_DATA_EN 690
+MX53_PAD_EIM_DA10__SRC_BT_CFG3_1 691
+MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11 692
+MX53_PAD_EIM_DA11__GPIO3_11 693
+MX53_PAD_EIM_DA11__IPU_DI1_PIN2 694
+MX53_PAD_EIM_DA11__IPU_CSI1_HSYNC 695
+MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12 696
+MX53_PAD_EIM_DA12__GPIO3_12 697
+MX53_PAD_EIM_DA12__IPU_DI1_PIN3 698
+MX53_PAD_EIM_DA12__IPU_CSI1_VSYNC 699
+MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13 700
+MX53_PAD_EIM_DA13__GPIO3_13 701
+MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 702
+MX53_PAD_EIM_DA13__CCM_DI1_EXT_CLK 703
+MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14 704
+MX53_PAD_EIM_DA14__GPIO3_14 705
+MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 706
+MX53_PAD_EIM_DA14__CCM_DI0_EXT_CLK 707
+MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15 708
+MX53_PAD_EIM_DA15__GPIO3_15 709
+MX53_PAD_EIM_DA15__IPU_DI1_PIN1 710
+MX53_PAD_EIM_DA15__IPU_DI1_PIN4 711
+MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 712
+MX53_PAD_NANDF_WE_B__GPIO6_12 713
+MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 714
+MX53_PAD_NANDF_RE_B__GPIO6_13 715
+MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT 716
+MX53_PAD_EIM_WAIT__GPIO5_0 717
+MX53_PAD_EIM_WAIT__EMI_WEIM_DTACK_B 718
+MX53_PAD_LVDS1_TX3_P__GPIO6_22 719
+MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 720
+MX53_PAD_LVDS1_TX2_P__GPIO6_24 721
+MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 722
+MX53_PAD_LVDS1_CLK_P__GPIO6_26 723
+MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 724
+MX53_PAD_LVDS1_TX1_P__GPIO6_28 725
+MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 726
+MX53_PAD_LVDS1_TX0_P__GPIO6_30 727
+MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 728
+MX53_PAD_LVDS0_TX3_P__GPIO7_22 729
+MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 730
+MX53_PAD_LVDS0_CLK_P__GPIO7_24 731
+MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 732
+MX53_PAD_LVDS0_TX2_P__GPIO7_26 733
+MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 734
+MX53_PAD_LVDS0_TX1_P__GPIO7_28 735
+MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 736
+MX53_PAD_LVDS0_TX0_P__GPIO7_30 737
+MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 738
+MX53_PAD_GPIO_10__GPIO4_0 739
+MX53_PAD_GPIO_10__OSC32k_32K_OUT 740
+MX53_PAD_GPIO_11__GPIO4_1 741
+MX53_PAD_GPIO_12__GPIO4_2 742
+MX53_PAD_GPIO_13__GPIO4_3 743
+MX53_PAD_GPIO_14__GPIO4_4 744
+MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 745
+MX53_PAD_NANDF_CLE__GPIO6_7 746
+MX53_PAD_NANDF_CLE__USBPHY1_VSTATUS_0 747
+MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 748
+MX53_PAD_NANDF_ALE__GPIO6_8 749
+MX53_PAD_NANDF_ALE__USBPHY1_VSTATUS_1 750
+MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 751
+MX53_PAD_NANDF_WP_B__GPIO6_9 752
+MX53_PAD_NANDF_WP_B__USBPHY1_VSTATUS_2 753
+MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 754
+MX53_PAD_NANDF_RB0__GPIO6_10 755
+MX53_PAD_NANDF_RB0__USBPHY1_VSTATUS_3 756
+MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 757
+MX53_PAD_NANDF_CS0__GPIO6_11 758
+MX53_PAD_NANDF_CS0__USBPHY1_VSTATUS_4 759
+MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1 760
+MX53_PAD_NANDF_CS1__GPIO6_14 761
+MX53_PAD_NANDF_CS1__MLB_MLBCLK 762
+MX53_PAD_NANDF_CS1__USBPHY1_VSTATUS_5 763
+MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2 764
+MX53_PAD_NANDF_CS2__GPIO6_15 765
+MX53_PAD_NANDF_CS2__IPU_SISG_0 766
+MX53_PAD_NANDF_CS2__ESAI1_TX0 767
+MX53_PAD_NANDF_CS2__EMI_WEIM_CRE 768
+MX53_PAD_NANDF_CS2__CCM_CSI0_MCLK 769
+MX53_PAD_NANDF_CS2__MLB_MLBSIG 770
+MX53_PAD_NANDF_CS2__USBPHY1_VSTATUS_6 771
+MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3 772
+MX53_PAD_NANDF_CS3__GPIO6_16 773
+MX53_PAD_NANDF_CS3__IPU_SISG_1 774
+MX53_PAD_NANDF_CS3__ESAI1_TX1 775
+MX53_PAD_NANDF_CS3__EMI_WEIM_A_26 776
+MX53_PAD_NANDF_CS3__MLB_MLBDAT 777
+MX53_PAD_NANDF_CS3__USBPHY1_VSTATUS_7 778
+MX53_PAD_FEC_MDIO__FEC_MDIO 779
+MX53_PAD_FEC_MDIO__GPIO1_22 780
+MX53_PAD_FEC_MDIO__ESAI1_SCKR 781
+MX53_PAD_FEC_MDIO__FEC_COL 782
+MX53_PAD_FEC_MDIO__RTC_CE_RTC_PS2 783
+MX53_PAD_FEC_MDIO__SDMA_DEBUG_BUS_DEVICE_3 784
+MX53_PAD_FEC_MDIO__EMI_EMI_DEBUG_49 785
+MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 786
+MX53_PAD_FEC_REF_CLK__GPIO1_23 787
+MX53_PAD_FEC_REF_CLK__ESAI1_FSR 788
+MX53_PAD_FEC_REF_CLK__SDMA_DEBUG_BUS_DEVICE_4 789
+MX53_PAD_FEC_REF_CLK__EMI_EMI_DEBUG_50 790
+MX53_PAD_FEC_RX_ER__FEC_RX_ER 791
+MX53_PAD_FEC_RX_ER__GPIO1_24 792
+MX53_PAD_FEC_RX_ER__ESAI1_HCKR 793
+MX53_PAD_FEC_RX_ER__FEC_RX_CLK 794
+MX53_PAD_FEC_RX_ER__RTC_CE_RTC_PS3 795
+MX53_PAD_FEC_CRS_DV__FEC_RX_DV 796
+MX53_PAD_FEC_CRS_DV__GPIO1_25 797
+MX53_PAD_FEC_CRS_DV__ESAI1_SCKT 798
+MX53_PAD_FEC_RXD1__FEC_RDATA_1 799
+MX53_PAD_FEC_RXD1__GPIO1_26 800
+MX53_PAD_FEC_RXD1__ESAI1_FST 801
+MX53_PAD_FEC_RXD1__MLB_MLBSIG 802
+MX53_PAD_FEC_RXD1__RTC_CE_RTC_PS1 803
+MX53_PAD_FEC_RXD0__FEC_RDATA_0 804
+MX53_PAD_FEC_RXD0__GPIO1_27 805
+MX53_PAD_FEC_RXD0__ESAI1_HCKT 806
+MX53_PAD_FEC_RXD0__OSC32k_32K_OUT 807
+MX53_PAD_FEC_TX_EN__FEC_TX_EN 808
+MX53_PAD_FEC_TX_EN__GPIO1_28 809
+MX53_PAD_FEC_TX_EN__ESAI1_TX3_RX2 810
+MX53_PAD_FEC_TXD1__FEC_TDATA_1 811
+MX53_PAD_FEC_TXD1__GPIO1_29 812
+MX53_PAD_FEC_TXD1__ESAI1_TX2_RX3 813
+MX53_PAD_FEC_TXD1__MLB_MLBCLK 814
+MX53_PAD_FEC_TXD1__RTC_CE_RTC_PRSC_CLK 815
+MX53_PAD_FEC_TXD0__FEC_TDATA_0 816
+MX53_PAD_FEC_TXD0__GPIO1_30 817
+MX53_PAD_FEC_TXD0__ESAI1_TX4_RX1 818
+MX53_PAD_FEC_TXD0__USBPHY2_DATAOUT_0 819
+MX53_PAD_FEC_MDC__FEC_MDC 820
+MX53_PAD_FEC_MDC__GPIO1_31 821
+MX53_PAD_FEC_MDC__ESAI1_TX5_RX0 822
+MX53_PAD_FEC_MDC__MLB_MLBDAT 823
+MX53_PAD_FEC_MDC__RTC_CE_RTC_ALARM1_TRIG 824
+MX53_PAD_FEC_MDC__USBPHY2_DATAOUT_1 825
+MX53_PAD_PATA_DIOW__PATA_DIOW 826
+MX53_PAD_PATA_DIOW__GPIO6_17 827
+MX53_PAD_PATA_DIOW__UART1_TXD_MUX 828
+MX53_PAD_PATA_DIOW__USBPHY2_DATAOUT_2 829
+MX53_PAD_PATA_DMACK__PATA_DMACK 830
+MX53_PAD_PATA_DMACK__GPIO6_18 831
+MX53_PAD_PATA_DMACK__UART1_RXD_MUX 832
+MX53_PAD_PATA_DMACK__USBPHY2_DATAOUT_3 833
+MX53_PAD_PATA_DMARQ__PATA_DMARQ 834
+MX53_PAD_PATA_DMARQ__GPIO7_0 835
+MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 836
+MX53_PAD_PATA_DMARQ__CCM_CCM_OUT_0 837
+MX53_PAD_PATA_DMARQ__USBPHY2_DATAOUT_4 838
+MX53_PAD_PATA_BUFFER_EN__PATA_BUFFER_EN 839
+MX53_PAD_PATA_BUFFER_EN__GPIO7_1 840
+MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 841
+MX53_PAD_PATA_BUFFER_EN__CCM_CCM_OUT_1 842
+MX53_PAD_PATA_BUFFER_EN__USBPHY2_DATAOUT_5 843
+MX53_PAD_PATA_INTRQ__PATA_INTRQ 844
+MX53_PAD_PATA_INTRQ__GPIO7_2 845
+MX53_PAD_PATA_INTRQ__UART2_CTS 846
+MX53_PAD_PATA_INTRQ__CAN1_TXCAN 847
+MX53_PAD_PATA_INTRQ__CCM_CCM_OUT_2 848
+MX53_PAD_PATA_INTRQ__USBPHY2_DATAOUT_6 849
+MX53_PAD_PATA_DIOR__PATA_DIOR 850
+MX53_PAD_PATA_DIOR__GPIO7_3 851
+MX53_PAD_PATA_DIOR__UART2_RTS 852
+MX53_PAD_PATA_DIOR__CAN1_RXCAN 853
+MX53_PAD_PATA_DIOR__USBPHY2_DATAOUT_7 854
+MX53_PAD_PATA_RESET_B__PATA_PATA_RESET_B 855
+MX53_PAD_PATA_RESET_B__GPIO7_4 856
+MX53_PAD_PATA_RESET_B__ESDHC3_CMD 857
+MX53_PAD_PATA_RESET_B__UART1_CTS 858
+MX53_PAD_PATA_RESET_B__CAN2_TXCAN 859
+MX53_PAD_PATA_RESET_B__USBPHY1_DATAOUT_0 860
+MX53_PAD_PATA_IORDY__PATA_IORDY 861
+MX53_PAD_PATA_IORDY__GPIO7_5 862
+MX53_PAD_PATA_IORDY__ESDHC3_CLK 863
+MX53_PAD_PATA_IORDY__UART1_RTS 864
+MX53_PAD_PATA_IORDY__CAN2_RXCAN 865
+MX53_PAD_PATA_IORDY__USBPHY1_DATAOUT_1 866
+MX53_PAD_PATA_DA_0__PATA_DA_0 867
+MX53_PAD_PATA_DA_0__GPIO7_6 868
+MX53_PAD_PATA_DA_0__ESDHC3_RST 869
+MX53_PAD_PATA_DA_0__OWIRE_LINE 870
+MX53_PAD_PATA_DA_0__USBPHY1_DATAOUT_2 871
+MX53_PAD_PATA_DA_1__PATA_DA_1 872
+MX53_PAD_PATA_DA_1__GPIO7_7 873
+MX53_PAD_PATA_DA_1__ESDHC4_CMD 874
+MX53_PAD_PATA_DA_1__UART3_CTS 875
+MX53_PAD_PATA_DA_1__USBPHY1_DATAOUT_3 876
+MX53_PAD_PATA_DA_2__PATA_DA_2 877
+MX53_PAD_PATA_DA_2__GPIO7_8 878
+MX53_PAD_PATA_DA_2__ESDHC4_CLK 879
+MX53_PAD_PATA_DA_2__UART3_RTS 880
+MX53_PAD_PATA_DA_2__USBPHY1_DATAOUT_4 881
+MX53_PAD_PATA_CS_0__PATA_CS_0 882
+MX53_PAD_PATA_CS_0__GPIO7_9 883
+MX53_PAD_PATA_CS_0__UART3_TXD_MUX 884
+MX53_PAD_PATA_CS_0__USBPHY1_DATAOUT_5 885
+MX53_PAD_PATA_CS_1__PATA_CS_1 886
+MX53_PAD_PATA_CS_1__GPIO7_10 887
+MX53_PAD_PATA_CS_1__UART3_RXD_MUX 888
+MX53_PAD_PATA_CS_1__USBPHY1_DATAOUT_6 889
+MX53_PAD_PATA_DATA0__PATA_DATA_0 890
+MX53_PAD_PATA_DATA0__GPIO2_0 891
+MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 892
+MX53_PAD_PATA_DATA0__ESDHC3_DAT4 893
+MX53_PAD_PATA_DATA0__GPU3d_GPU_DEBUG_OUT_0 894
+MX53_PAD_PATA_DATA0__IPU_DIAG_BUS_0 895
+MX53_PAD_PATA_DATA0__USBPHY1_DATAOUT_7 896
+MX53_PAD_PATA_DATA1__PATA_DATA_1 897
+MX53_PAD_PATA_DATA1__GPIO2_1 898
+MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 899
+MX53_PAD_PATA_DATA1__ESDHC3_DAT5 900
+MX53_PAD_PATA_DATA1__GPU3d_GPU_DEBUG_OUT_1 901
+MX53_PAD_PATA_DATA1__IPU_DIAG_BUS_1 902
+MX53_PAD_PATA_DATA2__PATA_DATA_2 903
+MX53_PAD_PATA_DATA2__GPIO2_2 904
+MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 905
+MX53_PAD_PATA_DATA2__ESDHC3_DAT6 906
+MX53_PAD_PATA_DATA2__GPU3d_GPU_DEBUG_OUT_2 907
+MX53_PAD_PATA_DATA2__IPU_DIAG_BUS_2 908
+MX53_PAD_PATA_DATA3__PATA_DATA_3 909
+MX53_PAD_PATA_DATA3__GPIO2_3 910
+MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 911
+MX53_PAD_PATA_DATA3__ESDHC3_DAT7 912
+MX53_PAD_PATA_DATA3__GPU3d_GPU_DEBUG_OUT_3 913
+MX53_PAD_PATA_DATA3__IPU_DIAG_BUS_3 914
+MX53_PAD_PATA_DATA4__PATA_DATA_4 915
+MX53_PAD_PATA_DATA4__GPIO2_4 916
+MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 917
+MX53_PAD_PATA_DATA4__ESDHC4_DAT4 918
+MX53_PAD_PATA_DATA4__GPU3d_GPU_DEBUG_OUT_4 919
+MX53_PAD_PATA_DATA4__IPU_DIAG_BUS_4 920
+MX53_PAD_PATA_DATA5__PATA_DATA_5 921
+MX53_PAD_PATA_DATA5__GPIO2_5 922
+MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 923
+MX53_PAD_PATA_DATA5__ESDHC4_DAT5 924
+MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 925
+MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 926
+MX53_PAD_PATA_DATA6__PATA_DATA_6 927
+MX53_PAD_PATA_DATA6__GPIO2_6 928
+MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 929
+MX53_PAD_PATA_DATA6__ESDHC4_DAT6 930
+MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 931
+MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 932
+MX53_PAD_PATA_DATA7__PATA_DATA_7 933
+MX53_PAD_PATA_DATA7__GPIO2_7 934
+MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 935
+MX53_PAD_PATA_DATA7__ESDHC4_DAT7 936
+MX53_PAD_PATA_DATA7__GPU3d_GPU_DEBUG_OUT_7 937
+MX53_PAD_PATA_DATA7__IPU_DIAG_BUS_7 938
+MX53_PAD_PATA_DATA8__PATA_DATA_8 939
+MX53_PAD_PATA_DATA8__GPIO2_8 940
+MX53_PAD_PATA_DATA8__ESDHC1_DAT4 941
+MX53_PAD_PATA_DATA8__EMI_NANDF_D_8 942
+MX53_PAD_PATA_DATA8__ESDHC3_DAT0 943
+MX53_PAD_PATA_DATA8__GPU3d_GPU_DEBUG_OUT_8 944
+MX53_PAD_PATA_DATA8__IPU_DIAG_BUS_8 945
+MX53_PAD_PATA_DATA9__PATA_DATA_9 946
+MX53_PAD_PATA_DATA9__GPIO2_9 947
+MX53_PAD_PATA_DATA9__ESDHC1_DAT5 948
+MX53_PAD_PATA_DATA9__EMI_NANDF_D_9 949
+MX53_PAD_PATA_DATA9__ESDHC3_DAT1 950
+MX53_PAD_PATA_DATA9__GPU3d_GPU_DEBUG_OUT_9 951
+MX53_PAD_PATA_DATA9__IPU_DIAG_BUS_9 952
+MX53_PAD_PATA_DATA10__PATA_DATA_10 953
+MX53_PAD_PATA_DATA10__GPIO2_10 954
+MX53_PAD_PATA_DATA10__ESDHC1_DAT6 955
+MX53_PAD_PATA_DATA10__EMI_NANDF_D_10 956
+MX53_PAD_PATA_DATA10__ESDHC3_DAT2 957
+MX53_PAD_PATA_DATA10__GPU3d_GPU_DEBUG_OUT_10 958
+MX53_PAD_PATA_DATA10__IPU_DIAG_BUS_10 959
+MX53_PAD_PATA_DATA11__PATA_DATA_11 960
+MX53_PAD_PATA_DATA11__GPIO2_11 961
+MX53_PAD_PATA_DATA11__ESDHC1_DAT7 962
+MX53_PAD_PATA_DATA11__EMI_NANDF_D_11 963
+MX53_PAD_PATA_DATA11__ESDHC3_DAT3 964
+MX53_PAD_PATA_DATA11__GPU3d_GPU_DEBUG_OUT_11 965
+MX53_PAD_PATA_DATA11__IPU_DIAG_BUS_11 966
+MX53_PAD_PATA_DATA12__PATA_DATA_12 967
+MX53_PAD_PATA_DATA12__GPIO2_12 968
+MX53_PAD_PATA_DATA12__ESDHC2_DAT4 969
+MX53_PAD_PATA_DATA12__EMI_NANDF_D_12 970
+MX53_PAD_PATA_DATA12__ESDHC4_DAT0 971
+MX53_PAD_PATA_DATA12__GPU3d_GPU_DEBUG_OUT_12 972
+MX53_PAD_PATA_DATA12__IPU_DIAG_BUS_12 973
+MX53_PAD_PATA_DATA13__PATA_DATA_13 974
+MX53_PAD_PATA_DATA13__GPIO2_13 975
+MX53_PAD_PATA_DATA13__ESDHC2_DAT5 976
+MX53_PAD_PATA_DATA13__EMI_NANDF_D_13 977
+MX53_PAD_PATA_DATA13__ESDHC4_DAT1 978
+MX53_PAD_PATA_DATA13__GPU3d_GPU_DEBUG_OUT_13 979
+MX53_PAD_PATA_DATA13__IPU_DIAG_BUS_13 980
+MX53_PAD_PATA_DATA14__PATA_DATA_14 981
+MX53_PAD_PATA_DATA14__GPIO2_14 982
+MX53_PAD_PATA_DATA14__ESDHC2_DAT6 983
+MX53_PAD_PATA_DATA14__EMI_NANDF_D_14 984
+MX53_PAD_PATA_DATA14__ESDHC4_DAT2 985
+MX53_PAD_PATA_DATA14__GPU3d_GPU_DEBUG_OUT_14 986
+MX53_PAD_PATA_DATA14__IPU_DIAG_BUS_14 987
+MX53_PAD_PATA_DATA15__PATA_DATA_15 988
+MX53_PAD_PATA_DATA15__GPIO2_15 989
+MX53_PAD_PATA_DATA15__ESDHC2_DAT7 990
+MX53_PAD_PATA_DATA15__EMI_NANDF_D_15 991
+MX53_PAD_PATA_DATA15__ESDHC4_DAT3 992
+MX53_PAD_PATA_DATA15__GPU3d_GPU_DEBUG_OUT_15 993
+MX53_PAD_PATA_DATA15__IPU_DIAG_BUS_15 994
+MX53_PAD_SD1_DATA0__ESDHC1_DAT0 995
+MX53_PAD_SD1_DATA0__GPIO1_16 996
+MX53_PAD_SD1_DATA0__GPT_CAPIN1 997
+MX53_PAD_SD1_DATA0__CSPI_MISO 998
+MX53_PAD_SD1_DATA0__CCM_PLL3_BYP 999
+MX53_PAD_SD1_DATA1__ESDHC1_DAT1 1000
+MX53_PAD_SD1_DATA1__GPIO1_17 1001
+MX53_PAD_SD1_DATA1__GPT_CAPIN2 1002
+MX53_PAD_SD1_DATA1__CSPI_SS0 1003
+MX53_PAD_SD1_DATA1__CCM_PLL4_BYP 1004
+MX53_PAD_SD1_CMD__ESDHC1_CMD 1005
+MX53_PAD_SD1_CMD__GPIO1_18 1006
+MX53_PAD_SD1_CMD__GPT_CMPOUT1 1007
+MX53_PAD_SD1_CMD__CSPI_MOSI 1008
+MX53_PAD_SD1_CMD__CCM_PLL1_BYP 1009
+MX53_PAD_SD1_DATA2__ESDHC1_DAT2 1010
+MX53_PAD_SD1_DATA2__GPIO1_19 1011
+MX53_PAD_SD1_DATA2__GPT_CMPOUT2 1012
+MX53_PAD_SD1_DATA2__PWM2_PWMO 1013
+MX53_PAD_SD1_DATA2__WDOG1_WDOG_B 1014
+MX53_PAD_SD1_DATA2__CSPI_SS1 1015
+MX53_PAD_SD1_DATA2__WDOG1_WDOG_RST_B_DEB 1016
+MX53_PAD_SD1_DATA2__CCM_PLL2_BYP 1017
+MX53_PAD_SD1_CLK__ESDHC1_CLK 1018
+MX53_PAD_SD1_CLK__GPIO1_20 1019
+MX53_PAD_SD1_CLK__OSC32k_32K_OUT 1020
+MX53_PAD_SD1_CLK__GPT_CLKIN 1021
+MX53_PAD_SD1_CLK__CSPI_SCLK 1022
+MX53_PAD_SD1_CLK__SATA_PHY_DTB_0 1023
+MX53_PAD_SD1_DATA3__ESDHC1_DAT3 1024
+MX53_PAD_SD1_DATA3__GPIO1_21 1025
+MX53_PAD_SD1_DATA3__GPT_CMPOUT3 1026
+MX53_PAD_SD1_DATA3__PWM1_PWMO 1027
+MX53_PAD_SD1_DATA3__WDOG2_WDOG_B 1028
+MX53_PAD_SD1_DATA3__CSPI_SS2 1029
+MX53_PAD_SD1_DATA3__WDOG2_WDOG_RST_B_DEB 1030
+MX53_PAD_SD1_DATA3__SATA_PHY_DTB_1 1031
+MX53_PAD_SD2_CLK__ESDHC2_CLK 1032
+MX53_PAD_SD2_CLK__GPIO1_10 1033
+MX53_PAD_SD2_CLK__KPP_COL_5 1034
+MX53_PAD_SD2_CLK__AUDMUX_AUD4_RXFS 1035
+MX53_PAD_SD2_CLK__CSPI_SCLK 1036
+MX53_PAD_SD2_CLK__SCC_RANDOM_V 1037
+MX53_PAD_SD2_CMD__ESDHC2_CMD 1038
+MX53_PAD_SD2_CMD__GPIO1_11 1039
+MX53_PAD_SD2_CMD__KPP_ROW_5 1040