diff options
Diffstat (limited to '')
-rw-r--r-- | arch/arm/boot/dts/at91sam9260.dtsi | 48 |
1 files changed, 17 insertions, 31 deletions
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index 6afbb48e7ff0..789fe356dbf6 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/at91.h> +#include <dt-bindings/mfd/at91-usart.h> / { #address-cells = <1>; @@ -36,16 +37,17 @@ ssc0 = &ssc0; }; cpus { - #address-cells = <0>; + #address-cells = <1>; #size-cells = <0>; - cpu { + cpu@0 { compatible = "arm,arm926ej-s"; device_type = "cpu"; + reg = <0>; }; }; - memory { + memory@20000000 { device_type = "memory"; reg = <0x20000000 0x04000000>; }; @@ -73,6 +75,9 @@ sram0: sram@2ff000 { compatible = "mmio-sram"; reg = <0x002ff000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x002ff000 0x2000>; }; ahb { @@ -119,7 +124,7 @@ clock-names = "slow_xtal", "main_xtal"; }; - rstc@fffffd00 { + reset-controller@fffffd00 { compatible = "atmel,at91sam9260-rstc"; reg = <0xfffffd00 0x10>; clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>; @@ -162,7 +167,7 @@ clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; - pinctrl@fffff400 { + pinctrl: pinctrl@fffff400 { #address-cells = <1>; #size-cells = <1>; compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; @@ -528,6 +533,7 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; @@ -539,6 +545,7 @@ usart0: serial@fffb0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb0000 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; @@ -552,6 +559,7 @@ usart1: serial@fffb4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb4000 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; @@ -565,6 +573,7 @@ usart2: serial@fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; @@ -578,6 +587,7 @@ usart3: serial@fffd0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd0000 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; @@ -591,6 +601,7 @@ uart0: serial@fffd4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd4000 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; @@ -604,6 +615,7 @@ uart1: serial@fffd8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd8000 0x200>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; @@ -650,7 +662,6 @@ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; #address-cells = <1>; #size-cells = <0>; - pinctrl-names = "default"; clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "mci_clk"; status = "disabled"; @@ -694,8 +705,6 @@ }; adc0: adc@fffe0000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "atmel,at91sam9260-adc"; reg = <0xfffe0000 0x100>; interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>; @@ -705,29 +714,6 @@ atmel,adc-channels-used = <0xf>; atmel,adc-vref = <3300>; atmel,adc-startup-time = <15>; - atmel,adc-res = <8 10>; - atmel,adc-res-names = "lowres", "highres"; - atmel,adc-use-res = "highres"; - - trigger0 { - trigger-name = "timer-counter-0"; - trigger-value = <0x1>; - }; - trigger1 { - trigger-name = "timer-counter-1"; - trigger-value = <0x3>; - }; - - trigger2 { - trigger-name = "timer-counter-2"; - trigger-value = <0x5>; - }; - - trigger3 { - trigger-name = "external"; - trigger-value = <0xd>; - trigger-external; - }; }; rtc@fffffd20 { |