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-rw-r--r--arch/arm/boot/dts/hip04.dtsi16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index 4263a9339c2e..2424cc545c9c 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -1,8 +1,8 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Hisilicon Ltd. HiP04 SoC
+ * HiSilicon Ltd. HiP04 SoC
*
- * Copyright (C) 2013-2014 Hisilicon Ltd.
+ * Copyright (C) 2013-2014 HiSilicon Ltd.
* Copyright (C) 2013-2014 Linaro Ltd.
*
* Author: Haojian Zhuang <haojian.zhuang@linaro.org>
@@ -213,7 +213,7 @@
};
sysctrl: sysctrl {
- compatible = "hisilicon,sysctrl";
+ compatible = "hisilicon,sysctrl", "syscon";
reg = <0x3e00000 0x00100000>;
};
@@ -226,8 +226,8 @@
compatible = "arm,sp804", "arm,primecell";
reg = <0x3000000 0x1000>;
interrupts = <0 224 4>;
- clocks = <&clk_50m>, <&clk_50m>;
- clock-names = "apb_pclk";
+ clocks = <&clk_50m>, <&clk_50m>, <&clk_50m>;
+ clock-names = "timer0clk", "timer1clk", "apb_pclk";
};
arm-pmu {
@@ -250,12 +250,12 @@
<0 79 4>;
};
- uart0: uart@4007000 {
+ uart0: serial@4007000 {
compatible = "snps,dw-apb-uart";
reg = <0x4007000 0x1000>;
interrupts = <0 381 4>;
- clocks = <&clk_168m>;
- clock-names = "uartclk";
+ clocks = <&clk_168m>, <&clk_168m>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
status = "disabled";
};