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-rw-r--r--arch/arm/boot/dts/qcom-msm8960.dtsi126
1 files changed, 83 insertions, 43 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
index f2aeaccdc1ad..c5740da3754c 100644
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -3,6 +3,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/clock/qcom,lcc-msm8960.h>
#include <dt-bindings/mfd/qcom-rpm.h>
#include <dt-bindings/soc/qcom,gsbi.h>
@@ -56,14 +57,14 @@
};
clocks {
- cxo_board {
+ cxo_board: cxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
clock-output-names = "cxo_board";
};
- pxo_board {
+ pxo_board: pxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
@@ -78,6 +79,15 @@
};
};
+ /* Temporary fixed regulator */
+ vsdcc_fixed: vsdcc-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "SDCC Power";
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <2700000>;
+ regulator-always-on;
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -107,6 +117,7 @@
msmgpio: pinctrl@800000 {
compatible = "qcom,msm8960-pinctrl";
gpio-controller;
+ gpio-ranges = <&msmgpio 0 0 152>;
#gpio-cells = <2>;
interrupts = <0 16 0x4>;
interrupt-controller;
@@ -117,8 +128,13 @@
gcc: clock-controller@900000 {
compatible = "qcom,gcc-msm8960";
#clock-cells = <1>;
+ #power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
+ clocks = <&cxo_board>,
+ <&pxo_board>,
+ <&lcc PLL4>;
+ clock-names = "cxo", "pxo", "pll4";
};
lcc: clock-controller@28000000 {
@@ -126,27 +142,60 @@
reg = <0x28000000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
+ clocks = <&pxo_board>,
+ <&gcc PLL4_VOTE>,
+ <0>,
+ <0>, <0>,
+ <0>, <0>,
+ <0>;
+ clock-names = "pxo",
+ "pll4_vote",
+ "mi2s_codec_clk",
+ "codec_i2s_mic_codec_clk",
+ "spare_i2s_mic_codec_clk",
+ "codec_i2s_spkr_codec_clk",
+ "spare_i2s_spkr_codec_clk",
+ "pcm_codec_clk";
};
clock-controller@4000000 {
compatible = "qcom,mmcc-msm8960";
reg = <0x4000000 0x1000>;
#clock-cells = <1>;
+ #power-domain-cells = <1>;
#reset-cells = <1>;
+ clocks = <&pxo_board>,
+ <&gcc PLL3>,
+ <&gcc PLL8_VOTE>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>;
+ clock-names = "pxo",
+ "pll3",
+ "pll8_vote",
+ "dsi1pll",
+ "dsi1pllbyte",
+ "dsi2pll",
+ "dsi2pllbyte",
+ "hdmipll";
};
l2cc: clock-controller@2011000 {
- compatible = "syscon";
- reg = <0x2011000 0x1000>;
+ compatible = "qcom,kpss-gcc", "syscon";
+ reg = <0x2011000 0x1000>;
};
- rpm@108000 {
- compatible = "qcom,rpm-msm8960";
- reg = <0x108000 0x1000>;
- qcom,ipc = <&l2cc 0x8 2>;
+ rpm: rpm@108000 {
+ compatible = "qcom,rpm-msm8960";
+ reg = <0x108000 0x1000>;
+ qcom,ipc = <&l2cc 0x8 2>;
- interrupts = <0 19 0>, <0 21 0>, <0 22 0>;
- interrupt-names = "ack", "err", "wakeup";
+ interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ack", "err", "wakeup";
regulators {
compatible = "qcom,rpm-pm8921-regulators";
@@ -191,7 +240,7 @@
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16440000 0x1000>,
<0x16400000 0x1000>;
- interrupts = <0 154 0x0>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -248,50 +297,41 @@
clock-names = "core";
};
- /* Temporary fixed regulator */
- vsdcc_fixed: vsdcc-regulator {
- compatible = "regulator-fixed";
- regulator-name = "SDCC Power";
- regulator-min-microvolt = <2700000>;
- regulator-max-microvolt = <2700000>;
- regulator-always-on;
- };
-
amba {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sdcc1: sdcc@12400000 {
- status = "disabled";
- compatible = "arm,pl18x", "arm,primecell";
+ sdcc1: mmc@12400000 {
+ status = "disabled";
+ compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
- reg = <0x12400000 0x8000>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "cmd_irq";
- clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
- clock-names = "mclk", "apb_pclk";
- bus-width = <8>;
- max-frequency = <96000000>;
+ reg = <0x12400000 0x8000>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
+ clock-names = "mclk", "apb_pclk";
+ bus-width = <8>;
+ max-frequency = <96000000>;
non-removable;
cap-sd-highspeed;
cap-mmc-highspeed;
vmmc-supply = <&vsdcc_fixed>;
};
- sdcc3: sdcc@12180000 {
- compatible = "arm,pl18x", "arm,primecell";
+ sdcc3: mmc@12180000 {
+ compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
- status = "disabled";
- reg = <0x12180000 0x8000>;
- interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "cmd_irq";
- clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
- clock-names = "mclk", "apb_pclk";
- bus-width = <4>;
+ status = "disabled";
+ reg = <0x12180000 0x8000>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
+ clock-names = "mclk", "apb_pclk";
+ bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
- max-frequency = <192000000>;
+ max-frequency = <192000000>;
no-1-8-v;
vmmc-supply = <&vsdcc_fixed>;
};
@@ -302,7 +342,7 @@
reg = <0x1a400000 0x100>;
};
- gsbi@16000000 {
+ gsbi1: gsbi@16000000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <1>;
reg = <0x16000000 0x100>;
@@ -312,12 +352,12 @@
#size-cells = <1>;
ranges;
- spi@16080000 {
+ gsbi1_spi: spi@16080000 {
compatible = "qcom,spi-qup-v1.1.1";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x16080000 0x1000>;
- interrupts = <0 147 0>;
+ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <24000000>;
cs-gpios = <&msmgpio 8 0>;
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