diff options
Diffstat (limited to 'arch/arm/boot/dts/stm32mp13-pinctrl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 136 |
1 files changed, 126 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi index 069f95f2b628..efdd163eba30 100644 --- a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi @@ -6,8 +6,42 @@ #include <dt-bindings/pinctrl/stm32-pinfunc.h> &pinctrl { + i2c1_pins_a: i2c1-0 { + pins { + pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ + <STM32_PINMUX('E', 8, AF5)>; /* I2C1_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c1_sleep_pins_a: i2c1-sleep-0 { + pins { + pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ + <STM32_PINMUX('E', 8, ANALOG)>; /* I2C1_SDA */ + }; + }; + + i2c5_pins_a: i2c5-0 { + pins { + pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */ + <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c5_sleep_pins_a: i2c5-sleep-0 { + pins { + pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */ + <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */ + }; + }; + sdmmc1_b4_pins_a: sdmmc1-b4-0 { - pins1 { + pins { pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ @@ -17,12 +51,6 @@ drive-push-pull; bias-disable; }; - pins2 { - pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ - slew-rate = <2>; - drive-push-pull; - bias-disable; - }; }; sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { @@ -36,16 +64,104 @@ bias-disable; }; pins2 { + pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ + <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ + }; + }; + + sdmmc1_clk_pins_a: sdmmc1-clk-0 { + pins { pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ - slew-rate = <2>; + slew-rate = <1>; drive-push-pull; bias-disable; }; - pins3 { - pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ + }; + + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins { + pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ + <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ + <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ + <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */ + <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ + <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ + <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ + <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ slew-rate = <1>; drive-open-drain; + bias-pull-up; + }; + }; + + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ + <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */ + <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ + <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ + <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ + <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ + }; + }; + + sdmmc2_clk_pins_a: sdmmc2-clk-0 { + pins { + pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + spi5_pins_a: spi5-0 { + pins1 { + pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */ + <STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */ bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */ + bias-disable; + }; + }; + + spi5_sleep_pins_a: spi5-sleep-0 { + pins { + pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */ + <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */ + <STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */ }; }; |