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-rw-r--r--arch/arm/boot/dts/aspeed-g5.dtsi7
-rw-r--r--arch/arm/boot/dts/imx7d.dtsi9
-rw-r--r--arch/arm/boot/dts/qcom-apq8060-dragonboard.dts21
-rw-r--r--arch/arm/boot/dts/qcom-apq8064.dtsi46
-rw-r--r--arch/arm/boot/dts/qcom-mdm9615.dtsi9
-rw-r--r--arch/arm/boot/dts/qcom-msm8660.dtsi47
-rw-r--r--arch/arm/boot/dts/qcom-pm8941.dtsi38
-rw-r--r--arch/arm/boot/dts/qcom-pma8084.dtsi24
-rw-r--r--arch/arm/boot/dts/stm32h743-pinctrl.dtsi15
-rw-r--r--arch/arm/boot/dts/stm32h743.dtsi13
-rw-r--r--arch/arm/boot/dts/stm32h743i-disco.dts17
-rw-r--r--arch/arm/boot/dts/stm32h743i-eval.dts17
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi15
13 files changed, 102 insertions, 176 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 3e4ed081505c..85ed9dbec196 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -47,6 +47,13 @@
reg = <0x80000000 0>;
};
+ edac: sdram@1e6e0000 {
+ compatible = "aspeed,ast2500-sdram-edac";
+ reg = <0x1e6e0000 0x174>;
+ interrupts = <0>;
+ status = "disabled";
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 6b298e388f4b..6eb98e7c568d 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -96,6 +96,14 @@
};
};
+&aips2 {
+ pcie_phy: pcie-phy@306d0000 {
+ compatible = "fsl,imx7d-pcie-phy";
+ reg = <0x306d0000 0x10000>;
+ status = "disabled";
+ };
+};
+
&aips3 {
usbotg2: usb@30b20000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
@@ -173,6 +181,7 @@
<&src IMX7_RESET_PCIE_CTRL_APPS_EN>,
<&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>;
reset-names = "pciephy", "apps", "turnoff";
+ fsl,imx7d-pcie-phy = <&pcie_phy>;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
index 497bb065eb9d..4e6c50d45cb2 100644
--- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
@@ -93,9 +93,8 @@
vdd-supply = <&pm8058_l14>; // 2.85V
aset-gpios = <&pm8058_gpio 35 GPIO_ACTIVE_LOW>;
capella,aset-resistance-ohms = <100000>;
- /* GPIO34 has interrupt 225 on the PM8058 */
/* Trig on both edges - getting close or far away */
- interrupts-extended = <&pm8058 225 IRQ_TYPE_EDGE_BOTH>;
+ interrupts-extended = <&pm8058_gpio 34 IRQ_TYPE_EDGE_BOTH>;
/* MPP05 analog input to the XOADC */
io-channels = <&xoadc 0x00 0x05>;
io-channel-names = "aout";
@@ -515,9 +514,8 @@
ak8975@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
- /* FIXME: GPIO33 has interrupt 224 on the PM8058 */
- interrupt-parent = <&pm8058>;
- interrupts = <224 IRQ_TYPE_EDGE_RISING>;
+ interrupt-parent = <&pm8058_gpio>;
+ interrupts = <33 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&dragon_ak8975_gpios>;
vid-supply = <&pm8058_lvs0>; // 1.8V
@@ -526,9 +524,8 @@
bmp085@77 {
compatible = "bosch,bmp085";
reg = <0x77>;
- /* FIXME: GPIO16 has interrupt 207 on the PM8058 */
- interrupt-parent = <&pm8058>;
- interrupts = <207 IRQ_TYPE_EDGE_RISING>;
+ interrupt-parent = <&pm8058_gpio>;
+ interrupts = <16 IRQ_TYPE_EDGE_RISING>;
reset-gpios = <&tlmm 86 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&dragon_bmp085_gpios>;
@@ -539,12 +536,11 @@
compatible = "invensense,mpu3050";
reg = <0x68>;
/*
- * GPIO17 has interrupt 208 on the
- * PM8058, it is pulled high by a 10k
+ * GPIO17 is pulled high by a 10k
* resistor to VLOGIC so needs to be
* active low/falling edge.
*/
- interrupts-extended = <&pm8058 208 IRQ_TYPE_EDGE_FALLING>;
+ interrupts-extended = <&pm8058_gpio 17 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&dragon_mpu3050_gpios>;
vlogic-supply = <&pm8058_lvs0>; // 1.8V
@@ -589,11 +585,10 @@
compatible = "smsc,lan9221", "smsc,lan9115";
reg = <2 0x0 0x100>;
/*
- * GPIO7 has interrupt 198 on the PM8058
* The second interrupt is the PME interrupt
* for network wakeup, connected to the TLMM.
*/
- interrupts-extended = <&pm8058 198 IRQ_TYPE_EDGE_FALLING>,
+ interrupts-extended = <&pm8058_gpio 7 IRQ_TYPE_EDGE_FALLING>,
<&tlmm 29 IRQ_TYPE_EDGE_RISING>;
reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
vdd33a-supply = <&dragon_veth>;
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 1374c2e52c20..bd6907db615b 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -711,50 +711,8 @@
compatible = "qcom,pm8921-gpio",
"qcom,ssbi-gpio";
reg = <0x150>;
- interrupts = <192 IRQ_TYPE_NONE>,
- <193 IRQ_TYPE_NONE>,
- <194 IRQ_TYPE_NONE>,
- <195 IRQ_TYPE_NONE>,
- <196 IRQ_TYPE_NONE>,
- <197 IRQ_TYPE_NONE>,
- <198 IRQ_TYPE_NONE>,
- <199 IRQ_TYPE_NONE>,
- <200 IRQ_TYPE_NONE>,
- <201 IRQ_TYPE_NONE>,
- <202 IRQ_TYPE_NONE>,
- <203 IRQ_TYPE_NONE>,
- <204 IRQ_TYPE_NONE>,
- <205 IRQ_TYPE_NONE>,
- <206 IRQ_TYPE_NONE>,
- <207 IRQ_TYPE_NONE>,
- <208 IRQ_TYPE_NONE>,
- <209 IRQ_TYPE_NONE>,
- <210 IRQ_TYPE_NONE>,
- <211 IRQ_TYPE_NONE>,
- <212 IRQ_TYPE_NONE>,
- <213 IRQ_TYPE_NONE>,
- <214 IRQ_TYPE_NONE>,
- <215 IRQ_TYPE_NONE>,
- <216 IRQ_TYPE_NONE>,
- <217 IRQ_TYPE_NONE>,
- <218 IRQ_TYPE_NONE>,
- <219 IRQ_TYPE_NONE>,
- <220 IRQ_TYPE_NONE>,
- <221 IRQ_TYPE_NONE>,
- <222 IRQ_TYPE_NONE>,
- <223 IRQ_TYPE_NONE>,
- <224 IRQ_TYPE_NONE>,
- <225 IRQ_TYPE_NONE>,
- <226 IRQ_TYPE_NONE>,
- <227 IRQ_TYPE_NONE>,
- <228 IRQ_TYPE_NONE>,
- <229 IRQ_TYPE_NONE>,
- <230 IRQ_TYPE_NONE>,
- <231 IRQ_TYPE_NONE>,
- <232 IRQ_TYPE_NONE>,
- <233 IRQ_TYPE_NONE>,
- <234 IRQ_TYPE_NONE>,
- <235 IRQ_TYPE_NONE>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi
index e49f67ad5dbc..02afc6a42005 100644
--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
@@ -323,13 +323,8 @@
pmicgpio: gpio@150 {
compatible = "qcom,pm8018-gpio", "qcom,ssbi-gpio";
- interrupt-parent = <&pmicintc>;
- interrupts = <24 IRQ_TYPE_NONE>,
- <25 IRQ_TYPE_NONE>,
- <26 IRQ_TYPE_NONE>,
- <27 IRQ_TYPE_NONE>,
- <28 IRQ_TYPE_NONE>,
- <29 IRQ_TYPE_NONE>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
};
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 993107ed1476..65a994f0e09b 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -292,51 +292,8 @@
compatible = "qcom,pm8058-gpio",
"qcom,ssbi-gpio";
reg = <0x150>;
- interrupt-parent = <&pm8058>;
- interrupts = <192 IRQ_TYPE_NONE>,
- <193 IRQ_TYPE_NONE>,
- <194 IRQ_TYPE_NONE>,
- <195 IRQ_TYPE_NONE>,
- <196 IRQ_TYPE_NONE>,
- <197 IRQ_TYPE_NONE>,
- <198 IRQ_TYPE_NONE>,
- <199 IRQ_TYPE_NONE>,
- <200 IRQ_TYPE_NONE>,
- <201 IRQ_TYPE_NONE>,
- <202 IRQ_TYPE_NONE>,
- <203 IRQ_TYPE_NONE>,
- <204 IRQ_TYPE_NONE>,
- <205 IRQ_TYPE_NONE>,
- <206 IRQ_TYPE_NONE>,
- <207 IRQ_TYPE_NONE>,
- <208 IRQ_TYPE_NONE>,
- <209 IRQ_TYPE_NONE>,
- <210 IRQ_TYPE_NONE>,
- <211 IRQ_TYPE_NONE>,
- <212 IRQ_TYPE_NONE>,
- <213 IRQ_TYPE_NONE>,
- <214 IRQ_TYPE_NONE>,
- <215 IRQ_TYPE_NONE>,
- <216 IRQ_TYPE_NONE>,
- <217 IRQ_TYPE_NONE>,
- <218 IRQ_TYPE_NONE>,
- <219 IRQ_TYPE_NONE>,
- <220 IRQ_TYPE_NONE>,
- <221 IRQ_TYPE_NONE>,
- <222 IRQ_TYPE_NONE>,
- <223 IRQ_TYPE_NONE>,
- <224 IRQ_TYPE_NONE>,
- <225 IRQ_TYPE_NONE>,
- <226 IRQ_TYPE_NONE>,
- <227 IRQ_TYPE_NONE>,
- <228 IRQ_TYPE_NONE>,
- <229 IRQ_TYPE_NONE>,
- <230 IRQ_TYPE_NONE>,
- <231 IRQ_TYPE_NONE>,
- <232 IRQ_TYPE_NONE>,
- <233 IRQ_TYPE_NONE>,
- <234 IRQ_TYPE_NONE>,
- <235 IRQ_TYPE_NONE>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi
index 9a91b758f7aa..f198480c8ef4 100644
--- a/arch/arm/boot/dts/qcom-pm8941.dtsi
+++ b/arch/arm/boot/dts/qcom-pm8941.dtsi
@@ -65,42 +65,8 @@
gpio-controller;
gpio-ranges = <&pm8941_gpios 0 0 36>;
#gpio-cells = <2>;
- interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
- <0 0xc1 0 IRQ_TYPE_NONE>,
- <0 0xc2 0 IRQ_TYPE_NONE>,
- <0 0xc3 0 IRQ_TYPE_NONE>,
- <0 0xc4 0 IRQ_TYPE_NONE>,
- <0 0xc5 0 IRQ_TYPE_NONE>,
- <0 0xc6 0 IRQ_TYPE_NONE>,
- <0 0xc7 0 IRQ_TYPE_NONE>,
- <0 0xc8 0 IRQ_TYPE_NONE>,
- <0 0xc9 0 IRQ_TYPE_NONE>,
- <0 0xca 0 IRQ_TYPE_NONE>,
- <0 0xcb 0 IRQ_TYPE_NONE>,
- <0 0xcc 0 IRQ_TYPE_NONE>,
- <0 0xcd 0 IRQ_TYPE_NONE>,
- <0 0xce 0 IRQ_TYPE_NONE>,
- <0 0xcf 0 IRQ_TYPE_NONE>,
- <0 0xd0 0 IRQ_TYPE_NONE>,
- <0 0xd1 0 IRQ_TYPE_NONE>,
- <0 0xd2 0 IRQ_TYPE_NONE>,
- <0 0xd3 0 IRQ_TYPE_NONE>,
- <0 0xd4 0 IRQ_TYPE_NONE>,
- <0 0xd5 0 IRQ_TYPE_NONE>,
- <0 0xd6 0 IRQ_TYPE_NONE>,
- <0 0xd7 0 IRQ_TYPE_NONE>,
- <0 0xd8 0 IRQ_TYPE_NONE>,
- <0 0xd9 0 IRQ_TYPE_NONE>,
- <0 0xda 0 IRQ_TYPE_NONE>,
- <0 0xdb 0 IRQ_TYPE_NONE>,
- <0 0xdc 0 IRQ_TYPE_NONE>,
- <0 0xdd 0 IRQ_TYPE_NONE>,
- <0 0xde 0 IRQ_TYPE_NONE>,
- <0 0xdf 0 IRQ_TYPE_NONE>,
- <0 0xe0 0 IRQ_TYPE_NONE>,
- <0 0xe1 0 IRQ_TYPE_NONE>,
- <0 0xe2 0 IRQ_TYPE_NONE>,
- <0 0xe3 0 IRQ_TYPE_NONE>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
boost_bypass_n_pin: boost-bypass {
pins = "gpio21";
diff --git a/arch/arm/boot/dts/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom-pma8084.dtsi
index aac7e73b6872..8f5ea7add20f 100644
--- a/arch/arm/boot/dts/qcom-pma8084.dtsi
+++ b/arch/arm/boot/dts/qcom-pma8084.dtsi
@@ -32,28 +32,8 @@
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
- <0 0xc1 0 IRQ_TYPE_NONE>,
- <0 0xc2 0 IRQ_TYPE_NONE>,
- <0 0xc3 0 IRQ_TYPE_NONE>,
- <0 0xc4 0 IRQ_TYPE_NONE>,
- <0 0xc5 0 IRQ_TYPE_NONE>,
- <0 0xc6 0 IRQ_TYPE_NONE>,
- <0 0xc7 0 IRQ_TYPE_NONE>,
- <0 0xc8 0 IRQ_TYPE_NONE>,
- <0 0xc9 0 IRQ_TYPE_NONE>,
- <0 0xca 0 IRQ_TYPE_NONE>,
- <0 0xcb 0 IRQ_TYPE_NONE>,
- <0 0xcc 0 IRQ_TYPE_NONE>,
- <0 0xcd 0 IRQ_TYPE_NONE>,
- <0 0xce 0 IRQ_TYPE_NONE>,
- <0 0xcf 0 IRQ_TYPE_NONE>,
- <0 0xd0 0 IRQ_TYPE_NONE>,
- <0 0xd1 0 IRQ_TYPE_NONE>,
- <0 0xd2 0 IRQ_TYPE_NONE>,
- <0 0xd3 0 IRQ_TYPE_NONE>,
- <0 0xd4 0 IRQ_TYPE_NONE>,
- <0 0xd5 0 IRQ_TYPE_NONE>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
};
pma8084_mpps: mpps@a000 {
diff --git a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
index 24be8e63dec8..980b2769caf9 100644
--- a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
@@ -173,6 +173,21 @@
};
};
+ ethernet_rmii: rmii@0 {
+ pins {
+ pinmux = <STM32_PINMUX('G', 11, AF11)>,
+ <STM32_PINMUX('G', 13, AF11)>,
+ <STM32_PINMUX('G', 12, AF11)>,
+ <STM32_PINMUX('C', 4, AF11)>,
+ <STM32_PINMUX('C', 5, AF11)>,
+ <STM32_PINMUX('A', 7, AF11)>,
+ <STM32_PINMUX('C', 1, AF11)>,
+ <STM32_PINMUX('A', 2, AF11)>,
+ <STM32_PINMUX('A', 1, AF11)>;
+ slew-rate = <2>;
+ };
+ };
+
usart1_pins: usart1@0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 299af0723790..5cac79ebebb1 100644
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -513,6 +513,19 @@
status = "disabled";
};
};
+
+ mac: ethernet@40028000 {
+ compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
+ reg = <0x40028000 0x8000>;
+ reg-names = "stmmaceth";
+ interrupts = <61>;
+ interrupt-names = "macirq";
+ clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
+ clocks = <&rcc ETH1MAC_CK>, <&rcc ETH1TX_CK>, <&rcc ETH1RX_CK>;
+ st,syscon = <&syscfg 0x4>;
+ snps,pbl = <8>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/boot/dts/stm32h743i-disco.dts b/arch/arm/boot/dts/stm32h743i-disco.dts
index f8040356fe2d..dd06c8f3d09a 100644
--- a/arch/arm/boot/dts/stm32h743i-disco.dts
+++ b/arch/arm/boot/dts/stm32h743i-disco.dts
@@ -67,6 +67,23 @@
clock-frequency = <25000000>;
};
+&mac {
+ status = "disabled";
+ pinctrl-0 = <&ethernet_rmii>;
+ pinctrl-names = "default";
+ phy-mode = "rmii";
+ phy-handle = <&phy0>;
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
+
&usart2 {
pinctrl-0 = <&usart2_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/stm32h743i-eval.dts b/arch/arm/boot/dts/stm32h743i-eval.dts
index ef34fa2f79ea..ebc3f0933f5c 100644
--- a/arch/arm/boot/dts/stm32h743i-eval.dts
+++ b/arch/arm/boot/dts/stm32h743i-eval.dts
@@ -105,6 +105,23 @@
status = "okay";
};
+&mac {
+ status = "disabled";
+ pinctrl-0 = <&ethernet_rmii>;
+ pinctrl-names = "default";
+ phy-mode = "rmii";
+ phy-handle = <&phy0>;
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
+
&usart1 {
pinctrl-0 = <&usart1_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index dcad6d6128cf..8c942e60703e 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -616,17 +616,14 @@
};
mc: memory-controller@7000f000 {
- compatible = "nvidia,tegra20-mc";
- reg = <0x7000f000 0x024
- 0x7000f03c 0x3c4>;
+ compatible = "nvidia,tegra20-mc-gart";
+ reg = <0x7000f000 0x400 /* controller registers */
+ 0x58000000 0x02000000>; /* GART aperture */
+ clocks = <&tegra_car TEGRA20_CLK_MC>;
+ clock-names = "mc";
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
- };
-
- iommu@7000f024 {
- compatible = "nvidia,tegra20-gart";
- reg = <0x7000f024 0x00000018 /* controller registers */
- 0x58000000 0x02000000>; /* GART aperture */
+ #iommu-cells = <0>;
};
memory-controller@7000f400 {
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.