diff options
Diffstat (limited to '')
26 files changed, 161 insertions, 203 deletions
diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S index e4a036f082c2..e3692a37cede 100644 --- a/arch/arm/include/debug/8250.S +++ b/arch/arm/include/debug/8250.S @@ -45,10 +45,11 @@ bne 1002b .endm - .macro waituart,rd,rx -#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL + .macro waituarttxrdy,rd,rx + .endm + + .macro waituartcts,rd,rx 1001: load \rd, [\rx, #UART_MSR << UART_SHIFT] tst \rd, #UART_MSR_CTS beq 1001b -#endif .endm diff --git a/arch/arm/include/debug/asm9260.S b/arch/arm/include/debug/asm9260.S index 0da1eb625331..5a0ce145c44a 100644 --- a/arch/arm/include/debug/asm9260.S +++ b/arch/arm/include/debug/asm9260.S @@ -11,7 +11,10 @@ ldr \rv, = CONFIG_DEBUG_UART_VIRT .endm - .macro waituart,rd,rx + .macro waituarttxrdy,rd,rx + .endm + + .macro waituartcts,rd,rx .endm .macro senduart,rd,rx diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S index 6c91cbaaa20b..17722824e2f2 100644 --- a/arch/arm/include/debug/at91.S +++ b/arch/arm/include/debug/at91.S @@ -19,12 +19,15 @@ strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register .endm - .macro waituart,rd,rx + .macro waituarttxrdy,rd,rx 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit beq 1001b .endm + .macro waituartcts,rd,rx + .endm + .macro busyuart,rd,rx 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete diff --git a/arch/arm/include/debug/bcm63xx.S b/arch/arm/include/debug/bcm63xx.S index 06a896227396..da65abb6738d 100644 --- a/arch/arm/include/debug/bcm63xx.S +++ b/arch/arm/include/debug/bcm63xx.S @@ -17,12 +17,15 @@ strb \rd, [\rx, #UART_FIFO_REG] .endm - .macro waituart, rd, rx + .macro waituarttxrdy, rd, rx 1001: ldr \rd, [\rx, #UART_IR_REG] tst \rd, #(1 << UART_IR_TXEMPTY) beq 1001b .endm + .macro waituartcts, rd, rx + .endm + .macro busyuart, rd, rx 1002: ldr \rd, [\rx, #UART_IR_REG] tst \rd, #(1 << UART_IR_TXTRESH) diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S index 132a20c4a676..f6175e6e28cd 100644 --- a/arch/arm/include/debug/brcmstb.S +++ b/arch/arm/include/debug/brcmstb.S @@ -1,15 +1,5 @@ -/* - * Copyright (C) 2016 Broadcom - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2016 Broadcom */ #include <linux/serial_reg.h> #include <asm/cputype.h> @@ -25,6 +15,7 @@ #define SUN_TOP_CTRL_BASE_V7 REG_PHYS_ADDR_V7(0x404000) #define UARTA_3390 REG_PHYS_ADDR(0x40a900) +#define UARTA_72116 UARTA_7255 #define UARTA_7250 REG_PHYS_ADDR(0x40b400) #define UARTA_7255 REG_PHYS_ADDR(0x40c000) #define UARTA_7260 UARTA_7255 @@ -32,6 +23,8 @@ #define UARTA_7271 UARTA_7268 #define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000) #define UARTA_7216 UARTA_7278 +#define UARTA_72164 UARTA_7278 +#define UARTA_72165 UARTA_7278 #define UARTA_7364 REG_PHYS_ADDR(0x40b000) #define UARTA_7366 UARTA_7364 #define UARTA_74371 REG_PHYS_ADDR(0x406b00) @@ -83,18 +76,21 @@ ARM_BE8( rev \rv, \rv ) /* Chip specific detection starts here */ 20: checkuart(\rp, \rv, 0x33900000, 3390) -21: checkuart(\rp, \rv, 0x72160000, 7216) -22: checkuart(\rp, \rv, 0x72500000, 7250) -23: checkuart(\rp, \rv, 0x72550000, 7255) -24: checkuart(\rp, \rv, 0x72600000, 7260) -25: checkuart(\rp, \rv, 0x72680000, 7268) -26: checkuart(\rp, \rv, 0x72710000, 7271) -27: checkuart(\rp, \rv, 0x72780000, 7278) -28: checkuart(\rp, \rv, 0x73640000, 7364) -29: checkuart(\rp, \rv, 0x73660000, 7366) -30: checkuart(\rp, \rv, 0x07437100, 74371) -31: checkuart(\rp, \rv, 0x74390000, 7439) -32: checkuart(\rp, \rv, 0x74450000, 7445) +21: checkuart(\rp, \rv, 0x07211600, 72116) +22: checkuart(\rp, \rv, 0x72160000, 7216) +23: checkuart(\rp, \rv, 0x07216400, 72164) +24: checkuart(\rp, \rv, 0x07216500, 72165) +25: checkuart(\rp, \rv, 0x72500000, 7250) +26: checkuart(\rp, \rv, 0x72550000, 7255) +27: checkuart(\rp, \rv, 0x72600000, 7260) +28: checkuart(\rp, \rv, 0x72680000, 7268) +29: checkuart(\rp, \rv, 0x72710000, 7271) +30: checkuart(\rp, \rv, 0x72780000, 7278) +31: checkuart(\rp, \rv, 0x73640000, 7364) +32: checkuart(\rp, \rv, 0x73660000, 7366) +33: checkuart(\rp, \rv, 0x07437100, 74371) +34: checkuart(\rp, \rv, 0x74390000, 7439) +35: checkuart(\rp, \rv, 0x74450000, 7445) /* No valid UART found */ 90: mov \rp, #0 @@ -142,7 +138,10 @@ ARM_BE8( rev \rd, \rd ) bne 1002b .endm - .macro waituart,rd,rx + .macro waituarttxrdy,rd,rx + .endm + + .macro waituartcts,rd,rx .endm /* diff --git a/arch/arm/include/debug/clps711x.S b/arch/arm/include/debug/clps711x.S index 774a67ac3877..a983d12a6515 100644 --- a/arch/arm/include/debug/clps711x.S +++ b/arch/arm/include/debug/clps711x.S @@ -20,7 +20,10 @@ ldr \rp, =CLPS711X_UART_PADDR .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx .endm .macro senduart,rd,rx diff --git a/arch/arm/include/debug/dc21285.S b/arch/arm/include/debug/dc21285.S index d7e8c71706ab..4ec0e5e31704 100644 --- a/arch/arm/include/debug/dc21285.S +++ b/arch/arm/include/debug/dc21285.S @@ -34,5 +34,8 @@ bne 1001b .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx .endm diff --git a/arch/arm/include/debug/digicolor.S b/arch/arm/include/debug/digicolor.S index 256f5f4da275..443674cad76a 100644 --- a/arch/arm/include/debug/digicolor.S +++ b/arch/arm/include/debug/digicolor.S @@ -21,7 +21,10 @@ strb \rd, [\rx, #UA0_EMI_REC] .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx .endm .macro busyuart,rd,rx diff --git a/arch/arm/include/debug/efm32.S b/arch/arm/include/debug/efm32.S deleted file mode 100644 index 5ed5028306f4..000000000000 --- a/arch/arm/include/debug/efm32.S +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2013 Pengutronix - * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> - */ - -#define UARTn_CMD 0x000c -#define UARTn_CMD_TXEN 0x0004 - -#define UARTn_STATUS 0x0010 -#define UARTn_STATUS_TXC 0x0020 -#define UARTn_STATUS_TXBL 0x0040 - -#define UARTn_TXDATA 0x0034 - - .macro addruart, rx, tmp, tmp2 - ldr \rx, =(CONFIG_DEBUG_UART_PHYS) - - /* - * enable TX. The driver might disable it to save energy. We - * don't care about disabling at the end as during debug power - * consumption isn't that important. - */ - ldr \tmp, =(UARTn_CMD_TXEN) - str \tmp, [\rx, #UARTn_CMD] - .endm - - .macro senduart,rd,rx - strb \rd, [\rx, #UARTn_TXDATA] - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #UARTn_STATUS] - tst \rd, #UARTn_STATUS_TXBL - beq 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, UARTn_STATUS] - tst \rd, #UARTn_STATUS_TXC - bne 1001b - .endm diff --git a/arch/arm/include/debug/icedcc.S b/arch/arm/include/debug/icedcc.S index 74a0dd036a17..d5e65da8a687 100644 --- a/arch/arm/include/debug/icedcc.S +++ b/arch/arm/include/debug/icedcc.S @@ -23,7 +23,10 @@ beq 1001b .endm - .macro waituart, rd, rx + .macro waituartcts, rd, rx + .endm + + .macro waituarttxrdy, rd, rx mov \rd, #0x2000000 1001: subs \rd, \rd, #1 @@ -47,7 +50,10 @@ beq 1001b .endm - .macro waituart, rd, rx + .macro waituartcts, rd, rx + .endm + + .macro waituarttxrdy, rd, rx mov \rd, #0x10000000 1001: subs \rd, \rd, #1 @@ -72,7 +78,10 @@ .endm - .macro waituart, rd, rx + .macro waituartcts, rd, rx + .endm + + .macro waituarttxrdy, rd, rx mov \rd, #0x2000000 1001: subs \rd, \rd, #1 diff --git a/arch/arm/include/debug/imx-uart.h b/arch/arm/include/debug/imx-uart.h index c8eb83d4b896..3edbb3c5b42b 100644 --- a/arch/arm/include/debug/imx-uart.h +++ b/arch/arm/include/debug/imx-uart.h @@ -11,13 +11,6 @@ #define IMX1_UART_BASE_ADDR(n) IMX1_UART##n##_BASE_ADDR #define IMX1_UART_BASE(n) IMX1_UART_BASE_ADDR(n) -#define IMX21_UART1_BASE_ADDR 0x1000a000 -#define IMX21_UART2_BASE_ADDR 0x1000b000 -#define IMX21_UART3_BASE_ADDR 0x1000c000 -#define IMX21_UART4_BASE_ADDR 0x1000d000 -#define IMX21_UART_BASE_ADDR(n) IMX21_UART##n##_BASE_ADDR -#define IMX21_UART_BASE(n) IMX21_UART_BASE_ADDR(n) - #define IMX25_UART1_BASE_ADDR 0x43f90000 #define IMX25_UART2_BASE_ADDR 0x43f94000 #define IMX25_UART3_BASE_ADDR 0x5000c000 @@ -26,6 +19,13 @@ #define IMX25_UART_BASE_ADDR(n) IMX25_UART##n##_BASE_ADDR #define IMX25_UART_BASE(n) IMX25_UART_BASE_ADDR(n) +#define IMX27_UART1_BASE_ADDR 0x1000a000 +#define IMX27_UART2_BASE_ADDR 0x1000b000 +#define IMX27_UART3_BASE_ADDR 0x1000c000 +#define IMX27_UART4_BASE_ADDR 0x1000d000 +#define IMX27_UART_BASE_ADDR(n) IMX27_UART##n##_BASE_ADDR +#define IMX27_UART_BASE(n) IMX27_UART_BASE_ADDR(n) + #define IMX31_UART1_BASE_ADDR 0x43f90000 #define IMX31_UART2_BASE_ADDR 0x43f94000 #define IMX31_UART3_BASE_ADDR 0x5000c000 @@ -112,10 +112,10 @@ #ifdef CONFIG_DEBUG_IMX1_UART #define UART_PADDR IMX_DEBUG_UART_BASE(IMX1) -#elif defined(CONFIG_DEBUG_IMX21_IMX27_UART) -#define UART_PADDR IMX_DEBUG_UART_BASE(IMX21) #elif defined(CONFIG_DEBUG_IMX25_UART) #define UART_PADDR IMX_DEBUG_UART_BASE(IMX25) +#elif defined(CONFIG_DEBUG_IMX27_UART) +#define UART_PADDR IMX_DEBUG_UART_BASE(IMX27) #elif defined(CONFIG_DEBUG_IMX31_UART) #define UART_PADDR IMX_DEBUG_UART_BASE(IMX31) #elif defined(CONFIG_DEBUG_IMX35_UART) diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S index 1c1b9d1da4c8..bb7b9550580c 100644 --- a/arch/arm/include/debug/imx.S +++ b/arch/arm/include/debug/imx.S @@ -35,7 +35,10 @@ str \rd, [\rx, #0x40] @ TXDATA .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx .endm .macro busyuart,rd,rx diff --git a/arch/arm/include/debug/meson.S b/arch/arm/include/debug/meson.S index 1e501a0054ae..7b60e4401225 100644 --- a/arch/arm/include/debug/meson.S +++ b/arch/arm/include/debug/meson.S @@ -25,7 +25,10 @@ beq 1002b .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx 1001: ldr \rd, [\rx, #MESON_AO_UART_STATUS] tst \rd, #MESON_AO_UART_TX_FIFO_FULL bne 1001b diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S index 9405b71461da..530edc74f9a3 100644 --- a/arch/arm/include/debug/msm.S +++ b/arch/arm/include/debug/msm.S @@ -17,7 +17,10 @@ ARM_BE8(rev \rd, \rd ) str \rd, [\rx, #0x70] .endm - .macro waituart, rd, rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy, rd, rx @ check for TX_EMT in UARTDM_SR ldr \rd, [\rx, #0x08] ARM_BE8(rev \rd, \rd ) diff --git a/arch/arm/include/debug/omap2plus.S b/arch/arm/include/debug/omap2plus.S index b5696a33ba0f..0680be6c79d3 100644 --- a/arch/arm/include/debug/omap2plus.S +++ b/arch/arm/include/debug/omap2plus.S @@ -75,5 +75,8 @@ omap_uart_lsr: .word 0 bne 1001b .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx .endm diff --git a/arch/arm/include/debug/pl01x.S b/arch/arm/include/debug/pl01x.S index a2a553afe7b8..c7e02d0628bf 100644 --- a/arch/arm/include/debug/pl01x.S +++ b/arch/arm/include/debug/pl01x.S @@ -8,13 +8,6 @@ */ #include <linux/amba/serial.h> -#ifdef CONFIG_DEBUG_ZTE_ZX -#undef UART01x_DR -#undef UART01x_FR -#define UART01x_DR 0x04 -#define UART01x_FR 0x14 -#endif - #ifdef CONFIG_DEBUG_UART_PHYS .macro addruart, rp, rv, tmp ldr \rp, =CONFIG_DEBUG_UART_PHYS @@ -26,7 +19,10 @@ strb \rd, [\rx, #UART01x_DR] .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx 1001: ldr \rd, [\rx, #UART01x_FR] ARM_BE8( rev \rd, \rd ) tst \rd, #UART01x_FR_TXFF diff --git a/arch/arm/include/debug/renesas-scif.S b/arch/arm/include/debug/renesas-scif.S index 25f06663a9a4..8e433e981bbe 100644 --- a/arch/arm/include/debug/renesas-scif.S +++ b/arch/arm/include/debug/renesas-scif.S @@ -33,7 +33,10 @@ ldr \rv, =SCIF_VIRT .endm - .macro waituart, rd, rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy, rd, rx 1001: ldrh \rd, [\rx, #FSR] tst \rd, #TDFE beq 1001b diff --git a/arch/arm/include/debug/sa1100.S b/arch/arm/include/debug/sa1100.S index 6109e6058e5b..7968ea52df3d 100644 --- a/arch/arm/include/debug/sa1100.S +++ b/arch/arm/include/debug/sa1100.S @@ -51,7 +51,10 @@ str \rd, [\rx, #UTDR] .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx 1001: ldr \rd, [\rx, #UTSR1] tst \rd, #UTSR1_TNF beq 1001b diff --git a/arch/arm/include/debug/samsung.S b/arch/arm/include/debug/samsung.S index 69201d7fb48f..ab474d564a90 100644 --- a/arch/arm/include/debug/samsung.S +++ b/arch/arm/include/debug/samsung.S @@ -69,7 +69,10 @@ ARM_BE8(rev \rd, \rd) 1002: @ exit busyuart .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx ldr \rd, [\rx, # S3C2410_UFCON] ARM_BE8(rev \rd, \rd) tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S deleted file mode 100644 index e73e4de0a015..000000000000 --- a/arch/arm/include/debug/sirf.S +++ /dev/null @@ -1,37 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/mach-prima2/include/mach/debug-macro.S - * - * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. - */ - -#define SIRF_LLUART_TXFIFO_STATUS 0x0114 -#define SIRF_LLUART_TXFIFO_DATA 0x0118 - -#define SIRF_LLUART_TXFIFO_FULL (1 << 5) - -#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0 -#define SIRF_LLUART_TXFIFO_EMPTY (1 << 8) -#else -#define SIRF_LLUART_TXFIFO_EMPTY (1 << 6) -#endif - - - .macro addruart, rp, rv, tmp - ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical - ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virtual - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA] - .endm - - .macro busyuart,rd,rx - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS] - tst \rd, #SIRF_LLUART_TXFIFO_EMPTY - beq 1001b - .endm - diff --git a/arch/arm/include/debug/sti.S b/arch/arm/include/debug/sti.S index 6b42c91f217d..dc796ac2ac57 100644 --- a/arch/arm/include/debug/sti.S +++ b/arch/arm/include/debug/sti.S @@ -6,28 +6,6 @@ * Copyright (C) 2013 STMicroelectronics (R&D) Limited. */ -#define STIH41X_COMMS_BASE 0xfed00000 -#define STIH41X_ASC2_BASE (STIH41X_COMMS_BASE+0x32000) - -#define STIH41X_SBC_LPM_BASE 0xfe400000 -#define STIH41X_SBC_COMMS_BASE (STIH41X_SBC_LPM_BASE + 0x100000) -#define STIH41X_SBC_ASC1_BASE (STIH41X_SBC_COMMS_BASE + 0x31000) - - -#define VIRT_ADDRESS(x) (x - 0x1000000) - -#if IS_ENABLED(CONFIG_STIH41X_DEBUG_ASC2) -#define DEBUG_LL_UART_BASE STIH41X_ASC2_BASE -#endif - -#if IS_ENABLED(CONFIG_STIH41X_DEBUG_SBC_ASC1) -#define DEBUG_LL_UART_BASE STIH41X_SBC_ASC1_BASE -#endif - -#ifndef DEBUG_LL_UART_BASE -#error "DEBUG UART is not Configured" -#endif - #define ASC_TX_BUF_OFF 0x04 #define ASC_CTRL_OFF 0x0c #define ASC_STA_OFF 0x14 @@ -37,15 +15,18 @@ .macro addruart, rp, rv, tmp - ldr \rp, =DEBUG_LL_UART_BASE @ physical base - ldr \rv, =VIRT_ADDRESS(DEBUG_LL_UART_BASE) @ virt base + ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical base + ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virt base .endm .macro senduart,rd,rx strb \rd, [\rx, #ASC_TX_BUF_OFF] .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx 1001: ldr \rd, [\rx, #ASC_STA_OFF] tst \rd, #ASC_STA_TX_FULL bne 1001b diff --git a/arch/arm/include/debug/stm32.S b/arch/arm/include/debug/stm32.S index 1abb32f685fd..b6d9df30e37d 100644 --- a/arch/arm/include/debug/stm32.S +++ b/arch/arm/include/debug/stm32.S @@ -4,14 +4,13 @@ * Author: Gerald Baeza <gerald.baeza@st.com> for STMicroelectronics. */ -#define STM32_UART_BASE 0x40011000 /* USART1 */ - #ifdef CONFIG_STM32F4_DEBUG_UART #define STM32_USART_SR_OFF 0x00 #define STM32_USART_TDR_OFF 0x04 #endif -#ifdef CONFIG_STM32F7_DEBUG_UART +#if defined(CONFIG_STM32F7_DEBUG_UART) || defined(CONFIG_STM32H7_DEBUG_UART) || \ + defined(CONFIG_STM32MP1_DEBUG_UART) #define STM32_USART_SR_OFF 0x1C #define STM32_USART_TDR_OFF 0x28 #endif @@ -20,15 +19,18 @@ #define STM32_USART_TXE (1 << 7) /* Tx data reg empty */ .macro addruart, rp, rv, tmp - ldr \rp, =STM32_UART_BASE @ physical base - ldr \rv, =STM32_UART_BASE @ virt base /* NoMMU */ + ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical base + ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virt base .endm .macro senduart,rd,rx strb \rd, [\rx, #STM32_USART_TDR_OFF] .endm -.macro waituart,rd,rx +.macro waituartcts,rd,rx +.endm + +.macro waituarttxrdy,rd,rx 1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register tst \rd, #STM32_USART_TXE @ TXE = 1 = tx empty beq 1001b diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S index 2148d0f88591..7454480d084b 100644 --- a/arch/arm/include/debug/tegra.S +++ b/arch/arm/include/debug/tegra.S @@ -149,7 +149,34 @@ .align 99: .word . +#if defined(ZIMAGE) + .word . + 4 +/* + * Storage for the state maintained by the macro. + * + * In the kernel proper, this data is located in arch/arm/mach-tegra/tegra.c. + * That's because this header is included from multiple files, and we only + * want a single copy of the data. In particular, the UART probing code above + * assumes it's running using physical addresses. This is true when this file + * is included from head.o, but not when included from debug.o. So we need + * to share the probe results between the two copies, rather than having + * to re-run the probing again later. + * + * In the decompressor, we put the storage right here, since common.c + * isn't included in the decompressor build. This storage data gets put in + * .text even though it's really data, since .data is discarded from the + * decompressor. Luckily, .text is writeable in the decompressor, unless + * CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug. + */ + /* Debug UART initialization required */ + .word 1 + /* Debug UART physical address */ + .word 0 + /* Debug UART virtual address */ + .word 0 +#else .word tegra_uart_config +#endif .ltorg /* Load previously selected UART address */ @@ -178,40 +205,14 @@ 1002: .endm - .macro waituart, rd, rx -#ifdef FLOW_CONTROL + .macro waituartcts, rd, rx cmp \rx, #0 beq 1002f 1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT] tst \rd, #UART_MSR_CTS beq 1001b 1002: -#endif .endm -/* - * Storage for the state maintained by the macros above. - * - * In the kernel proper, this data is located in arch/arm/mach-tegra/tegra.c. - * That's because this header is included from multiple files, and we only - * want a single copy of the data. In particular, the UART probing code above - * assumes it's running using physical addresses. This is true when this file - * is included from head.o, but not when included from debug.o. So we need - * to share the probe results between the two copies, rather than having - * to re-run the probing again later. - * - * In the decompressor, we put the symbol/storage right here, since common.c - * isn't included in the decompressor build. This symbol gets put in .text - * even though it's really data, since .data is discarded from the - * decompressor. Luckily, .text is writeable in the decompressor, unless - * CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug. - */ -#if defined(ZIMAGE) -tegra_uart_config: - /* Debug UART initialization required */ - .word 1 - /* Debug UART physical address */ - .word 0 - /* Debug UART virtual address */ - .word 0 -#endif + .macro waituarttxrdy,rd,rx + .endm diff --git a/arch/arm/include/debug/vf.S b/arch/arm/include/debug/vf.S index 854d9bd82770..035bcbf117ab 100644 --- a/arch/arm/include/debug/vf.S +++ b/arch/arm/include/debug/vf.S @@ -29,5 +29,8 @@ beq 1001b @ wait until transmit done .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx .endm diff --git a/arch/arm/include/debug/vt8500.S b/arch/arm/include/debug/vt8500.S index 8dc1df2d91b8..d01094fdbc8c 100644 --- a/arch/arm/include/debug/vt8500.S +++ b/arch/arm/include/debug/vt8500.S @@ -28,7 +28,10 @@ bne 1001b .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx .endm #endif diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S index 58d77c972fd6..5d42cc35ecf3 100644 --- a/arch/arm/include/debug/zynq.S +++ b/arch/arm/include/debug/zynq.S @@ -33,7 +33,10 @@ strb \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA .endm - .macro waituart,rd,rx + .macro waituartcts,rd,rx + .endm + + .macro waituarttxrdy,rd,rx 1001: ldr \rd, [\rx, #UART_SR_OFFSET] ARM_BE8( rev \rd, \rd ) tst \rd, #UART_SR_TXEMPTY |