diff options
Diffstat (limited to 'arch/arm/mach-mmp/include/mach')
23 files changed, 0 insertions, 2363 deletions
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h deleted file mode 100644 index f88a44c0ef91..000000000000 --- a/arch/arm/mach-mmp/include/mach/addr-map.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/addr-map.h - * - * Common address map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_ADDR_MAP_H -#define __ASM_MACH_ADDR_MAP_H - -/* APB - Application Subsystem Peripheral Bus - * - * NOTE: the DMA controller registers are actually on the AXI fabric #1 - * slave port to AHB/APB bridge, due to its close relationship to those - * peripherals on APB, let's count it into the ABP mapping area. - */ -#define APB_PHYS_BASE 0xd4000000 -#define APB_VIRT_BASE IOMEM(0xfe000000) -#define APB_PHYS_SIZE 0x00200000 - -#define AXI_PHYS_BASE 0xd4200000 -#define AXI_VIRT_BASE IOMEM(0xfe200000) -#define AXI_PHYS_SIZE 0x00200000 - -/* Static Memory Controller - Chip Select 0 and 1 */ -#define SMC_CS0_PHYS_BASE 0x80000000 -#define SMC_CS0_PHYS_SIZE 0x10000000 -#define SMC_CS1_PHYS_BASE 0x90000000 -#define SMC_CS1_PHYS_SIZE 0x10000000 - -#define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800) -#define APMU_REG(x) (APMU_VIRT_BASE + (x)) - -#define APBC_VIRT_BASE (APB_VIRT_BASE + 0x015000) -#define APBC_REG(x) (APBC_VIRT_BASE + (x)) - -#define MPMU_VIRT_BASE (APB_VIRT_BASE + 0x50000) -#define MPMU_REG(x) (MPMU_VIRT_BASE + (x)) - -#define CIU_VIRT_BASE (AXI_VIRT_BASE + 0x82c00) -#define CIU_REG(x) (CIU_VIRT_BASE + (x)) - -#endif /* __ASM_MACH_ADDR_MAP_H */ diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h deleted file mode 100644 index 8a3b56dfd35d..000000000000 --- a/arch/arm/mach-mmp/include/mach/cputype.h +++ /dev/null @@ -1,55 +0,0 @@ -#ifndef __ASM_MACH_CPUTYPE_H -#define __ASM_MACH_CPUTYPE_H - -#include <asm/cputype.h> - -/* - * CPU Stepping CPU_ID CHIP_ID - * - * PXA168 S0 0x56158400 0x0000C910 - * PXA168 A0 0x56158400 0x00A0A168 - * PXA910 Y1 0x56158400 0x00F2C920 - * PXA910 A0 0x56158400 0x00F2C910 - * PXA910 A1 0x56158400 0x00A0C910 - * PXA920 Y0 0x56158400 0x00F2C920 - * PXA920 A0 0x56158400 0x00A0C920 - * PXA920 A1 0x56158400 0x00A1C920 - * MMP2 Z0 0x560f5811 0x00F00410 - * MMP2 Z1 0x560f5811 0x00E00410 - * MMP2 A0 0x560f5811 0x00A0A610 - */ - -extern unsigned int mmp_chip_id; - -#ifdef CONFIG_CPU_PXA168 -static inline int cpu_is_pxa168(void) -{ - return (((read_cpuid_id() >> 8) & 0xff) == 0x84) && - ((mmp_chip_id & 0xfff) == 0x168); -} -#else -#define cpu_is_pxa168() (0) -#endif - -/* cpu_is_pxa910() is shared on both pxa910 and pxa920 */ -#ifdef CONFIG_CPU_PXA910 -static inline int cpu_is_pxa910(void) -{ - return (((read_cpuid_id() >> 8) & 0xff) == 0x84) && - (((mmp_chip_id & 0xfff) == 0x910) || - ((mmp_chip_id & 0xfff) == 0x920)); -} -#else -#define cpu_is_pxa910() (0) -#endif - -#ifdef CONFIG_CPU_MMP2 -static inline int cpu_is_mmp2(void) -{ - return (((read_cpuid_id() >> 8) & 0xff) == 0x58); -} -#else -#define cpu_is_mmp2() (0) -#endif - -#endif /* __ASM_MACH_CPUTYPE_H */ diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h deleted file mode 100644 index 21217ef11b64..000000000000 --- a/arch/arm/mach-mmp/include/mach/devices.h +++ /dev/null @@ -1,56 +0,0 @@ -#ifndef __MACH_DEVICE_H -#define __MACH_DEVICE_H - -#include <linux/types.h> - -#define MAX_RESOURCE_DMA 2 - -/* structure for describing the on-chip devices */ -struct pxa_device_desc { - const char *dev_name; - const char *drv_name; - int id; - int irq; - unsigned long start; - unsigned long size; - int dma[MAX_RESOURCE_DMA]; -}; - -#define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ -struct pxa_device_desc pxa168_device_##_name __initdata = { \ - .dev_name = "pxa168-" #_name, \ - .drv_name = _drv, \ - .id = _id, \ - .irq = IRQ_PXA168_##_irq, \ - .start = _start, \ - .size = _size, \ - .dma = { _dma }, \ -}; - -#define PXA910_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ -struct pxa_device_desc pxa910_device_##_name __initdata = { \ - .dev_name = "pxa910-" #_name, \ - .drv_name = _drv, \ - .id = _id, \ - .irq = IRQ_PXA910_##_irq, \ - .start = _start, \ - .size = _size, \ - .dma = { _dma }, \ -}; - -#define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ -struct pxa_device_desc mmp2_device_##_name __initdata = { \ - .dev_name = "mmp2-" #_name, \ - .drv_name = _drv, \ - .id = _id, \ - .irq = IRQ_MMP2_##_irq, \ - .start = _start, \ - .size = _size, \ - .dma = { _dma }, \ -} - -extern int pxa_register_device(struct pxa_device_desc *, void *, size_t); -extern int pxa_usb_phy_init(void __iomem *phy_reg); -extern void pxa_usb_phy_deinit(void __iomem *phy_reg); - -#endif /* __MACH_DEVICE_H */ diff --git a/arch/arm/mach-mmp/include/mach/dma.h b/arch/arm/mach-mmp/include/mach/dma.h deleted file mode 100644 index 1d6914544da4..000000000000 --- a/arch/arm/mach-mmp/include/mach/dma.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/dma.h - */ - -#ifndef __ASM_MACH_DMA_H -#define __ASM_MACH_DMA_H - -#include <mach/addr-map.h> - -#define DMAC_REGS_VIRT (APB_VIRT_BASE + 0x00000) - -#include <plat/dma.h> -#endif /* __ASM_MACH_DMA_H */ diff --git a/arch/arm/mach-mmp/include/mach/hardware.h b/arch/arm/mach-mmp/include/mach/hardware.h deleted file mode 100644 index 99264a5ce5e4..000000000000 --- a/arch/arm/mach-mmp/include/mach/hardware.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASM_MACH_HARDWARE_H -#define __ASM_MACH_HARDWARE_H - -#endif /* __ASM_MACH_HARDWARE_H */ diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h deleted file mode 100644 index fb492a50a817..000000000000 --- a/arch/arm/mach-mmp/include/mach/irqs.h +++ /dev/null @@ -1,239 +0,0 @@ -#ifndef __ASM_MACH_IRQS_H -#define __ASM_MACH_IRQS_H - -/* - * Interrupt numbers for PXA168 - */ -#define IRQ_PXA168_NONE (-1) -#define IRQ_PXA168_SSP4 0 -#define IRQ_PXA168_SSP3 1 -#define IRQ_PXA168_SSP2 2 -#define IRQ_PXA168_SSP1 3 -#define IRQ_PXA168_PMIC_INT 4 -#define IRQ_PXA168_RTC_INT 5 -#define IRQ_PXA168_RTC_ALARM 6 -#define IRQ_PXA168_TWSI0 7 -#define IRQ_PXA168_GPU 8 -#define IRQ_PXA168_KEYPAD 9 -#define IRQ_PXA168_ONEWIRE 12 -#define IRQ_PXA168_TIMER1 13 -#define IRQ_PXA168_TIMER2 14 -#define IRQ_PXA168_TIMER3 15 -#define IRQ_PXA168_CMU 16 -#define IRQ_PXA168_SSP5 17 -#define IRQ_PXA168_MSP_WAKEUP 19 -#define IRQ_PXA168_CF_WAKEUP 20 -#define IRQ_PXA168_XD_WAKEUP 21 -#define IRQ_PXA168_MFU 22 -#define IRQ_PXA168_MSP 23 -#define IRQ_PXA168_CF 24 -#define IRQ_PXA168_XD 25 -#define IRQ_PXA168_DDR_INT 26 -#define IRQ_PXA168_UART1 27 -#define IRQ_PXA168_UART2 28 -#define IRQ_PXA168_UART3 29 -#define IRQ_PXA168_WDT 35 -#define IRQ_PXA168_MAIN_PMU 36 -#define IRQ_PXA168_FRQ_CHANGE 38 -#define IRQ_PXA168_SDH1 39 -#define IRQ_PXA168_SDH2 40 -#define IRQ_PXA168_LCD 41 -#define IRQ_PXA168_CI 42 -#define IRQ_PXA168_USB1 44 -#define IRQ_PXA168_NAND 45 -#define IRQ_PXA168_HIFI_DMA 46 -#define IRQ_PXA168_DMA_INT0 47 -#define IRQ_PXA168_DMA_INT1 48 -#define IRQ_PXA168_GPIOX 49 -#define IRQ_PXA168_USB2 51 -#define IRQ_PXA168_AC97 57 -#define IRQ_PXA168_TWSI1 58 -#define IRQ_PXA168_AP_PMU 60 -#define IRQ_PXA168_SM_INT 63 - -/* - * Interrupt numbers for PXA910 - */ -#define IRQ_PXA910_NONE (-1) -#define IRQ_PXA910_AIRQ 0 -#define IRQ_PXA910_SSP3 1 -#define IRQ_PXA910_SSP2 2 -#define IRQ_PXA910_SSP1 3 -#define IRQ_PXA910_PMIC_INT 4 -#define IRQ_PXA910_RTC_INT 5 -#define IRQ_PXA910_RTC_ALARM 6 -#define IRQ_PXA910_TWSI0 7 -#define IRQ_PXA910_GPU 8 -#define IRQ_PXA910_KEYPAD 9 -#define IRQ_PXA910_ROTARY 10 -#define IRQ_PXA910_TRACKBALL 11 -#define IRQ_PXA910_ONEWIRE 12 -#define IRQ_PXA910_AP1_TIMER1 13 -#define IRQ_PXA910_AP1_TIMER2 14 -#define IRQ_PXA910_AP1_TIMER3 15 -#define IRQ_PXA910_IPC_AP0 16 -#define IRQ_PXA910_IPC_AP1 17 -#define IRQ_PXA910_IPC_AP2 18 -#define IRQ_PXA910_IPC_AP3 19 -#define IRQ_PXA910_IPC_AP4 20 -#define IRQ_PXA910_IPC_CP0 21 -#define IRQ_PXA910_IPC_CP1 22 -#define IRQ_PXA910_IPC_CP2 23 -#define IRQ_PXA910_IPC_CP3 24 -#define IRQ_PXA910_IPC_CP4 25 -#define IRQ_PXA910_L2_DDR 26 -#define IRQ_PXA910_UART2 27 -#define IRQ_PXA910_UART3 28 -#define IRQ_PXA910_AP2_TIMER1 29 -#define IRQ_PXA910_AP2_TIMER2 30 -#define IRQ_PXA910_CP2_TIMER1 31 -#define IRQ_PXA910_CP2_TIMER2 32 -#define IRQ_PXA910_CP2_TIMER3 33 -#define IRQ_PXA910_GSSP 34 -#define IRQ_PXA910_CP2_WDT 35 -#define IRQ_PXA910_MAIN_PMU 36 -#define IRQ_PXA910_CP_FREQ_CHG 37 -#define IRQ_PXA910_AP_FREQ_CHG 38 -#define IRQ_PXA910_MMC 39 -#define IRQ_PXA910_AEU 40 -#define IRQ_PXA910_LCD 41 -#define IRQ_PXA910_CCIC 42 -#define IRQ_PXA910_IRE 43 -#define IRQ_PXA910_USB1 44 -#define IRQ_PXA910_NAND 45 -#define IRQ_PXA910_HIFI_DMA 46 -#define IRQ_PXA910_DMA_INT0 47 -#define IRQ_PXA910_DMA_INT1 48 -#define IRQ_PXA910_AP_GPIO 49 -#define IRQ_PXA910_AP2_TIMER3 50 -#define IRQ_PXA910_USB2 51 -#define IRQ_PXA910_TWSI1 54 -#define IRQ_PXA910_CP_GPIO 55 -#define IRQ_PXA910_UART1 59 /* Slow UART */ -#define IRQ_PXA910_AP_PMU 60 -#define IRQ_PXA910_SM_INT 63 /* from PinMux */ - -/* - * Interrupt numbers for MMP2 - */ -#define IRQ_MMP2_NONE (-1) -#define IRQ_MMP2_SSP1 0 -#define IRQ_MMP2_SSP2 1 -#define IRQ_MMP2_SSPA1 2 -#define IRQ_MMP2_SSPA2 3 -#define IRQ_MMP2_PMIC_MUX 4 /* PMIC & Charger */ -#define IRQ_MMP2_RTC_MUX 5 -#define IRQ_MMP2_TWSI1 7 -#define IRQ_MMP2_GPU 8 -#define IRQ_MMP2_KEYPAD_MUX 9 -#define IRQ_MMP2_ROTARY 10 -#define IRQ_MMP2_TRACKBALL 11 -#define IRQ_MMP2_ONEWIRE 12 -#define IRQ_MMP2_TIMER1 13 -#define IRQ_MMP2_TIMER2 14 -#define IRQ_MMP2_TIMER3 15 -#define IRQ_MMP2_RIPC 16 -#define IRQ_MMP2_TWSI_MUX 17 /* TWSI2 ~ TWSI6 */ -#define IRQ_MMP2_HDMI 19 -#define IRQ_MMP2_SSP3 20 -#define IRQ_MMP2_SSP4 21 -#define IRQ_MMP2_USB_HS1 22 -#define IRQ_MMP2_USB_HS2 23 -#define IRQ_MMP2_UART3 24 -#define IRQ_MMP2_UART1 27 -#define IRQ_MMP2_UART2 28 -#define IRQ_MMP2_MIPI_DSI 29 -#define IRQ_MMP2_CI2 30 -#define IRQ_MMP2_PMU_TIMER1 31 -#define IRQ_MMP2_PMU_TIMER2 32 -#define IRQ_MMP2_PMU_TIMER3 33 -#define IRQ_MMP2_USB_FS 34 -#define IRQ_MMP2_MISC_MUX 35 -#define IRQ_MMP2_WDT1 36 -#define IRQ_MMP2_NAND_DMA 37 -#define IRQ_MMP2_USIM 38 -#define IRQ_MMP2_MMC 39 -#define IRQ_MMP2_WTM 40 -#define IRQ_MMP2_LCD 41 -#define IRQ_MMP2_CI 42 -#define IRQ_MMP2_IRE 43 -#define IRQ_MMP2_USB_OTG 44 -#define IRQ_MMP2_NAND 45 -#define IRQ_MMP2_UART4 46 -#define IRQ_MMP2_DMA_FIQ 47 -#define IRQ_MMP2_DMA_RIQ 48 -#define IRQ_MMP2_GPIO 49 -#define IRQ_MMP2_MIPI_HSI1_MUX 51 -#define IRQ_MMP2_MMC2 52 -#define IRQ_MMP2_MMC3 53 -#define IRQ_MMP2_MMC4 54 -#define IRQ_MMP2_MIPI_HSI0_MUX 55 -#define IRQ_MMP2_MSP 58 -#define IRQ_MMP2_MIPI_SLIM_DMA 59 -#define IRQ_MMP2_PJ4_FREQ_CHG 60 -#define IRQ_MMP2_MIPI_SLIM 62 -#define IRQ_MMP2_SM 63 - -#define IRQ_MMP2_MUX_BASE 64 - -/* secondary interrupt of INT #4 */ -#define IRQ_MMP2_PMIC_BASE (IRQ_MMP2_MUX_BASE) -#define IRQ_MMP2_CHARGER (IRQ_MMP2_PMIC_BASE + 0) -#define IRQ_MMP2_PMIC (IRQ_MMP2_PMIC_BASE + 1) - -/* secondary interrupt of INT #5 */ -#define IRQ_MMP2_RTC_BASE (IRQ_MMP2_PMIC_BASE + 2) -#define IRQ_MMP2_RTC_ALARM (IRQ_MMP2_RTC_BASE + 0) -#define IRQ_MMP2_RTC (IRQ_MMP2_RTC_BASE + 1) - -/* secondary interrupt of INT #9 */ -#define IRQ_MMP2_KEYPAD_BASE (IRQ_MMP2_RTC_BASE + 2) -#define IRQ_MMP2_KPC (IRQ_MMP2_KEYPAD_BASE + 0) -#define IRQ_MMP2_ROTORY (IRQ_MMP2_KEYPAD_BASE + 1) -#define IRQ_MMP2_TBALL (IRQ_MMP2_KEYPAD_BASE + 2) - -/* secondary interrupt of INT #17 */ -#define IRQ_MMP2_TWSI_BASE (IRQ_MMP2_KEYPAD_BASE + 3) -#define IRQ_MMP2_TWSI2 (IRQ_MMP2_TWSI_BASE + 0) -#define IRQ_MMP2_TWSI3 (IRQ_MMP2_TWSI_BASE + 1) -#define IRQ_MMP2_TWSI4 (IRQ_MMP2_TWSI_BASE + 2) -#define IRQ_MMP2_TWSI5 (IRQ_MMP2_TWSI_BASE + 3) -#define IRQ_MMP2_TWSI6 (IRQ_MMP2_TWSI_BASE + 4) - -/* secondary interrupt of INT #35 */ -#define IRQ_MMP2_MISC_BASE (IRQ_MMP2_TWSI_BASE + 5) -#define IRQ_MMP2_PERF (IRQ_MMP2_MISC_BASE + 0) -#define IRQ_MMP2_L2_PA_ECC (IRQ_MMP2_MISC_BASE + 1) -#define IRQ_MMP2_L2_ECC (IRQ_MMP2_MISC_BASE + 2) -#define IRQ_MMP2_L2_UECC (IRQ_MMP2_MISC_BASE + 3) -#define IRQ_MMP2_DDR (IRQ_MMP2_MISC_BASE + 4) -#define IRQ_MMP2_FAB0_TIMEOUT (IRQ_MMP2_MISC_BASE + 5) -#define IRQ_MMP2_FAB1_TIMEOUT (IRQ_MMP2_MISC_BASE + 6) -#define IRQ_MMP2_FAB2_TIMEOUT (IRQ_MMP2_MISC_BASE + 7) -#define IRQ_MMP2_THERMAL (IRQ_MMP2_MISC_BASE + 9) -#define IRQ_MMP2_MAIN_PMU (IRQ_MMP2_MISC_BASE + 10) -#define IRQ_MMP2_WDT2 (IRQ_MMP2_MISC_BASE + 11) -#define IRQ_MMP2_CORESIGHT (IRQ_MMP2_MISC_BASE + 12) -#define IRQ_MMP2_COMMTX (IRQ_MMP2_MISC_BASE + 13) -#define IRQ_MMP2_COMMRX (IRQ_MMP2_MISC_BASE + 14) - -/* secondary interrupt of INT #51 */ -#define IRQ_MMP2_MIPI_HSI1_BASE (IRQ_MMP2_MISC_BASE + 15) -#define IRQ_MMP2_HSI1_CAWAKE (IRQ_MMP2_MIPI_HSI1_BASE + 0) -#define IRQ_MMP2_MIPI_HSI_INT1 (IRQ_MMP2_MIPI_HSI1_BASE + 1) - -/* secondary interrupt of INT #55 */ -#define IRQ_MMP2_MIPI_HSI0_BASE (IRQ_MMP2_MIPI_HSI1_BASE + 2) -#define IRQ_MMP2_HSI0_CAWAKE (IRQ_MMP2_MIPI_HSI0_BASE + 0) -#define IRQ_MMP2_MIPI_HSI_INT0 (IRQ_MMP2_MIPI_HSI0_BASE + 1) - -#define IRQ_MMP2_MUX_END (IRQ_MMP2_MIPI_HSI0_BASE + 2) - -#define IRQ_GPIO_START 128 -#define MMP_NR_BUILTIN_GPIO 192 -#define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio)) - -#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO) -#define MMP_NR_IRQS IRQ_BOARD_START - -#endif /* __ASM_MACH_IRQS_H */ diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h deleted file mode 100644 index 4ad38629c3f6..000000000000 --- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h +++ /dev/null @@ -1,395 +0,0 @@ -#ifndef __ASM_MACH_MFP_MMP2_H -#define __ASM_MACH_MFP_MMP2_H - -#include <mach/mfp.h> - -#define MFP_DRIVE_VERY_SLOW (0x0 << 13) -#define MFP_DRIVE_SLOW (0x2 << 13) -#define MFP_DRIVE_MEDIUM (0x4 << 13) -#define MFP_DRIVE_FAST (0x6 << 13) - -/* GPIO */ -#define GPIO0_GPIO MFP_CFG(GPIO0, AF0) -#define GPIO1_GPIO MFP_CFG(GPIO1, AF0) -#define GPIO2_GPIO MFP_CFG(GPIO2, AF0) -#define GPIO3_GPIO MFP_CFG(GPIO3, AF0) -#define GPIO4_GPIO MFP_CFG(GPIO4, AF0) -#define GPIO5_GPIO MFP_CFG(GPIO5, AF0) -#define GPIO6_GPIO MFP_CFG(GPIO6, AF0) -#define GPIO7_GPIO MFP_CFG(GPIO7, AF0) -#define GPIO8_GPIO MFP_CFG(GPIO8, AF0) -#define GPIO9_GPIO MFP_CFG(GPIO9, AF0) -#define GPIO10_GPIO MFP_CFG(GPIO10, AF0) -#define GPIO11_GPIO MFP_CFG(GPIO11, AF0) -#define GPIO12_GPIO MFP_CFG(GPIO12, AF0) -#define GPIO13_GPIO MFP_CFG(GPIO13, AF0) -#define GPIO14_GPIO MFP_CFG(GPIO14, AF0) -#define GPIO15_GPIO MFP_CFG(GPIO15, AF0) -#define GPIO16_GPIO MFP_CFG(GPIO16, AF0) -#define GPIO17_GPIO MFP_CFG(GPIO17, AF0) -#define GPIO18_GPIO MFP_CFG(GPIO18, AF0) -#define GPIO19_GPIO MFP_CFG(GPIO19, AF0) -#define GPIO20_GPIO MFP_CFG(GPIO20, AF0) -#define GPIO21_GPIO MFP_CFG(GPIO21, AF0) -#define GPIO22_GPIO MFP_CFG(GPIO22, AF0) -#define GPIO23_GPIO MFP_CFG(GPIO23, AF0) -#define GPIO24_GPIO MFP_CFG(GPIO24, AF0) -#define GPIO25_GPIO MFP_CFG(GPIO25, AF0) -#define GPIO26_GPIO MFP_CFG(GPIO26, AF0) -#define GPIO27_GPIO MFP_CFG(GPIO27, AF0) -#define GPIO28_GPIO MFP_CFG(GPIO28, AF0) -#define GPIO29_GPIO MFP_CFG(GPIO29, AF0) -#define GPIO30_GPIO MFP_CFG(GPIO30, AF0) -#define GPIO31_GPIO MFP_CFG(GPIO31, AF0) -#define GPIO32_GPIO MFP_CFG(GPIO32, AF0) -#define GPIO33_GPIO MFP_CFG(GPIO33, AF0) -#define GPIO34_GPIO MFP_CFG(GPIO34, AF0) -#define GPIO35_GPIO MFP_CFG(GPIO35, AF0) -#define GPIO36_GPIO MFP_CFG(GPIO36, AF0) -#define GPIO37_GPIO MFP_CFG(GPIO37, AF0) -#define GPIO38_GPIO MFP_CFG(GPIO38, AF0) -#define GPIO39_GPIO MFP_CFG(GPIO39, AF0) -#define GPIO40_GPIO MFP_CFG(GPIO40, AF0) -#define GPIO41_GPIO MFP_CFG(GPIO41, AF0) -#define GPIO42_GPIO MFP_CFG(GPIO42, AF0) -#define GPIO43_GPIO MFP_CFG(GPIO43, AF0) -#define GPIO44_GPIO MFP_CFG(GPIO44, AF0) -#define GPIO45_GPIO MFP_CFG(GPIO45, AF0) -#define GPIO46_GPIO MFP_CFG(GPIO46, AF0) -#define GPIO47_GPIO MFP_CFG(GPIO47, AF0) -#define GPIO48_GPIO MFP_CFG(GPIO48, AF0) -#define GPIO49_GPIO MFP_CFG(GPIO49, AF0) -#define GPIO50_GPIO MFP_CFG(GPIO50, AF0) -#define GPIO51_GPIO MFP_CFG(GPIO51, AF0) -#define GPIO52_GPIO MFP_CFG(GPIO52, AF0) -#define GPIO53_GPIO MFP_CFG(GPIO53, AF0) -#define GPIO54_GPIO MFP_CFG(GPIO54, AF0) -#define GPIO55_GPIO MFP_CFG(GPIO55, AF0) -#define GPIO56_GPIO MFP_CFG(GPIO56, AF0) -#define GPIO57_GPIO MFP_CFG(GPIO57, AF0) -#define GPIO58_GPIO MFP_CFG(GPIO58, AF0) -#define GPIO59_GPIO MFP_CFG(GPIO59, AF0) -#define GPIO60_GPIO MFP_CFG(GPIO60, AF0) -#define GPIO61_GPIO MFP_CFG(GPIO61, AF0) -#define GPIO62_GPIO MFP_CFG(GPIO62, AF0) -#define GPIO63_GPIO MFP_CFG(GPIO63, AF0) -#define GPIO64_GPIO MFP_CFG(GPIO64, AF0) -#define GPIO65_GPIO MFP_CFG(GPIO65, AF0) -#define GPIO66_GPIO MFP_CFG(GPIO66, AF0) -#define GPIO67_GPIO MFP_CFG(GPIO67, AF0) -#define GPIO68_GPIO MFP_CFG(GPIO68, AF0) -#define GPIO69_GPIO MFP_CFG(GPIO69, AF0) -#define GPIO70_GPIO MFP_CFG(GPIO70, AF0) -#define GPIO71_GPIO MFP_CFG(GPIO71, AF0) -#define GPIO72_GPIO MFP_CFG(GPIO72, AF0) -#define GPIO73_GPIO MFP_CFG(GPIO73, AF0) -#define GPIO74_GPIO MFP_CFG(GPIO74, AF0) -#define GPIO75_GPIO MFP_CFG(GPIO75, AF0) -#define GPIO76_GPIO MFP_CFG(GPIO76, AF0) -#define GPIO77_GPIO MFP_CFG(GPIO77, AF0) -#define GPIO78_GPIO MFP_CFG(GPIO78, AF0) -#define GPIO79_GPIO MFP_CFG(GPIO79, AF0) -#define GPIO80_GPIO MFP_CFG(GPIO80, AF0) -#define GPIO81_GPIO MFP_CFG(GPIO81, AF0) -#define GPIO82_GPIO MFP_CFG(GPIO82, AF0) -#define GPIO83_GPIO MFP_CFG(GPIO83, AF0) -#define GPIO84_GPIO MFP_CFG(GPIO84, AF0) -#define GPIO85_GPIO MFP_CFG(GPIO85, AF0) -#define GPIO86_GPIO MFP_CFG(GPIO86, AF0) -#define GPIO87_GPIO MFP_CFG(GPIO87, AF0) -#define GPIO88_GPIO MFP_CFG(GPIO88, AF0) -#define GPIO89_GPIO MFP_CFG(GPIO89, AF0) -#define GPIO90_GPIO MFP_CFG(GPIO90, AF0) -#define GPIO91_GPIO MFP_CFG(GPIO91, AF0) -#define GPIO92_GPIO MFP_CFG(GPIO92, AF0) -#define GPIO93_GPIO MFP_CFG(GPIO93, AF0) -#define GPIO94_GPIO MFP_CFG(GPIO94, AF0) -#define GPIO95_GPIO MFP_CFG(GPIO95, AF0) -#define GPIO96_GPIO MFP_CFG(GPIO96, AF0) -#define GPIO97_GPIO MFP_CFG(GPIO97, AF0) -#define GPIO98_GPIO MFP_CFG(GPIO98, AF0) -#define GPIO99_GPIO MFP_CFG(GPIO99, AF0) -#define GPIO100_GPIO MFP_CFG(GPIO100, AF0) -#define GPIO101_GPIO MFP_CFG(GPIO101, AF0) -#define GPIO102_GPIO MFP_CFG(GPIO102, AF1) -#define GPIO103_GPIO MFP_CFG(GPIO103, AF1) -#define GPIO104_GPIO MFP_CFG(GPIO104, AF1) -#define GPIO105_GPIO MFP_CFG(GPIO105, AF1) -#define GPIO106_GPIO MFP_CFG(GPIO106, AF1) -#define GPIO107_GPIO MFP_CFG(GPIO107, AF1) -#define GPIO108_GPIO MFP_CFG(GPIO108, AF1) -#define GPIO109_GPIO MFP_CFG(GPIO109, AF1) -#define GPIO110_GPIO MFP_CFG(GPIO110, AF1) -#define GPIO111_GPIO MFP_CFG(GPIO111, AF1) -#define GPIO112_GPIO MFP_CFG(GPIO112, AF1) -#define GPIO113_GPIO MFP_CFG(GPIO113, AF1) -#define GPIO114_GPIO MFP_CFG(GPIO114, AF0) -#define GPIO115_GPIO MFP_CFG(GPIO115, AF0) -#define GPIO116_GPIO MFP_CFG(GPIO116, AF0) -#define GPIO117_GPIO MFP_CFG(GPIO117, AF0) -#define GPIO118_GPIO MFP_CFG(GPIO118, AF0) -#define GPIO119_GPIO MFP_CFG(GPIO119, AF0) -#define GPIO120_GPIO MFP_CFG(GPIO120, AF0) -#define GPIO121_GPIO MFP_CFG(GPIO121, AF0) -#define GPIO122_GPIO MFP_CFG(GPIO122, AF0) -#define GPIO123_GPIO MFP_CFG(GPIO123, AF0) -#define GPIO124_GPIO MFP_CFG(GPIO124, AF0) -#define GPIO125_GPIO MFP_CFG(GPIO125, AF0) -#define GPIO126_GPIO MFP_CFG(GPIO126, AF0) -#define GPIO127_GPIO MFP_CFG(GPIO127, AF0) -#define GPIO128_GPIO MFP_CFG(GPIO128, AF0) -#define GPIO129_GPIO MFP_CFG(GPIO129, AF0) -#define GPIO130_GPIO MFP_CFG(GPIO130, AF0) -#define GPIO131_GPIO MFP_CFG(GPIO131, AF0) -#define GPIO132_GPIO MFP_CFG(GPIO132, AF0) -#define GPIO133_GPIO MFP_CFG(GPIO133, AF0) -#define GPIO134_GPIO MFP_CFG(GPIO134, AF0) -#define GPIO135_GPIO MFP_CFG(GPIO135, AF0) -#define GPIO136_GPIO MFP_CFG(GPIO136, AF0) -#define GPIO137_GPIO MFP_CFG(GPIO137, AF0) -#define GPIO138_GPIO MFP_CFG(GPIO138, AF0) -#define GPIO139_GPIO MFP_CFG(GPIO139, AF0) -#define GPIO140_GPIO MFP_CFG(GPIO140, AF0) -#define GPIO141_GPIO MFP_CFG(GPIO141, AF0) -#define GPIO142_GPIO MFP_CFG(GPIO142, AF1) -#define GPIO143_GPIO MFP_CFG(GPIO143, AF1) -#define GPIO144_GPIO MFP_CFG(GPIO144, AF1) -#define GPIO145_GPIO MFP_CFG(GPIO145, AF1) -#define GPIO146_GPIO MFP_CFG(GPIO146, AF1) -#define GPIO147_GPIO MFP_CFG(GPIO147, AF1) -#define GPIO148_GPIO MFP_CFG(GPIO148, AF1) -#define GPIO149_GPIO MFP_CFG(GPIO149, AF1) -#define GPIO150_GPIO MFP_CFG(GPIO150, AF1) -#define GPIO151_GPIO MFP_CFG(GPIO151, AF1) -#define GPIO152_GPIO MFP_CFG(GPIO152, AF1) -#define GPIO153_GPIO MFP_CFG(GPIO153, AF1) -#define GPIO154_GPIO MFP_CFG(GPIO154, AF1) -#define GPIO155_GPIO MFP_CFG(GPIO155, AF1) -#define GPIO156_GPIO MFP_CFG(GPIO156, AF1) -#define GPIO157_GPIO MFP_CFG(GPIO157, AF1) -#define GPIO158_GPIO MFP_CFG(GPIO158, AF1) -#define GPIO159_GPIO MFP_CFG(GPIO159, AF1) -#define GPIO160_GPIO MFP_CFG(GPIO160, AF1) -#define GPIO161_GPIO MFP_CFG(GPIO161, AF1) -#define GPIO162_GPIO MFP_CFG(GPIO162, AF1) -#define GPIO163_GPIO MFP_CFG(GPIO163, AF1) -#define GPIO164_GPIO MFP_CFG(GPIO164, AF1) -#define GPIO165_GPIO MFP_CFG(GPIO165, AF1) -#define GPIO166_GPIO MFP_CFG(GPIO166, AF1) -#define GPIO167_GPIO MFP_CFG(GPIO167, AF1) -#define GPIO168_GPIO MFP_CFG(GPIO168, AF1) - -/* DFI */ -#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0) -#define GPIO109_DFI_D14 MFP_CFG(GPIO109, AF0) -#define GPIO110_DFI_D13 MFP_CFG(GPIO110, AF0) -#define GPIO161_DFI_D12 MFP_CFG(GPIO161, AF0) -#define GPIO162_DFI_D11 MFP_CFG(GPIO162, AF0) -#define GPIO163_DFI_D10 MFP_CFG(GPIO163, AF0) -#define GPIO164_DFI_D9 MFP_CFG(GPIO164, AF0) -#define GPIO111_DFI_D8 MFP_CFG(GPIO111, AF0) -#define GPIO104_DFI_D7 MFP_CFG(GPIO104, AF0) -#define GPIO105_DFI_D6 MFP_CFG(GPIO105, AF0) -#define GPIO106_DFI_D5 MFP_CFG(GPIO106, AF0) -#define GPIO107_DFI_D4 MFP_CFG(GPIO107, AF0) -#define GPIO165_DFI_D3 MFP_CFG(GPIO165, AF0) -#define GPIO166_DFI_D2 MFP_CFG(GPIO166, AF0) -#define GPIO167_DFI_D1 MFP_CFG(GPIO167, AF0) -#define GPIO168_DFI_D0 MFP_CFG(GPIO168, AF0) -#define GPIO143_ND_nCS0 MFP_CFG(GPIO143, AF0) -#define GPIO144_ND_nCS1 MFP_CFG(GPIO144, AF0) -#define GPIO147_ND_nWE MFP_CFG(GPIO147, AF0) -#define GPIO148_ND_nRE MFP_CFG(GPIO148, AF0) -#define GPIO150_ND_ALE MFP_CFG(GPIO150, AF0) -#define GPIO149_ND_CLE MFP_CFG(GPIO149, AF0) -#define GPIO112_ND_RDY0 MFP_CFG(GPIO112, AF0) -#define GPIO160_ND_RDY1 MFP_CFG(GPIO160, AF0) - -/* Static Memory Controller */ -#define GPIO145_SMC_nCS0 MFP_CFG(GPIO145, AF0) -#define GPIO146_SMC_nCS1 MFP_CFG(GPIO146, AF0) -#define GPIO152_SMC_BE0 MFP_CFG(GPIO152, AF0) -#define GPIO153_SMC_BE1 MFP_CFG(GPIO153, AF0) -#define GPIO154_SMC_IRQ MFP_CFG(GPIO154, AF0) -#define GPIO113_SMC_RDY MFP_CFG(GPIO113, AF0) -#define GPIO151_SMC_SCLK MFP_CFG(GPIO151, AF0) - -/* Ethernet */ -#define GPIO155_SM_ADVMUX MFP_CFG(GPIO155, AF2) - -/* UART1 */ -#define GPIO45_UART1_RXD MFP_CFG(GPIO45, AF1) -#define GPIO46_UART1_TXD MFP_CFG(GPIO46, AF1) -#define GPIO29_UART1_RXD MFP_CFG(GPIO29, AF1) -#define GPIO30_UART1_TXD MFP_CFG(GPIO30, AF1) -#define GPIO31_UART1_CTS MFP_CFG(GPIO31, AF1) -#define GPIO32_UART1_RTS MFP_CFG(GPIO32, AF1) - -/* UART2 */ -#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF1) -#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF1) -#define GPIO49_UART2_CTS MFP_CFG(GPIO49, AF1) -#define GPIO50_UART2_RTS MFP_CFG(GPIO50, AF1) - -/* UART3 */ -#define GPIO51_UART3_RXD MFP_CFG(GPIO51, AF1) -#define GPIO52_UART3_TXD MFP_CFG(GPIO52, AF1) -#define GPIO53_UART3_CTS MFP_CFG(GPIO53, AF1) -#define GPIO54_UART3_RTS MFP_CFG(GPIO54, AF1) - -/* MMC1 */ -#define GPIO124_MMC1_DAT7 MFP_CFG_DRV(GPIO124, AF1, FAST) -#define GPIO125_MMC1_DAT6 MFP_CFG_DRV(GPIO125, AF1, FAST) -#define GPIO129_MMC1_DAT5 MFP_CFG_DRV(GPIO129, AF1, FAST) -#define GPIO130_MMC1_DAT4 MFP_CFG_DRV(GPIO130, AF1, FAST) -#define GPIO131_MMC1_DAT3 MFP_CFG_DRV(GPIO131, AF1, FAST) -#define GPIO132_MMC1_DAT2 MFP_CFG_DRV(GPIO132, AF1, FAST) -#define GPIO133_MMC1_DAT1 MFP_CFG_DRV(GPIO133, AF1, FAST) -#define GPIO134_MMC1_DAT0 MFP_CFG_DRV(GPIO134, AF1, FAST) -#define GPIO136_MMC1_CMD MFP_CFG_DRV(GPIO136, AF1, FAST) -#define GPIO139_MMC1_CLK MFP_CFG_DRV(GPIO139, AF1, FAST) -#define GPIO140_MMC1_CD MFP_CFG_DRV(GPIO140, AF1, FAST) -#define GPIO141_MMC1_WP MFP_CFG_DRV(GPIO141, AF1, FAST) - -/*MMC2*/ -#define GPIO37_MMC2_DAT3 MFP_CFG_DRV(GPIO37, AF1, FAST) -#define GPIO38_MMC2_DAT2 MFP_CFG_DRV(GPIO38, AF1, FAST) -#define GPIO39_MMC2_DAT1 MFP_CFG_DRV(GPIO39, AF1, FAST) -#define GPIO40_MMC2_DAT0 MFP_CFG_DRV(GPIO40, AF1, FAST) -#define GPIO41_MMC2_CMD MFP_CFG_DRV(GPIO41, AF1, FAST) -#define GPIO42_MMC2_CLK MFP_CFG_DRV(GPIO42, AF1, FAST) - -/*MMC3*/ -#define GPIO165_MMC3_DAT7 MFP_CFG_DRV(GPIO165, AF2, FAST) -#define GPIO162_MMC3_DAT6 MFP_CFG_DRV(GPIO162, AF2, FAST) -#define GPIO166_MMC3_DAT5 MFP_CFG_DRV(GPIO166, AF2, FAST) -#define GPIO163_MMC3_DAT4 MFP_CFG_DRV(GPIO163, AF2, FAST) -#define GPIO167_MMC3_DAT3 MFP_CFG_DRV(GPIO167, AF2, FAST) -#define GPIO164_MMC3_DAT2 MFP_CFG_DRV(GPIO164, AF2, FAST) -#define GPIO168_MMC3_DAT1 MFP_CFG_DRV(GPIO168, AF2, FAST) -#define GPIO111_MMC3_DAT0 MFP_CFG_DRV(GPIO111, AF2, FAST) -#define GPIO112_MMC3_CMD MFP_CFG_DRV(GPIO112, AF2, FAST) -#define GPIO151_MMC3_CLK MFP_CFG_DRV(GPIO151, AF2, FAST) - -/* LCD */ -#define GPIO74_LCD_FCLK MFP_CFG_DRV(GPIO74, AF1, FAST) -#define GPIO75_LCD_LCLK MFP_CFG_DRV(GPIO75, AF1, FAST) -#define GPIO76_LCD_PCLK MFP_CFG_DRV(GPIO76, AF1, FAST) -#define GPIO77_LCD_DENA MFP_CFG_DRV(GPIO77, AF1, FAST) -#define GPIO78_LCD_DD0 MFP_CFG_DRV(GPIO78, AF1, FAST) -#define GPIO79_LCD_DD1 MFP_CFG_DRV(GPIO79, AF1, FAST) -#define GPIO80_LCD_DD2 MFP_CFG_DRV(GPIO80, AF1, FAST) -#define GPIO81_LCD_DD3 MFP_CFG_DRV(GPIO81, AF1, FAST) -#define GPIO82_LCD_DD4 MFP_CFG_DRV(GPIO82, AF1, FAST) -#define GPIO83_LCD_DD5 MFP_CFG_DRV(GPIO83, AF1, FAST) -#define GPIO84_LCD_DD6 MFP_CFG_DRV(GPIO84, AF1, FAST) -#define GPIO85_LCD_DD7 MFP_CFG_DRV(GPIO85, AF1, FAST) -#define GPIO86_LCD_DD8 MFP_CFG_DRV(GPIO86, AF1, FAST) -#define GPIO87_LCD_DD9 MFP_CFG_DRV(GPIO87, AF1, FAST) -#define GPIO88_LCD_DD10 MFP_CFG_DRV(GPIO88, AF1, FAST) -#define GPIO89_LCD_DD11 MFP_CFG_DRV(GPIO89, AF1, FAST) -#define GPIO90_LCD_DD12 MFP_CFG_DRV(GPIO90, AF1, FAST) -#define GPIO91_LCD_DD13 MFP_CFG_DRV(GPIO91, AF1, FAST) -#define GPIO92_LCD_DD14 MFP_CFG_DRV(GPIO92, AF1, FAST) -#define GPIO93_LCD_DD15 MFP_CFG_DRV(GPIO93, AF1, FAST) -#define GPIO94_LCD_DD16 MFP_CFG_DRV(GPIO94, AF1, FAST) -#define GPIO95_LCD_DD17 MFP_CFG_DRV(GPIO95, AF1, FAST) -#define GPIO96_LCD_DD18 MFP_CFG_DRV(GPIO96, AF1, FAST) -#define GPIO97_LCD_DD19 MFP_CFG_DRV(GPIO97, AF1, FAST) -#define GPIO98_LCD_DD20 MFP_CFG_DRV(GPIO98, AF1, FAST) -#define GPIO99_LCD_DD21 MFP_CFG_DRV(GPIO99, AF1, FAST) -#define GPIO100_LCD_DD22 MFP_CFG_DRV(GPIO100, AF1, FAST) -#define GPIO101_LCD_DD23 MFP_CFG_DRV(GPIO101, AF1, FAST) -#define GPIO94_SPI_DCLK MFP_CFG_DRV(GPIO94, AF3, FAST) -#define GPIO95_SPI_CS0 MFP_CFG_DRV(GPIO95, AF3, FAST) -#define GPIO96_SPI_DIN MFP_CFG_DRV(GPIO96, AF3, FAST) -#define GPIO97_SPI_DOUT MFP_CFG_DRV(GPIO97, AF3, FAST) -#define GPIO98_LCD_RST MFP_CFG_DRV(GPIO98, AF0, FAST) - -#define GPIO114_MN_CLK_OUT MFP_CFG_DRV(GPIO114, AF1, FAST) - -/*LCD TV path*/ -#define GPIO124_LCD_DD24 MFP_CFG_DRV(GPIO124, AF2, FAST) -#define GPIO125_LCD_DD25 MFP_CFG_DRV(GPIO125, AF2, FAST) -#define GPIO126_LCD_DD33 MFP_CFG_DRV(GPIO126, AF2, FAST) -#define GPIO127_LCD_DD26 MFP_CFG_DRV(GPIO127, AF2, FAST) -#define GPIO128_LCD_DD27 MFP_CFG_DRV(GPIO128, AF2, FAST) -#define GPIO129_LCD_DD28 MFP_CFG_DRV(GPIO129, AF2, FAST) -#define GPIO130_LCD_DD29 MFP_CFG_DRV(GPIO130, AF2, FAST) -#define GPIO135_LCD_DD30 MFP_CFG_DRV(GPIO135, AF2, FAST) -#define GPIO137_LCD_DD31 MFP_CFG_DRV(GPIO137, AF2, FAST) -#define GPIO138_LCD_DD32 MFP_CFG_DRV(GPIO138, AF2, FAST) -#define GPIO140_LCD_DD34 MFP_CFG_DRV(GPIO140, AF2, FAST) -#define GPIO141_LCD_DD35 MFP_CFG_DRV(GPIO141, AF2, FAST) - -/* I2C */ -#define GPIO43_TWSI2_SCL MFP_CFG_DRV(GPIO43, AF1, SLOW) -#define GPIO44_TWSI2_SDA MFP_CFG_DRV(GPIO44, AF1, SLOW) -#define GPIO71_TWSI3_SCL MFP_CFG_DRV(GPIO71, AF1, SLOW) -#define GPIO72_TWSI3_SDA MFP_CFG_DRV(GPIO72, AF1, SLOW) -#define TWSI4_SCL MFP_CFG_DRV(TWSI4_SCL, AF0, SLOW) -#define TWSI4_SDA MFP_CFG_DRV(TWSI4_SDA, AF0, SLOW) -#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW) -#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW) -#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW) -#define GPIO98_TWSI6_SDA MFP_CFG_DRV(GPIO98, AF2, SLOW) - -/* SSPA1 */ -#define GPIO24_I2S_SYSCLK MFP_CFG(GPIO24, AF1) -#define GPIO25_I2S_BITCLK MFP_CFG(GPIO25, AF1) -#define GPIO26_I2S_SYNC MFP_CFG(GPIO26, AF1) -#define GPIO27_I2S_DATA_OUT MFP_CFG(GPIO27, AF1) -#define GPIO28_I2S_SDATA_IN MFP_CFG(GPIO28, AF1) -#define GPIO114_I2S_MCLK MFP_CFG(GPIO114, AF1) - -/* SSPA2 */ -#define GPIO33_SSPA2_CLK MFP_CFG(GPIO33, AF1) -#define GPIO34_SSPA2_FRM MFP_CFG(GPIO34, AF1) -#define GPIO35_SSPA2_TXD MFP_CFG(GPIO35, AF1) -#define GPIO36_SSPA2_RXD MFP_CFG(GPIO36, AF1) - -/* Keypad */ -#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1) -#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1) -#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1) -#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1) -#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1) -#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1) -#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1) -#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1) -#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1) -#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1) -#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1) -#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1) -#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1) -#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1) -#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1) -#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1) -#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1) -#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1) -#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1) -#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1) -#define GPIO20_KP_DKIN4 MFP_CFG(GPIO20, AF1) -#define GPIO21_KP_DKIN5 MFP_CFG(GPIO21, AF1) -#define GPIO22_KP_DKIN6 MFP_CFG(GPIO22, AF1) -#define GPIO23_KP_DKIN7 MFP_CFG(GPIO23, AF1) - -/* CAMERA */ -#define GPIO59_CCIC_IN7 MFP_CFG_DRV(GPIO59, AF1, FAST) -#define GPIO60_CCIC_IN6 MFP_CFG_DRV(GPIO60, AF1, FAST) -#define GPIO61_CCIC_IN5 MFP_CFG_DRV(GPIO61, AF1, FAST) -#define GPIO62_CCIC_IN4 MFP_CFG_DRV(GPIO62, AF1, FAST) -#define GPIO63_CCIC_IN3 MFP_CFG_DRV(GPIO63, AF1, FAST) -#define GPIO64_CCIC_IN2 MFP_CFG_DRV(GPIO64, AF1, FAST) -#define GPIO65_CCIC_IN1 MFP_CFG_DRV(GPIO65, AF1, FAST) -#define GPIO66_CCIC_IN0 MFP_CFG_DRV(GPIO66, AF1, FAST) -#define GPIO67_CAM_HSYNC MFP_CFG_DRV(GPIO67, AF1, FAST) -#define GPIO68_CAM_VSYNC MFP_CFG_DRV(GPIO68, AF1, FAST) -#define GPIO69_CAM_MCLK MFP_CFG_DRV(GPIO69, AF1, FAST) -#define GPIO70_CAM_PCLK MFP_CFG_DRV(GPIO70, AF1, FAST) - -/* PMIC */ -#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0) - -#endif /* __ASM_MACH_MFP_MMP2_H */ - diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h deleted file mode 100644 index 92aaa3c19d61..000000000000 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h +++ /dev/null @@ -1,354 +0,0 @@ -#ifndef __ASM_MACH_MFP_PXA168_H -#define __ASM_MACH_MFP_PXA168_H - -#include <mach/mfp.h> - -#define MFP_DRIVE_VERY_SLOW (0x0 << 13) -#define MFP_DRIVE_SLOW (0x1 << 13) -#define MFP_DRIVE_MEDIUM (0x2 << 13) -#define MFP_DRIVE_FAST (0x3 << 13) - -#undef MFP_CFG -#undef MFP_CFG_DRV - -#define MFP_CFG(pin, af) \ - (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) - -#define MFP_CFG_DRV(pin, af, drv) \ - (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv) - -/* GPIO */ -#define GPIO0_GPIO MFP_CFG(GPIO0, AF5) -#define GPIO1_GPIO MFP_CFG(GPIO1, AF5) -#define GPIO2_GPIO MFP_CFG(GPIO2, AF5) -#define GPIO3_GPIO MFP_CFG(GPIO3, AF5) -#define GPIO4_GPIO MFP_CFG(GPIO4, AF5) -#define GPIO5_GPIO MFP_CFG(GPIO5, AF5) -#define GPIO6_GPIO MFP_CFG(GPIO6, AF5) -#define GPIO7_GPIO MFP_CFG(GPIO7, AF5) -#define GPIO8_GPIO MFP_CFG(GPIO8, AF5) -#define GPIO9_GPIO MFP_CFG(GPIO9, AF5) -#define GPIO10_GPIO MFP_CFG(GPIO10, AF5) -#define GPIO11_GPIO MFP_CFG(GPIO11, AF5) -#define GPIO12_GPIO MFP_CFG(GPIO12, AF5) -#define GPIO13_GPIO MFP_CFG(GPIO13, AF5) -#define GPIO14_GPIO MFP_CFG(GPIO14, AF5) -#define GPIO15_GPIO MFP_CFG(GPIO15, AF5) -#define GPIO16_GPIO MFP_CFG(GPIO16, AF0) -#define GPIO17_GPIO MFP_CFG(GPIO17, AF5) -#define GPIO18_GPIO MFP_CFG(GPIO18, AF0) -#define GPIO19_GPIO MFP_CFG(GPIO19, AF5) -#define GPIO20_GPIO MFP_CFG(GPIO20, AF0) -#define GPIO21_GPIO MFP_CFG(GPIO21, AF5) -#define GPIO22_GPIO MFP_CFG(GPIO22, AF5) -#define GPIO23_GPIO MFP_CFG(GPIO23, AF5) -#define GPIO24_GPIO MFP_CFG(GPIO24, AF5) -#define GPIO25_GPIO MFP_CFG(GPIO25, AF5) -#define GPIO26_GPIO MFP_CFG(GPIO26, AF0) -#define GPIO27_GPIO MFP_CFG(GPIO27, AF5) -#define GPIO28_GPIO MFP_CFG(GPIO28, AF5) -#define GPIO29_GPIO MFP_CFG(GPIO29, AF5) -#define GPIO30_GPIO MFP_CFG(GPIO30, AF5) -#define GPIO31_GPIO MFP_CFG(GPIO31, AF5) -#define GPIO32_GPIO MFP_CFG(GPIO32, AF5) -#define GPIO33_GPIO MFP_CFG(GPIO33, AF5) -#define GPIO34_GPIO MFP_CFG(GPIO34, AF0) -#define GPIO35_GPIO MFP_CFG(GPIO35, AF0) -#define GPIO36_GPIO MFP_CFG(GPIO36, AF0) -#define GPIO37_GPIO MFP_CFG(GPIO37, AF0) -#define GPIO38_GPIO MFP_CFG(GPIO38, AF0) -#define GPIO39_GPIO MFP_CFG(GPIO39, AF0) -#define GPIO40_GPIO MFP_CFG(GPIO40, AF0) -#define GPIO41_GPIO MFP_CFG(GPIO41, AF0) -#define GPIO42_GPIO MFP_CFG(GPIO42, AF0) -#define GPIO43_GPIO MFP_CFG(GPIO43, AF0) -#define GPIO44_GPIO MFP_CFG(GPIO44, AF0) -#define GPIO45_GPIO MFP_CFG(GPIO45, AF0) -#define GPIO46_GPIO MFP_CFG(GPIO46, AF0) -#define GPIO47_GPIO MFP_CFG(GPIO47, AF0) -#define GPIO48_GPIO MFP_CFG(GPIO48, AF0) -#define GPIO49_GPIO MFP_CFG(GPIO49, AF0) -#define GPIO50_GPIO MFP_CFG(GPIO50, AF0) -#define GPIO51_GPIO MFP_CFG(GPIO51, AF0) -#define GPIO52_GPIO MFP_CFG(GPIO52, AF0) -#define GPIO53_GPIO MFP_CFG(GPIO53, AF0) -#define GPIO54_GPIO MFP_CFG(GPIO54, AF0) -#define GPIO55_GPIO MFP_CFG(GPIO55, AF0) -#define GPIO56_GPIO MFP_CFG(GPIO56, AF0) -#define GPIO57_GPIO MFP_CFG(GPIO57, AF0) -#define GPIO58_GPIO MFP_CFG(GPIO58, AF0) -#define GPIO59_GPIO MFP_CFG(GPIO59, AF0) -#define GPIO60_GPIO MFP_CFG(GPIO60, AF0) -#define GPIO61_GPIO MFP_CFG(GPIO61, AF0) -#define GPIO62_GPIO MFP_CFG(GPIO62, AF0) -#define GPIO63_GPIO MFP_CFG(GPIO63, AF0) -#define GPIO64_GPIO MFP_CFG(GPIO64, AF0) -#define GPIO65_GPIO MFP_CFG(GPIO65, AF0) -#define GPIO66_GPIO MFP_CFG(GPIO66, AF0) -#define GPIO67_GPIO MFP_CFG(GPIO67, AF0) -#define GPIO68_GPIO MFP_CFG(GPIO68, AF0) -#define GPIO69_GPIO MFP_CFG(GPIO69, AF0) -#define GPIO70_GPIO MFP_CFG(GPIO70, AF0) -#define GPIO71_GPIO MFP_CFG(GPIO71, AF0) -#define GPIO72_GPIO MFP_CFG(GPIO72, AF0) -#define GPIO73_GPIO MFP_CFG(GPIO73, AF0) -#define GPIO74_GPIO MFP_CFG(GPIO74, AF0) -#define GPIO75_GPIO MFP_CFG(GPIO75, AF0) -#define GPIO76_GPIO MFP_CFG(GPIO76, AF0) -#define GPIO77_GPIO MFP_CFG(GPIO77, AF0) -#define GPIO78_GPIO MFP_CFG(GPIO78, AF0) -#define GPIO79_GPIO MFP_CFG(GPIO79, AF0) -#define GPIO80_GPIO MFP_CFG(GPIO80, AF0) -#define GPIO81_GPIO MFP_CFG(GPIO81, AF0) -#define GPIO82_GPIO MFP_CFG(GPIO82, AF0) -#define GPIO83_GPIO MFP_CFG(GPIO83, AF0) -#define GPIO84_GPIO MFP_CFG(GPIO84, AF0) -#define GPIO85_GPIO MFP_CFG(GPIO85, AF0) -#define GPIO86_GPIO MFP_CFG(GPIO86, AF0) -#define GPIO87_GPIO MFP_CFG(GPIO87, AF0) -#define GPIO88_GPIO MFP_CFG(GPIO88, AF0) -#define GPIO89_GPIO MFP_CFG(GPIO89, AF0) -#define GPIO90_GPIO MFP_CFG(GPIO90, AF0) -#define GPIO91_GPIO MFP_CFG(GPIO91, AF0) -#define GPIO92_GPIO MFP_CFG(GPIO92, AF0) -#define GPIO93_GPIO MFP_CFG(GPIO93, AF0) -#define GPIO94_GPIO MFP_CFG(GPIO94, AF0) -#define GPIO95_GPIO MFP_CFG(GPIO95, AF0) -#define GPIO96_GPIO MFP_CFG(GPIO96, AF0) -#define GPIO97_GPIO MFP_CFG(GPIO97, AF0) -#define GPIO98_GPIO MFP_CFG(GPIO98, AF0) -#define GPIO99_GPIO MFP_CFG(GPIO99, AF0) -#define GPIO100_GPIO MFP_CFG(GPIO100, AF0) -#define GPIO101_GPIO MFP_CFG(GPIO101, AF0) -#define GPIO102_GPIO MFP_CFG(GPIO102, AF0) -#define GPIO103_GPIO MFP_CFG(GPIO103, AF0) -#define GPIO104_GPIO MFP_CFG(GPIO104, AF0) -#define GPIO105_GPIO MFP_CFG(GPIO105, AF0) -#define GPIO106_GPIO MFP_CFG(GPIO106, AF0) -#define GPIO107_GPIO MFP_CFG(GPIO107, AF0) -#define GPIO108_GPIO MFP_CFG(GPIO108, AF0) -#define GPIO109_GPIO MFP_CFG(GPIO109, AF0) -#define GPIO110_GPIO MFP_CFG(GPIO110, AF0) -#define GPIO111_GPIO MFP_CFG(GPIO111, AF0) -#define GPIO112_GPIO MFP_CFG(GPIO112, AF0) -#define GPIO113_GPIO MFP_CFG(GPIO113, AF0) -#define GPIO114_GPIO MFP_CFG(GPIO114, AF0) -#define GPIO115_GPIO MFP_CFG(GPIO115, AF0) -#define GPIO116_GPIO MFP_CFG(GPIO116, AF0) -#define GPIO117_GPIO MFP_CFG(GPIO117, AF0) -#define GPIO118_GPIO MFP_CFG(GPIO118, AF0) -#define GPIO119_GPIO MFP_CFG(GPIO119, AF0) -#define GPIO120_GPIO MFP_CFG(GPIO120, AF0) -#define GPIO121_GPIO MFP_CFG(GPIO121, AF0) -#define GPIO122_GPIO MFP_CFG(GPIO122, AF0) - -/* DFI */ -#define GPIO0_DFI_D15 MFP_CFG(GPIO0, AF0) -#define GPIO1_DFI_D14 MFP_CFG(GPIO1, AF0) -#define GPIO2_DFI_D13 MFP_CFG(GPIO2, AF0) -#define GPIO3_DFI_D12 MFP_CFG(GPIO3, AF0) -#define GPIO4_DFI_D11 MFP_CFG(GPIO4, AF0) -#define GPIO5_DFI_D10 MFP_CFG(GPIO5, AF0) -#define GPIO6_DFI_D9 MFP_CFG(GPIO6, AF0) -#define GPIO7_DFI_D8 MFP_CFG(GPIO7, AF0) -#define GPIO8_DFI_D7 MFP_CFG(GPIO8, AF0) -#define GPIO9_DFI_D6 MFP_CFG(GPIO9, AF0) -#define GPIO10_DFI_D5 MFP_CFG(GPIO10, AF0) -#define GPIO11_DFI_D4 MFP_CFG(GPIO11, AF0) -#define GPIO12_DFI_D3 MFP_CFG(GPIO12, AF0) -#define GPIO13_DFI_D2 MFP_CFG(GPIO13, AF0) -#define GPIO14_DFI_D1 MFP_CFG(GPIO14, AF0) -#define GPIO15_DFI_D0 MFP_CFG(GPIO15, AF0) - -#define GPIO30_DFI_ADDR0 MFP_CFG(GPIO30, AF0) -#define GPIO31_DFI_ADDR1 MFP_CFG(GPIO31, AF0) -#define GPIO32_DFI_ADDR2 MFP_CFG(GPIO32, AF0) -#define GPIO33_DFI_ADDR3 MFP_CFG(GPIO33, AF0) - -/* NAND */ -#define GPIO16_ND_nCS0 MFP_CFG(GPIO16, AF1) -#define GPIO17_ND_nWE MFP_CFG(GPIO17, AF0) -#define GPIO21_ND_ALE MFP_CFG(GPIO21, AF0) -#define GPIO22_ND_CLE MFP_CFG(GPIO22, AF0) -#define GPIO24_ND_nRE MFP_CFG(GPIO24, AF0) -#define GPIO26_ND_RnB1 MFP_CFG(GPIO26, AF1) -#define GPIO27_ND_RnB2 MFP_CFG(GPIO27, AF1) - -/* Static Memory Controller */ -#define GPIO18_SMC_nCS0 MFP_CFG(GPIO18, AF3) -#define GPIO18_SMC_nCS1 MFP_CFG(GPIO18, AF2) -#define GPIO16_SMC_nCS0 MFP_CFG(GPIO16, AF2) -#define GPIO16_SMC_nCS1 MFP_CFG(GPIO16, AF3) -#define GPIO19_SMC_nCS0 MFP_CFG(GPIO19, AF0) -#define GPIO20_SMC_nCS1 MFP_CFG(GPIO20, AF2) -#define GPIO23_SMC_nLUA MFP_CFG(GPIO23, AF0) -#define GPIO25_SMC_nLLA MFP_CFG(GPIO25, AF0) -#define GPIO27_SMC_IRQ MFP_CFG(GPIO27, AF0) -#define GPIO28_SMC_RDY MFP_CFG(GPIO28, AF0) -#define GPIO29_SMC_SCLK MFP_CFG(GPIO29, AF0) -#define GPIO34_SMC_nCS1 MFP_CFG(GPIO34, AF2) -#define GPIO35_SMC_BE1 MFP_CFG(GPIO35, AF2) -#define GPIO36_SMC_BE2 MFP_CFG(GPIO36, AF2) - -/* Compact Flash */ -#define GPIO19_CF_nCE1 MFP_CFG(GPIO19, AF3) -#define GPIO20_CF_nCE2 MFP_CFG(GPIO20, AF3) -#define GPIO23_CF_nALE MFP_CFG(GPIO23, AF3) -#define GPIO25_CF_nRESET MFP_CFG(GPIO25, AF3) -#define GPIO28_CF_RDY MFP_CFG(GPIO28, AF3) -#define GPIO29_CF_STSCH MFP_CFG(GPIO29, AF3) -#define GPIO30_CF_nREG MFP_CFG(GPIO30, AF3) -#define GPIO31_CF_nIOIS16 MFP_CFG(GPIO31, AF3) -#define GPIO32_CF_nCD1 MFP_CFG(GPIO32, AF3) -#define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3) - -/* UART */ -#define GPIO8_UART3_TXD MFP_CFG(GPIO8, AF2) -#define GPIO9_UART3_RXD MFP_CFG(GPIO9, AF2) -#define GPIO1O_UART3_CTS MFP_CFG(GPIO10, AF2) -#define GPIO11_UART3_RTS MFP_CFG(GPIO11, AF2) -#define GPIO88_UART2_TXD MFP_CFG(GPIO88, AF2) -#define GPIO89_UART2_RXD MFP_CFG(GPIO89, AF2) -#define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST) -#define GPIO107_UART1_RXD MFP_CFG_DRV(GPIO107, AF2, FAST) -#define GPIO108_UART1_RXD MFP_CFG_DRV(GPIO108, AF1, FAST) -#define GPIO108_UART1_TXD MFP_CFG_DRV(GPIO108, AF2, FAST) -#define GPIO109_UART1_CTS MFP_CFG(GPIO109, AF1) -#define GPIO109_UART1_RTS MFP_CFG(GPIO109, AF2) -#define GPIO110_UART1_RTS MFP_CFG(GPIO110, AF1) -#define GPIO110_UART1_CTS MFP_CFG(GPIO110, AF2) -#define GPIO111_UART1_RI MFP_CFG(GPIO111, AF1) -#define GPIO111_UART1_DSR MFP_CFG(GPIO111, AF2) -#define GPIO112_UART1_DTR MFP_CFG(GPIO111, AF1) -#define GPIO112_UART1_DCD MFP_CFG(GPIO112, AF2) - -/* MMC1 */ -#define GPIO37_MMC1_DAT7 MFP_CFG(GPIO37, AF1) -#define GPIO38_MMC1_DAT6 MFP_CFG(GPIO38, AF1) -#define GPIO54_MMC1_DAT5 MFP_CFG(GPIO54, AF1) -#define GPIO48_MMC1_DAT4 MFP_CFG(GPIO48, AF1) -#define GPIO51_MMC1_DAT3 MFP_CFG(GPIO51, AF1) -#define GPIO52_MMC1_DAT2 MFP_CFG(GPIO52, AF1) -#define GPIO40_MMC1_DAT1 MFP_CFG(GPIO40, AF1) -#define GPIO41_MMC1_DAT0 MFP_CFG(GPIO41, AF1) -#define GPIO49_MMC1_CMD MFP_CFG(GPIO49, AF1) -#define GPIO43_MMC1_CLK MFP_CFG(GPIO43, AF1) -#define GPIO53_MMC1_CD MFP_CFG(GPIO53, AF1) -#define GPIO46_MMC1_WP MFP_CFG(GPIO46, AF1) - -/* MMC2 */ -#define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST) -#define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST) -#define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST) -#define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST) -#define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST) -#define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST) - -/* MMC4 */ -#define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST) -#define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST) -#define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST) -#define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST) -#define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST) -#define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST) - -/* LCD */ -#define GPIO84_LCD_CS MFP_CFG(GPIO84, AF1) -#define GPIO60_LCD_DD0 MFP_CFG(GPIO60, AF1) -#define GPIO61_LCD_DD1 MFP_CFG(GPIO61, AF1) -#define GPIO70_LCD_DD10 MFP_CFG(GPIO70, AF1) -#define GPIO71_LCD_DD11 MFP_CFG(GPIO71, AF1) -#define GPIO72_LCD_DD12 MFP_CFG(GPIO72, AF1) -#define GPIO73_LCD_DD13 MFP_CFG(GPIO73, AF1) -#define GPIO74_LCD_DD14 MFP_CFG(GPIO74, AF1) -#define GPIO75_LCD_DD15 MFP_CFG(GPIO75, AF1) -#define GPIO76_LCD_DD16 MFP_CFG(GPIO76, AF1) -#define GPIO77_LCD_DD17 MFP_CFG(GPIO77, AF1) -#define GPIO78_LCD_DD18 MFP_CFG(GPIO78, AF1) -#define GPIO79_LCD_DD19 MFP_CFG(GPIO79, AF1) -#define GPIO62_LCD_DD2 MFP_CFG(GPIO62, AF1) -#define GPIO80_LCD_DD20 MFP_CFG(GPIO80, AF1) -#define GPIO81_LCD_DD21 MFP_CFG(GPIO81, AF1) -#define GPIO82_LCD_DD22 MFP_CFG(GPIO82, AF1) -#define GPIO83_LCD_DD23 MFP_CFG(GPIO83, AF1) -#define GPIO63_LCD_DD3 MFP_CFG(GPIO63, AF1) -#define GPIO64_LCD_DD4 MFP_CFG(GPIO64, AF1) -#define GPIO65_LCD_DD5 MFP_CFG(GPIO65, AF1) -#define GPIO66_LCD_DD6 MFP_CFG(GPIO66, AF1) -#define GPIO67_LCD_DD7 MFP_CFG(GPIO67, AF1) -#define GPIO68_LCD_DD8 MFP_CFG(GPIO68, AF1) -#define GPIO69_LCD_DD9 MFP_CFG(GPIO69, AF1) -#define GPIO59_LCD_DENA_BIAS MFP_CFG(GPIO59, AF1) -#define GPIO56_LCD_FCLK_RD MFP_CFG(GPIO56, AF1) -#define GPIO57_LCD_LCLK_A0 MFP_CFG(GPIO57, AF1) -#define GPIO58_LCD_PCLK_WR MFP_CFG(GPIO58, AF1) -#define GPIO85_LCD_VSYNC MFP_CFG(GPIO85, AF1) - -/* I2C */ -#define GPIO105_CI2C_SDA MFP_CFG(GPIO105, AF1) -#define GPIO106_CI2C_SCL MFP_CFG(GPIO106, AF1) - -/* I2S */ -#define GPIO113_I2S_MCLK MFP_CFG(GPIO113, AF6) -#define GPIO114_I2S_FRM MFP_CFG(GPIO114, AF1) -#define GPIO115_I2S_BCLK MFP_CFG(GPIO115, AF1) -#define GPIO116_I2S_RXD MFP_CFG(GPIO116, AF2) -#define GPIO116_I2S_TXD MFP_CFG(GPIO116, AF1) -#define GPIO117_I2S_TXD MFP_CFG(GPIO117, AF2) - -/* PWM */ -#define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1) -#define GPIO97_PWM2_OUT MFP_CFG(GPIO97, AF1) -#define GPIO98_PWM1_OUT MFP_CFG(GPIO98, AF1) -#define GPIO104_PWM4_OUT MFP_CFG(GPIO104, AF1) -#define GPIO106_PWM2_OUT MFP_CFG(GPIO106, AF2) -#define GPIO74_PWM4_OUT MFP_CFG(GPIO74, AF2) -#define GPIO75_PWM3_OUT MFP_CFG(GPIO75, AF2) -#define GPIO76_PWM2_OUT MFP_CFG(GPIO76, AF2) -#define GPIO77_PWM1_OUT MFP_CFG(GPIO77, AF2) -#define GPIO82_PWM4_OUT MFP_CFG(GPIO82, AF2) -#define GPIO83_PWM3_OUT MFP_CFG(GPIO83, AF2) -#define GPIO84_PWM2_OUT MFP_CFG(GPIO84, AF2) -#define GPIO85_PWM1_OUT MFP_CFG(GPIO85, AF2) -#define GPIO84_PWM1_OUT MFP_CFG(GPIO84, AF4) -#define GPIO122_PWM3_OUT MFP_CFG(GPIO122, AF3) -#define GPIO123_PWM1_OUT MFP_CFG(GPIO123, AF1) -#define GPIO124_PWM2_OUT MFP_CFG(GPIO124, AF1) -#define GPIO125_PWM3_OUT MFP_CFG(GPIO125, AF1) -#define GPIO126_PWM4_OUT MFP_CFG(GPIO126, AF1) -#define GPIO86_PWM1_OUT MFP_CFG(GPIO86, AF2) -#define GPIO86_PWM2_OUT MFP_CFG(GPIO86, AF3) - -/* Keypad */ -#define GPIO109_KP_MKIN1 MFP_CFG(GPIO109, AF7) -#define GPIO110_KP_MKIN0 MFP_CFG(GPIO110, AF7) -#define GPIO111_KP_MKOUT7 MFP_CFG(GPIO111, AF7) -#define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7) -#define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7) - -/* Fast Ethernet */ -#define GPIO86_TX_CLK MFP_CFG(GPIO86, AF5) -#define GPIO87_TX_EN MFP_CFG(GPIO87, AF5) -#define GPIO88_TX_DQ3 MFP_CFG(GPIO88, AF5) -#define GPIO89_TX_DQ2 MFP_CFG(GPIO89, AF5) -#define GPIO90_TX_DQ1 MFP_CFG(GPIO90, AF5) -#define GPIO91_TX_DQ0 MFP_CFG(GPIO91, AF5) -#define GPIO92_MII_CRS MFP_CFG(GPIO92, AF5) -#define GPIO93_MII_COL MFP_CFG(GPIO93, AF5) -#define GPIO94_RX_CLK MFP_CFG(GPIO94, AF5) -#define GPIO95_RX_ER MFP_CFG(GPIO95, AF5) -#define GPIO96_RX_DQ3 MFP_CFG(GPIO96, AF5) -#define GPIO97_RX_DQ2 MFP_CFG(GPIO97, AF5) -#define GPIO98_RX_DQ1 MFP_CFG(GPIO98, AF5) -#define GPIO99_RX_DQ0 MFP_CFG(GPIO99, AF5) -#define GPIO100_MII_MDC MFP_CFG(GPIO100, AF5) -#define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5) -#define GPIO103_RX_DV MFP_CFG(GPIO103, AF5) - -/* SSP2 */ -#define GPIO107_SSP2_RXD MFP_CFG(GPIO107, AF4) -#define GPIO108_SSP2_TXD MFP_CFG(GPIO108, AF4) -#define GPIO111_SSP2_CLK MFP_CFG(GPIO111, AF4) -#define GPIO112_SSP2_FRM MFP_CFG(GPIO112, AF4) - -#endif /* __ASM_MACH_MFP_PXA168_H */ diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h deleted file mode 100644 index 8c78f2b16452..000000000000 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h +++ /dev/null @@ -1,169 +0,0 @@ -#ifndef __ASM_MACH_MFP_PXA910_H -#define __ASM_MACH_MFP_PXA910_H - -#include <mach/mfp.h> - -#define MFP_DRIVE_VERY_SLOW (0x0 << 13) -#define MFP_DRIVE_SLOW (0x2 << 13) -#define MFP_DRIVE_MEDIUM (0x4 << 13) -#define MFP_DRIVE_FAST (0x6 << 13) - -/* UART2 */ -#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6) -#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF6) - -/* UART3 */ -#define GPIO31_UART3_RXD MFP_CFG(GPIO31, AF4) -#define GPIO32_UART3_TXD MFP_CFG(GPIO32, AF4) - -/*IRDA*/ -#define GPIO51_IRDA_SHDN MFP_CFG(GPIO51, AF0) - -/* SMC */ -#define SM_nCS0_nCS0 MFP_CFG(SM_nCS0, AF0) -#define SM_ADV_SM_ADV MFP_CFG(SM_ADV, AF0) -#define SM_SCLK_SM_SCLK MFP_CFG(SM_SCLK, AF0) -#define SM_BE0_SM_BE0 MFP_CFG(SM_BE0, AF1) -#define SM_BE1_SM_BE1 MFP_CFG(SM_BE1, AF1) - -/* I2C */ -#define GPIO53_CI2C_SCL MFP_CFG(GPIO53, AF2) -#define GPIO54_CI2C_SDA MFP_CFG(GPIO54, AF2) - -/* SSP1 (I2S) */ -#define GPIO24_SSP1_SDATA_IN MFP_CFG_DRV(GPIO24, AF1, MEDIUM) -#define GPIO21_SSP1_BITCLK MFP_CFG_DRV(GPIO21, AF1, MEDIUM) -#define GPIO20_SSP1_SYSCLK MFP_CFG_DRV(GPIO20, AF1, MEDIUM) -#define GPIO22_SSP1_SYNC MFP_CFG_DRV(GPIO22, AF1, MEDIUM) -#define GPIO23_SSP1_DATA_OUT MFP_CFG_DRV(GPIO23, AF1, MEDIUM) -#define GPIO124_MN_CLK_OUT MFP_CFG_DRV(GPIO124, AF1, MEDIUM) -#define GPIO123_CLK_REQ MFP_CFG_DRV(GPIO123, AF0, MEDIUM) - -/* DFI */ -#define DF_IO0_ND_IO0 MFP_CFG(DF_IO0, AF0) -#define DF_IO1_ND_IO1 MFP_CFG(DF_IO1, AF0) -#define DF_IO2_ND_IO2 MFP_CFG(DF_IO2, AF0) -#define DF_IO3_ND_IO3 MFP_CFG(DF_IO3, AF0) -#define DF_IO4_ND_IO4 MFP_CFG(DF_IO4, AF0) -#define DF_IO5_ND_IO5 MFP_CFG(DF_IO5, AF0) -#define DF_IO6_ND_IO6 MFP_CFG(DF_IO6, AF0) -#define DF_IO7_ND_IO7 MFP_CFG(DF_IO7, AF0) -#define DF_IO8_ND_IO8 MFP_CFG(DF_IO8, AF0) -#define DF_IO9_ND_IO9 MFP_CFG(DF_IO9, AF0) -#define DF_IO10_ND_IO10 MFP_CFG(DF_IO10, AF0) -#define DF_IO11_ND_IO11 MFP_CFG(DF_IO11, AF0) -#define DF_IO12_ND_IO12 MFP_CFG(DF_IO12, AF0) -#define DF_IO13_ND_IO13 MFP_CFG(DF_IO13, AF0) -#define DF_IO14_ND_IO14 MFP_CFG(DF_IO14, AF0) -#define DF_IO15_ND_IO15 MFP_CFG(DF_IO15, AF0) -#define DF_nCS0_SM_nCS2_nCS0 MFP_CFG(DF_nCS0_SM_nCS2, AF0) -#define DF_ALE_SM_WEn_ND_ALE MFP_CFG(DF_ALE_SM_WEn, AF1) -#define DF_CLE_SM_OEn_ND_CLE MFP_CFG(DF_CLE_SM_OEn, AF0) -#define DF_WEn_DF_WEn MFP_CFG(DF_WEn, AF1) -#define DF_REn_DF_REn MFP_CFG(DF_REn, AF1) -#define DF_RDY0_DF_RDY0 MFP_CFG(DF_RDY0, AF0) - -/*keypad*/ -#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1) -#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1) -#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1) -#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1) -#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1) -#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1) -#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1) -#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1) -#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1) -#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1) -#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1) -#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1) -#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1) -#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1) -#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1) -#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1) -#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1) -#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1) -#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1) -#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1) - -/* LCD */ -#define GPIO81_LCD_FCLK MFP_CFG(GPIO81, AF1) -#define GPIO82_LCD_LCLK MFP_CFG(GPIO82, AF1) -#define GPIO83_LCD_PCLK MFP_CFG(GPIO83, AF1) -#define GPIO84_LCD_DENA MFP_CFG(GPIO84, AF1) -#define GPIO85_LCD_DD0 MFP_CFG(GPIO85, AF1) -#define GPIO86_LCD_DD1 MFP_CFG(GPIO86, AF1) -#define GPIO87_LCD_DD2 MFP_CFG(GPIO87, AF1) -#define GPIO88_LCD_DD3 MFP_CFG(GPIO88, AF1) -#define GPIO89_LCD_DD4 MFP_CFG(GPIO89, AF1) -#define GPIO90_LCD_DD5 MFP_CFG(GPIO90, AF1) -#define GPIO91_LCD_DD6 MFP_CFG(GPIO91, AF1) -#define GPIO92_LCD_DD7 MFP_CFG(GPIO92, AF1) -#define GPIO93_LCD_DD8 MFP_CFG(GPIO93, AF1) -#define GPIO94_LCD_DD9 MFP_CFG(GPIO94, AF1) -#define GPIO95_LCD_DD10 MFP_CFG(GPIO95, AF1) -#define GPIO96_LCD_DD11 MFP_CFG(GPIO96, AF1) -#define GPIO97_LCD_DD12 MFP_CFG(GPIO97, AF1) -#define GPIO98_LCD_DD13 MFP_CFG(GPIO98, AF1) -#define GPIO100_LCD_DD14 MFP_CFG(GPIO100, AF1) -#define GPIO101_LCD_DD15 MFP_CFG(GPIO101, AF1) -#define GPIO102_LCD_DD16 MFP_CFG(GPIO102, AF1) -#define GPIO103_LCD_DD17 MFP_CFG(GPIO103, AF1) -#define GPIO104_LCD_DD18 MFP_CFG(GPIO104, AF1) -#define GPIO105_LCD_DD19 MFP_CFG(GPIO105, AF1) -#define GPIO106_LCD_DD20 MFP_CFG(GPIO106, AF1) -#define GPIO107_LCD_DD21 MFP_CFG(GPIO107, AF1) -#define GPIO108_LCD_DD22 MFP_CFG(GPIO108, AF1) -#define GPIO109_LCD_DD23 MFP_CFG(GPIO109, AF1) - -#define GPIO104_LCD_SPIDOUT MFP_CFG(GPIO104, AF3) -#define GPIO105_LCD_SPIDIN MFP_CFG(GPIO105, AF3) -#define GPIO107_LCD_CS1 MFP_CFG(GPIO107, AF3) -#define GPIO108_LCD_DCLK MFP_CFG(GPIO108, AF3) - -#define GPIO106_LCD_RESET MFP_CFG(GPIO106, AF0) - -/*smart panel*/ -#define GPIO82_LCD_A0 MFP_CFG(GPIO82, AF0) -#define GPIO83_LCD_WR MFP_CFG(GPIO83, AF0) -#define GPIO103_LCD_CS MFP_CFG(GPIO103, AF0) - -/*1wire*/ -#define GPIO106_1WIRE MFP_CFG(GPIO106, AF3) - -/*CCIC*/ -#define GPIO67_CCIC_IN7 MFP_CFG_DRV(GPIO67, AF1, MEDIUM) -#define GPIO68_CCIC_IN6 MFP_CFG_DRV(GPIO68, AF1, MEDIUM) -#define GPIO69_CCIC_IN5 MFP_CFG_DRV(GPIO69, AF1, MEDIUM) -#define GPIO70_CCIC_IN4 MFP_CFG_DRV(GPIO70, AF1, MEDIUM) -#define GPIO71_CCIC_IN3 MFP_CFG_DRV(GPIO71, AF1, MEDIUM) -#define GPIO72_CCIC_IN2 MFP_CFG_DRV(GPIO72, AF1, MEDIUM) -#define GPIO73_CCIC_IN1 MFP_CFG_DRV(GPIO73, AF1, MEDIUM) -#define GPIO74_CCIC_IN0 MFP_CFG_DRV(GPIO74, AF1, MEDIUM) -#define GPIO75_CAM_HSYNC MFP_CFG_DRV(GPIO75, AF1, MEDIUM) -#define GPIO76_CAM_VSYNC MFP_CFG_DRV(GPIO76, AF1, MEDIUM) -#define GPIO77_CAM_MCLK MFP_CFG_DRV(GPIO77, AF1, MEDIUM) -#define GPIO78_CAM_PCLK MFP_CFG_DRV(GPIO78, AF1, MEDIUM) - -/* MMC1 */ -#define MMC1_DAT7_MMC1_DAT7 MFP_CFG_DRV(MMC1_DAT7, AF0, MEDIUM) -#define MMC1_DAT6_MMC1_DAT6 MFP_CFG_DRV(MMC1_DAT6, AF0, MEDIUM) -#define MMC1_DAT5_MMC1_DAT5 MFP_CFG_DRV(MMC1_DAT5, AF0, MEDIUM) -#define MMC1_DAT4_MMC1_DAT4 MFP_CFG_DRV(MMC1_DAT4, AF0, MEDIUM) -#define MMC1_DAT3_MMC1_DAT3 MFP_CFG_DRV(MMC1_DAT3, AF0, MEDIUM) -#define MMC1_DAT2_MMC1_DAT2 MFP_CFG_DRV(MMC1_DAT2, AF0, MEDIUM) -#define MMC1_DAT1_MMC1_DAT1 MFP_CFG_DRV(MMC1_DAT1, AF0, MEDIUM) -#define MMC1_DAT0_MMC1_DAT0 MFP_CFG_DRV(MMC1_DAT0, AF0, MEDIUM) -#define MMC1_CMD_MMC1_CMD MFP_CFG_DRV(MMC1_CMD, AF0, MEDIUM) -#define MMC1_CLK_MMC1_CLK MFP_CFG_DRV(MMC1_CLK, AF0, MEDIUM) -#define MMC1_CD_MMC1_CD MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM) -#define MMC1_WP_MMC1_WP MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM) - -/* PWM */ -#define GPIO27_PWM3_AF2 MFP_CFG(GPIO27, AF2) -#define GPIO51_PWM2_OUT MFP_CFG(GPIO51, AF2) -#define GPIO117_PWM1_OUT MFP_CFG(GPIO117, AF2) -#define GPIO118_PWM2_OUT MFP_CFG(GPIO118, AF2) -#define GPIO119_PWM3_OUT MFP_CFG(GPIO119, AF2) -#define GPIO120_PWM4_OUT MFP_CFG(GPIO120, AF2) - -#endif /* __ASM_MACH MFP_PXA910_H */ diff --git a/arch/arm/mach-mmp/include/mach/mfp.h b/arch/arm/mach-mmp/include/mach/mfp.h deleted file mode 100644 index 62e510e80a58..000000000000 --- a/arch/arm/mach-mmp/include/mach/mfp.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef __ASM_MACH_MFP_H -#define __ASM_MACH_MFP_H - -#include <plat/mfp.h> - -/* - * NOTE: the MFPR register bit definitions on PXA168 processor lines are a - * bit different from those on PXA3xx. Bit [7:10] are now reserved, which - * were SLEEP_OE_N, SLEEP_DATA, SLEEP_SEL and the LSB of DRIVE bits. - * - * To cope with this difference and re-use the pxa3xx mfp code as much as - * possible, we make the following compromise: - * - * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT) - * 2. DRIVE strength definitions redefined to include the reserved bit - * - the reserved bit differs between pxa168 and pxa910, and the - * MFP_DRIVE_* macros are individually defined in mfp-pxa{168,910}.h - * 3. Override MFP_CFG() and MFP_CFG_DRV() - * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X() - */ - -#undef MFP_CFG -#undef MFP_CFG_DRV -#undef MFP_CFG_LPM -#undef MFP_CFG_X -#undef MFP_CFG_DEFAULT - -#define MFP_CFG(pin, af) \ - (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) - -#define MFP_CFG_DRV(pin, af, drv) \ - (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv) - -#endif /* __ASM_MACH_MFP_H */ diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h deleted file mode 100644 index 0764f4ecec82..000000000000 --- a/arch/arm/mach-mmp/include/mach/mmp2.h +++ /dev/null @@ -1,102 +0,0 @@ -#ifndef __ASM_MACH_MMP2_H -#define __ASM_MACH_MMP2_H - -#include <linux/platform_data/pxa_sdhci.h> - -extern void mmp2_timer_init(void); -extern void __init mmp2_init_icu(void); -extern void __init mmp2_init_irq(void); -extern void mmp2_clear_pmic_int(void); - -#include <linux/i2c.h> -#include <linux/i2c/pxa-i2c.h> -#include <mach/devices.h> -#include <linux/platform_data/dma-mmp_tdma.h> - -extern struct pxa_device_desc mmp2_device_uart1; -extern struct pxa_device_desc mmp2_device_uart2; -extern struct pxa_device_desc mmp2_device_uart3; -extern struct pxa_device_desc mmp2_device_uart4; -extern struct pxa_device_desc mmp2_device_twsi1; -extern struct pxa_device_desc mmp2_device_twsi2; -extern struct pxa_device_desc mmp2_device_twsi3; -extern struct pxa_device_desc mmp2_device_twsi4; -extern struct pxa_device_desc mmp2_device_twsi5; -extern struct pxa_device_desc mmp2_device_twsi6; -extern struct pxa_device_desc mmp2_device_sdh0; -extern struct pxa_device_desc mmp2_device_sdh1; -extern struct pxa_device_desc mmp2_device_sdh2; -extern struct pxa_device_desc mmp2_device_sdh3; -extern struct pxa_device_desc mmp2_device_asram; -extern struct pxa_device_desc mmp2_device_isram; - -extern struct platform_device mmp2_device_gpio; - -static inline int mmp2_add_uart(int id) -{ - struct pxa_device_desc *d = NULL; - - switch (id) { - case 1: d = &mmp2_device_uart1; break; - case 2: d = &mmp2_device_uart2; break; - case 3: d = &mmp2_device_uart3; break; - case 4: d = &mmp2_device_uart4; break; - default: - return -EINVAL; - } - - return pxa_register_device(d, NULL, 0); -} - -static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data, - struct i2c_board_info *info, unsigned size) -{ - struct pxa_device_desc *d = NULL; - int ret; - - switch (id) { - case 1: d = &mmp2_device_twsi1; break; - case 2: d = &mmp2_device_twsi2; break; - case 3: d = &mmp2_device_twsi3; break; - case 4: d = &mmp2_device_twsi4; break; - case 5: d = &mmp2_device_twsi5; break; - case 6: d = &mmp2_device_twsi6; break; - default: - return -EINVAL; - } - - ret = i2c_register_board_info(id - 1, info, size); - if (ret) - return ret; - - return pxa_register_device(d, data, sizeof(*data)); -} - -static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data) -{ - struct pxa_device_desc *d = NULL; - - switch (id) { - case 0: d = &mmp2_device_sdh0; break; - case 1: d = &mmp2_device_sdh1; break; - case 2: d = &mmp2_device_sdh2; break; - case 3: d = &mmp2_device_sdh3; break; - default: - return -EINVAL; - } - - return pxa_register_device(d, data, sizeof(*data)); -} - -static inline int mmp2_add_asram(struct sram_platdata *data) -{ - return pxa_register_device(&mmp2_device_asram, data, sizeof(*data)); -} - -static inline int mmp2_add_isram(struct sram_platdata *data) -{ - return pxa_register_device(&mmp2_device_isram, data, sizeof(*data)); -} - -#endif /* __ASM_MACH_MMP2_H */ - diff --git a/arch/arm/mach-mmp/include/mach/pm-mmp2.h b/arch/arm/mach-mmp/include/mach/pm-mmp2.h deleted file mode 100644 index 98bd66ce8006..000000000000 --- a/arch/arm/mach-mmp/include/mach/pm-mmp2.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * MMP2 Power Management Routines - * - * This software program is licensed subject to the GNU General Public License - * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html - * - * (C) Copyright 2010 Marvell International Ltd. - * All Rights Reserved - */ - -#ifndef __MMP2_PM_H__ -#define __MMP2_PM_H__ - -#include <mach/addr-map.h> - -#define APMU_PJ_IDLE_CFG APMU_REG(0x018) -#define APMU_PJ_IDLE_CFG_PJ_IDLE (1 << 1) -#define APMU_PJ_IDLE_CFG_PJ_PWRDWN (1 << 5) -#define APMU_PJ_IDLE_CFG_PWR_SW(x) ((x) << 16) -#define APMU_PJ_IDLE_CFG_L2_PWR_SW (1 << 19) -#define APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK (3 << 28) - -#define APMU_SRAM_PWR_DWN APMU_REG(0x08c) - -#define MPMU_SCCR MPMU_REG(0x038) -#define MPMU_PCR_PJ MPMU_REG(0x1000) -#define MPMU_PCR_PJ_AXISD (1 << 31) -#define MPMU_PCR_PJ_SLPEN (1 << 29) -#define MPMU_PCR_PJ_SPSD (1 << 28) -#define MPMU_PCR_PJ_DDRCORSD (1 << 27) -#define MPMU_PCR_PJ_APBSD (1 << 26) -#define MPMU_PCR_PJ_INTCLR (1 << 24) -#define MPMU_PCR_PJ_SLPWP0 (1 << 23) -#define MPMU_PCR_PJ_SLPWP1 (1 << 22) -#define MPMU_PCR_PJ_SLPWP2 (1 << 21) -#define MPMU_PCR_PJ_SLPWP3 (1 << 20) -#define MPMU_PCR_PJ_VCTCXOSD (1 << 19) -#define MPMU_PCR_PJ_SLPWP4 (1 << 18) -#define MPMU_PCR_PJ_SLPWP5 (1 << 17) -#define MPMU_PCR_PJ_SLPWP6 (1 << 16) -#define MPMU_PCR_PJ_SLPWP7 (1 << 15) - -#define MPMU_PLL2_CTRL1 MPMU_REG(0x0414) -#define MPMU_CGR_PJ MPMU_REG(0x1024) -#define MPMU_WUCRM_PJ MPMU_REG(0x104c) -#define MPMU_WUCRM_PJ_WAKEUP(x) (1 << (x)) -#define MPMU_WUCRM_PJ_RTC_ALARM (1 << 17) - -enum { - POWER_MODE_ACTIVE = 0, - POWER_MODE_CORE_INTIDLE, - POWER_MODE_CORE_EXTIDLE, - POWER_MODE_APPS_IDLE, - POWER_MODE_APPS_SLEEP, - POWER_MODE_CHIP_SLEEP, - POWER_MODE_SYS_SLEEP, -}; - -extern void mmp2_pm_enter_lowpower_mode(int state); -extern int mmp2_set_wake(struct irq_data *d, unsigned int on); -#endif diff --git a/arch/arm/mach-mmp/include/mach/pm-pxa910.h b/arch/arm/mach-mmp/include/mach/pm-pxa910.h deleted file mode 100644 index 8cac8ab5253d..000000000000 --- a/arch/arm/mach-mmp/include/mach/pm-pxa910.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * PXA910 Power Management Routines - * - * This software program is licensed subject to the GNU General Public License - * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html - * - * (C) Copyright 2009 Marvell International Ltd. - * All Rights Reserved - */ - -#ifndef __PXA910_PM_H__ -#define __PXA910_PM_H__ - -#define APMU_MOH_IDLE_CFG APMU_REG(0x0018) -#define APMU_MOH_IDLE_CFG_MOH_IDLE (1 << 1) -#define APMU_MOH_IDLE_CFG_MOH_PWRDWN (1 << 5) -#define APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN (1 << 6) -#define APMU_MOH_IDLE_CFG_MOH_PWR_SW(x) (((x) & 0x3) << 16) -#define APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(x) (((x) & 0x3) << 18) -#define APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ (1 << 21) -#define APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN (1 << 20) - -#define APMU_SQU_CLK_GATE_CTRL APMU_REG(0x001c) -#define APMU_MC_HW_SLP_TYPE APMU_REG(0x00b0) - -#define MPMU_FCCR MPMU_REG(0x0008) -#define MPMU_APCR MPMU_REG(0x1000) -#define MPMU_APCR_AXISD (1 << 31) -#define MPMU_APCR_DSPSD (1 << 30) -#define MPMU_APCR_SLPEN (1 << 29) -#define MPMU_APCR_DTCMSD (1 << 28) -#define MPMU_APCR_DDRCORSD (1 << 27) -#define MPMU_APCR_APBSD (1 << 26) -#define MPMU_APCR_BBSD (1 << 25) -#define MPMU_APCR_SLPWP0 (1 << 23) -#define MPMU_APCR_SLPWP1 (1 << 22) -#define MPMU_APCR_SLPWP2 (1 << 21) -#define MPMU_APCR_SLPWP3 (1 << 20) -#define MPMU_APCR_VCTCXOSD (1 << 19) -#define MPMU_APCR_SLPWP4 (1 << 18) -#define MPMU_APCR_SLPWP5 (1 << 17) -#define MPMU_APCR_SLPWP6 (1 << 16) -#define MPMU_APCR_SLPWP7 (1 << 15) -#define MPMU_APCR_MSASLPEN (1 << 14) -#define MPMU_APCR_STBYEN (1 << 13) - -#define MPMU_AWUCRM MPMU_REG(0x104c) -#define MPMU_AWUCRM_AP_ASYNC_INT (1 << 25) -#define MPMU_AWUCRM_AP_FULL_IDLE (1 << 24) -#define MPMU_AWUCRM_SDH1 (1 << 23) -#define MPMU_AWUCRM_SDH2 (1 << 22) -#define MPMU_AWUCRM_KEYPRESS (1 << 21) -#define MPMU_AWUCRM_TRACKBALL (1 << 20) -#define MPMU_AWUCRM_NEWROTARY (1 << 19) -#define MPMU_AWUCRM_RTC_ALARM (1 << 17) -#define MPMU_AWUCRM_AP2_TIMER_3 (1 << 13) -#define MPMU_AWUCRM_AP2_TIMER_2 (1 << 12) -#define MPMU_AWUCRM_AP2_TIMER_1 (1 << 11) -#define MPMU_AWUCRM_AP1_TIMER_3 (1 << 10) -#define MPMU_AWUCRM_AP1_TIMER_2 (1 << 9) -#define MPMU_AWUCRM_AP1_TIMER_1 (1 << 8) -#define MPMU_AWUCRM_WAKEUP(x) (1 << ((x) & 0x7)) - -enum { - POWER_MODE_ACTIVE = 0, - POWER_MODE_CORE_INTIDLE, - POWER_MODE_CORE_EXTIDLE, - POWER_MODE_APPS_IDLE, - POWER_MODE_APPS_SLEEP, - POWER_MODE_SYS_SLEEP, - POWER_MODE_HIBERNATE, - POWER_MODE_UDR, -}; - -extern int pxa910_set_wake(struct irq_data *data, unsigned int on); - -#endif diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h deleted file mode 100644 index a83ba7cb525d..000000000000 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ /dev/null @@ -1,137 +0,0 @@ -#ifndef __ASM_MACH_PXA168_H -#define __ASM_MACH_PXA168_H - -#include <linux/reboot.h> - -extern void pxa168_timer_init(void); -extern void __init icu_init_irq(void); -extern void __init pxa168_init_irq(void); -extern void pxa168_restart(enum reboot_mode, const char *); -extern void pxa168_clear_keypad_wakeup(void); - -#include <linux/i2c.h> -#include <linux/i2c/pxa-i2c.h> -#include <mach/devices.h> -#include <linux/platform_data/mtd-nand-pxa3xx.h> -#include <video/pxa168fb.h> -#include <linux/platform_data/keypad-pxa27x.h> -#include <mach/cputype.h> -#include <linux/pxa168_eth.h> -#include <linux/platform_data/mv_usb.h> - -extern struct pxa_device_desc pxa168_device_uart1; -extern struct pxa_device_desc pxa168_device_uart2; -extern struct pxa_device_desc pxa168_device_uart3; -extern struct pxa_device_desc pxa168_device_twsi0; -extern struct pxa_device_desc pxa168_device_twsi1; -extern struct pxa_device_desc pxa168_device_pwm1; -extern struct pxa_device_desc pxa168_device_pwm2; -extern struct pxa_device_desc pxa168_device_pwm3; -extern struct pxa_device_desc pxa168_device_pwm4; -extern struct pxa_device_desc pxa168_device_ssp1; -extern struct pxa_device_desc pxa168_device_ssp2; -extern struct pxa_device_desc pxa168_device_ssp3; -extern struct pxa_device_desc pxa168_device_ssp4; -extern struct pxa_device_desc pxa168_device_ssp5; -extern struct pxa_device_desc pxa168_device_nand; -extern struct pxa_device_desc pxa168_device_fb; -extern struct pxa_device_desc pxa168_device_keypad; -extern struct pxa_device_desc pxa168_device_eth; - -/* pdata can be NULL */ -extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata); - - -extern struct platform_device pxa168_device_gpio; - -static inline int pxa168_add_uart(int id) -{ - struct pxa_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa168_device_uart1; break; - case 2: d = &pxa168_device_uart2; break; - case 3: d = &pxa168_device_uart3; break; - } - - if (d == NULL) - return -EINVAL; - - return pxa_register_device(d, NULL, 0); -} - -static inline int pxa168_add_twsi(int id, struct i2c_pxa_platform_data *data, - struct i2c_board_info *info, unsigned size) -{ - struct pxa_device_desc *d = NULL; - int ret; - - switch (id) { - case 0: d = &pxa168_device_twsi0; break; - case 1: d = &pxa168_device_twsi1; break; - default: - return -EINVAL; - } - - ret = i2c_register_board_info(id, info, size); - if (ret) - return ret; - - return pxa_register_device(d, data, sizeof(*data)); -} - -static inline int pxa168_add_pwm(int id) -{ - struct pxa_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa168_device_pwm1; break; - case 2: d = &pxa168_device_pwm2; break; - case 3: d = &pxa168_device_pwm3; break; - case 4: d = &pxa168_device_pwm4; break; - default: - return -EINVAL; - } - - return pxa_register_device(d, NULL, 0); -} - -static inline int pxa168_add_ssp(int id) -{ - struct pxa_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa168_device_ssp1; break; - case 2: d = &pxa168_device_ssp2; break; - case 3: d = &pxa168_device_ssp3; break; - case 4: d = &pxa168_device_ssp4; break; - case 5: d = &pxa168_device_ssp5; break; - default: - return -EINVAL; - } - return pxa_register_device(d, NULL, 0); -} - -static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info) -{ - return pxa_register_device(&pxa168_device_nand, info, sizeof(*info)); -} - -static inline int pxa168_add_fb(struct pxa168fb_mach_info *mi) -{ - return pxa_register_device(&pxa168_device_fb, mi, sizeof(*mi)); -} - -static inline int pxa168_add_keypad(struct pxa27x_keypad_platform_data *data) -{ - if (cpu_is_pxa168()) - data->clear_wakeup_event = pxa168_clear_keypad_wakeup; - - return pxa_register_device(&pxa168_device_keypad, data, sizeof(*data)); -} - -static inline int pxa168_add_eth(struct pxa168_eth_platform_data *data) -{ - return pxa_register_device(&pxa168_device_eth, data, sizeof(*data)); -} -#endif /* __ASM_MACH_PXA168_H */ diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h deleted file mode 100644 index 92253203f5b4..000000000000 --- a/arch/arm/mach-mmp/include/mach/pxa910.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef __ASM_MACH_PXA910_H -#define __ASM_MACH_PXA910_H - -extern void pxa910_timer_init(void); -extern void __init icu_init_irq(void); -extern void __init pxa910_init_irq(void); - -#include <linux/i2c.h> -#include <linux/i2c/pxa-i2c.h> -#include <mach/devices.h> -#include <linux/platform_data/mtd-nand-pxa3xx.h> -#include <video/mmp_disp.h> - -extern struct pxa_device_desc pxa910_device_uart1; -extern struct pxa_device_desc pxa910_device_uart2; -extern struct pxa_device_desc pxa910_device_twsi0; -extern struct pxa_device_desc pxa910_device_twsi1; -extern struct pxa_device_desc pxa910_device_pwm1; -extern struct pxa_device_desc pxa910_device_pwm2; -extern struct pxa_device_desc pxa910_device_pwm3; -extern struct pxa_device_desc pxa910_device_pwm4; -extern struct pxa_device_desc pxa910_device_nand; -extern struct platform_device pxa168_device_u2o; -extern struct platform_device pxa168_device_u2ootg; -extern struct platform_device pxa168_device_u2oehci; -extern struct pxa_device_desc pxa910_device_disp; -extern struct pxa_device_desc pxa910_device_fb; -extern struct pxa_device_desc pxa910_device_panel; -extern struct platform_device pxa910_device_gpio; -extern struct platform_device pxa910_device_rtc; - -static inline int pxa910_add_uart(int id) -{ - struct pxa_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa910_device_uart1; break; - case 2: d = &pxa910_device_uart2; break; - } - - if (d == NULL) - return -EINVAL; - - return pxa_register_device(d, NULL, 0); -} - -static inline int pxa910_add_twsi(int id, struct i2c_pxa_platform_data *data, - struct i2c_board_info *info, unsigned size) -{ - struct pxa_device_desc *d = NULL; - int ret; - - switch (id) { - case 0: d = &pxa910_device_twsi0; break; - case 1: d = &pxa910_device_twsi1; break; - default: - return -EINVAL; - } - - ret = i2c_register_board_info(id, info, size); - if (ret) - return ret; - - return pxa_register_device(d, data, sizeof(*data)); -} - -static inline int pxa910_add_pwm(int id) -{ - struct pxa_device_desc *d = NULL; - - switch (id) { - case 1: d = &pxa910_device_pwm1; break; - case 2: d = &pxa910_device_pwm2; break; - case 3: d = &pxa910_device_pwm3; break; - case 4: d = &pxa910_device_pwm4; break; - default: - return -EINVAL; - } - - return pxa_register_device(d, NULL, 0); -} - -static inline int pxa910_add_nand(struct pxa3xx_nand_platform_data *info) -{ - return pxa_register_device(&pxa910_device_nand, info, sizeof(*info)); -} -#endif /* __ASM_MACH_PXA910_H */ diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h deleted file mode 100644 index ddc812f40341..000000000000 --- a/arch/arm/mach-mmp/include/mach/regs-apbc.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/regs-apbc.h - * - * Application Peripheral Bus Clock Unit - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_REGS_APBC_H -#define __ASM_MACH_REGS_APBC_H - -#include <mach/addr-map.h> - -/* Common APB clock register bit definitions */ -#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */ -#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */ -#define APBC_RST (1 << 2) /* Reset Generation */ - -/* Functional Clock Selection Mask */ -#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4) - -#endif /* __ASM_MACH_REGS_APBC_H */ diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h deleted file mode 100644 index 93c8d0e29bb9..000000000000 --- a/arch/arm/mach-mmp/include/mach/regs-apmu.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/regs-apmu.h - * - * Application Subsystem Power Management Unit - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_REGS_APMU_H -#define __ASM_MACH_REGS_APMU_H - -#include <mach/addr-map.h> - -#define APMU_FNCLK_EN (1 << 4) -#define APMU_AXICLK_EN (1 << 3) -#define APMU_FNRST_DIS (1 << 1) -#define APMU_AXIRST_DIS (1 << 0) - -/* Wake Clear Register */ -#define APMU_WAKE_CLR APMU_REG(0x07c) - -#define APMU_PXA168_KP_WAKE_CLR (1 << 7) -#define APMU_PXA168_CFI_WAKE_CLR (1 << 6) -#define APMU_PXA168_XD_WAKE_CLR (1 << 5) -#define APMU_PXA168_MSP_WAKE_CLR (1 << 4) -#define APMU_PXA168_SD4_WAKE_CLR (1 << 3) -#define APMU_PXA168_SD3_WAKE_CLR (1 << 2) -#define APMU_PXA168_SD2_WAKE_CLR (1 << 1) -#define APMU_PXA168_SD1_WAKE_CLR (1 << 0) - -#endif /* __ASM_MACH_REGS_APMU_H */ diff --git a/arch/arm/mach-mmp/include/mach/regs-icu.h b/arch/arm/mach-mmp/include/mach/regs-icu.h deleted file mode 100644 index f882d91894be..000000000000 --- a/arch/arm/mach-mmp/include/mach/regs-icu.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/regs-icu.h - * - * Interrupt Control Unit - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_ICU_H -#define __ASM_MACH_ICU_H - -#include <mach/addr-map.h> - -#define ICU_VIRT_BASE (AXI_VIRT_BASE + 0x82000) -#define ICU_REG(x) (ICU_VIRT_BASE + (x)) - -#define ICU_INT_CONF(n) ICU_REG((n) << 2) -#define ICU_INT_CONF_MASK (0xf) - -/************ PXA168/PXA910 (MMP) *********************/ -#define ICU_INT_CONF_AP_INT (1 << 6) -#define ICU_INT_CONF_CP_INT (1 << 5) -#define ICU_INT_CONF_IRQ (1 << 4) - -#define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */ -#define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */ -#define ICU_AP_GBL_IRQ_MSK ICU_REG(0x114) /* AP Global Interrupt Mask */ -#define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */ -#define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */ - -/************************** MMP2 ***********************/ - -/* - * IRQ0/FIQ0 is routed to SP IRQ/FIQ. - * IRQ1 is routed to PJ4 IRQ, and IRQ2 is routes to PJ4 FIQ. - */ -#define ICU_INT_ROUTE_SP_IRQ (1 << 4) -#define ICU_INT_ROUTE_PJ4_IRQ (1 << 5) -#define ICU_INT_ROUTE_PJ4_FIQ (1 << 6) - -#define MMP2_ICU_PJ4_IRQ_STATUS0 ICU_REG(0x138) -#define MMP2_ICU_PJ4_IRQ_STATUS1 ICU_REG(0x13c) -#define MMP2_ICU_PJ4_FIQ_STATUS0 ICU_REG(0x140) -#define MMP2_ICU_PJ4_FIQ_STATUS1 ICU_REG(0x144) - -#define MMP2_ICU_INT4_STATUS ICU_REG(0x150) -#define MMP2_ICU_INT5_STATUS ICU_REG(0x154) -#define MMP2_ICU_INT17_STATUS ICU_REG(0x158) -#define MMP2_ICU_INT35_STATUS ICU_REG(0x15c) -#define MMP2_ICU_INT51_STATUS ICU_REG(0x160) - -#define MMP2_ICU_INT4_MASK ICU_REG(0x168) -#define MMP2_ICU_INT5_MASK ICU_REG(0x16C) -#define MMP2_ICU_INT17_MASK ICU_REG(0x170) -#define MMP2_ICU_INT35_MASK ICU_REG(0x174) -#define MMP2_ICU_INT51_MASK ICU_REG(0x178) - -#define MMP2_ICU_SP_IRQ_SEL ICU_REG(0x100) -#define MMP2_ICU_PJ4_IRQ_SEL ICU_REG(0x104) -#define MMP2_ICU_PJ4_FIQ_SEL ICU_REG(0x108) - -#define MMP2_ICU_INVERT ICU_REG(0x164) - -#define MMP2_ICU_INV_PMIC (1 << 0) -#define MMP2_ICU_INV_PERF (1 << 1) -#define MMP2_ICU_INV_COMMTX (1 << 2) -#define MMP2_ICU_INV_COMMRX (1 << 3) - -#endif /* __ASM_MACH_ICU_H */ diff --git a/arch/arm/mach-mmp/include/mach/regs-smc.h b/arch/arm/mach-mmp/include/mach/regs-smc.h deleted file mode 100644 index e484d40d71bd..000000000000 --- a/arch/arm/mach-mmp/include/mach/regs-smc.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/regs-smc.h - * - * Static Memory Controller Registers - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_REGS_SMC_H -#define __ASM_MACH_REGS_SMC_H - -#include <mach/addr-map.h> - -#define SMC_VIRT_BASE (AXI_VIRT_BASE + 0x83800) -#define SMC_REG(x) (SMC_VIRT_BASE + (x)) - -#define SMC_MSC0 SMC_REG(0x0020) -#define SMC_MSC1 SMC_REG(0x0024) -#define SMC_SXCNFG0 SMC_REG(0x0030) -#define SMC_SXCNFG1 SMC_REG(0x0034) -#define SMC_MEMCLKCFG SMC_REG(0x0068) -#define SMC_CSDFICFG0 SMC_REG(0x0090) -#define SMC_CSDFICFG1 SMC_REG(0x0094) -#define SMC_CLK_RET_DEL SMC_REG(0x00b0) -#define SMC_ADV_RET_DEL SMC_REG(0x00b4) -#define SMC_CSADRMAP0 SMC_REG(0x00c0) -#define SMC_CSADRMAP1 SMC_REG(0x00c4) -#define SMC_WE_AP0 SMC_REG(0x00e0) -#define SMC_WE_AP1 SMC_REG(0x00e4) -#define SMC_OE_AP0 SMC_REG(0x00f0) -#define SMC_OE_AP1 SMC_REG(0x00f4) -#define SMC_ADV_AP0 SMC_REG(0x0100) -#define SMC_ADV_AP1 SMC_REG(0x0104) - -#endif /* __ASM_MACH_REGS_SMC_H */ diff --git a/arch/arm/mach-mmp/include/mach/regs-timers.h b/arch/arm/mach-mmp/include/mach/regs-timers.h deleted file mode 100644 index 45589fec9fc7..000000000000 --- a/arch/arm/mach-mmp/include/mach/regs-timers.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/regs-timers.h - * - * Timers Module - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_REGS_TIMERS_H -#define __ASM_MACH_REGS_TIMERS_H - -#include <mach/addr-map.h> - -#define TIMERS1_VIRT_BASE (APB_VIRT_BASE + 0x14000) -#define TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x16000) - -#define TMR_CCR (0x0000) -#define TMR_TN_MM(n, m) (0x0004 + ((n) << 3) + (((n) + (m)) << 2)) -#define TMR_CR(n) (0x0028 + ((n) << 2)) -#define TMR_SR(n) (0x0034 + ((n) << 2)) -#define TMR_IER(n) (0x0040 + ((n) << 2)) -#define TMR_PLVR(n) (0x004c + ((n) << 2)) -#define TMR_PLCR(n) (0x0058 + ((n) << 2)) -#define TMR_WMER (0x0064) -#define TMR_WMR (0x0068) -#define TMR_WVR (0x006c) -#define TMR_WSR (0x0070) -#define TMR_ICR(n) (0x0074 + ((n) << 2)) -#define TMR_WICR (0x0080) -#define TMR_CER (0x0084) -#define TMR_CMR (0x0088) -#define TMR_ILR(n) (0x008c + ((n) << 2)) -#define TMR_WCR (0x0098) -#define TMR_WFAR (0x009c) -#define TMR_WSAR (0x00A0) -#define TMR_CVWR(n) (0x00A4 + ((n) << 2)) - -#define TMR_CCR_CS_0(x) (((x) & 0x3) << 0) -#define TMR_CCR_CS_1(x) (((x) & 0x7) << 2) -#define TMR_CCR_CS_2(x) (((x) & 0x3) << 5) - -#endif /* __ASM_MACH_REGS_TIMERS_H */ diff --git a/arch/arm/mach-mmp/include/mach/regs-usb.h b/arch/arm/mach-mmp/include/mach/regs-usb.h deleted file mode 100644 index b047bf487506..000000000000 --- a/arch/arm/mach-mmp/include/mach/regs-usb.h +++ /dev/null @@ -1,253 +0,0 @@ -/* - * Copyright (C) 2011 Marvell International Ltd. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_ARCH_REGS_USB_H -#define __ASM_ARCH_REGS_USB_H - -#define PXA168_U2O_REGBASE (0xd4208000) -#define PXA168_U2O_PHYBASE (0xd4207000) - -#define PXA168_U2H_REGBASE (0xd4209000) -#define PXA168_U2H_PHYBASE (0xd4206000) - -#define MMP3_HSIC1_REGBASE (0xf0001000) -#define MMP3_HSIC1_PHYBASE (0xf0001800) - -#define MMP3_HSIC2_REGBASE (0xf0002000) -#define MMP3_HSIC2_PHYBASE (0xf0002800) - -#define MMP3_FSIC_REGBASE (0xf0003000) -#define MMP3_FSIC_PHYBASE (0xf0003800) - - -#define USB_REG_RANGE (0x1ff) -#define USB_PHY_RANGE (0xff) - -/* registers */ -#define U2x_CAPREGS_OFFSET 0x100 - -/* phy regs */ -#define UTMI_REVISION 0x0 -#define UTMI_CTRL 0x4 -#define UTMI_PLL 0x8 -#define UTMI_TX 0xc -#define UTMI_RX 0x10 -#define UTMI_IVREF 0x14 -#define UTMI_T0 0x18 -#define UTMI_T1 0x1c -#define UTMI_T2 0x20 -#define UTMI_T3 0x24 -#define UTMI_T4 0x28 -#define UTMI_T5 0x2c -#define UTMI_RESERVE 0x30 -#define UTMI_USB_INT 0x34 -#define UTMI_DBG_CTL 0x38 -#define UTMI_OTG_ADDON 0x3c - -/* For UTMICTRL Register */ -#define UTMI_CTRL_USB_CLK_EN (1 << 31) -/* pxa168 */ -#define UTMI_CTRL_SUSPEND_SET1 (1 << 30) -#define UTMI_CTRL_SUSPEND_SET2 (1 << 29) -#define UTMI_CTRL_RXBUF_PDWN (1 << 24) -#define UTMI_CTRL_TXBUF_PDWN (1 << 11) - -#define UTMI_CTRL_INPKT_DELAY_SHIFT 30 -#define UTMI_CTRL_INPKT_DELAY_SOF_SHIFT 28 -#define UTMI_CTRL_PU_REF_SHIFT 20 -#define UTMI_CTRL_ARC_PULLDN_SHIFT 12 -#define UTMI_CTRL_PLL_PWR_UP_SHIFT 1 -#define UTMI_CTRL_PWR_UP_SHIFT 0 - -/* For UTMI_PLL Register */ -#define UTMI_PLL_PLLCALI12_SHIFT 29 -#define UTMI_PLL_PLLCALI12_MASK (0x3 << 29) - -#define UTMI_PLL_PLLVDD18_SHIFT 27 -#define UTMI_PLL_PLLVDD18_MASK (0x3 << 27) - -#define UTMI_PLL_PLLVDD12_SHIFT 25 -#define UTMI_PLL_PLLVDD12_MASK (0x3 << 25) - -#define UTMI_PLL_CLK_BLK_EN_SHIFT 24 -#define CLK_BLK_EN (0x1 << 24) -#define PLL_READY (0x1 << 23) -#define KVCO_EXT (0x1 << 22) -#define VCOCAL_START (0x1 << 21) - -#define UTMI_PLL_KVCO_SHIFT 15 -#define UTMI_PLL_KVCO_MASK (0x7 << 15) - -#define UTMI_PLL_ICP_SHIFT 12 -#define UTMI_PLL_ICP_MASK (0x7 << 12) - -#define UTMI_PLL_FBDIV_SHIFT 4 -#define UTMI_PLL_FBDIV_MASK (0xFF << 4) - -#define UTMI_PLL_REFDIV_SHIFT 0 -#define UTMI_PLL_REFDIV_MASK (0xF << 0) - -/* For UTMI_TX Register */ -#define UTMI_TX_REG_EXT_FS_RCAL_SHIFT 27 -#define UTMI_TX_REG_EXT_FS_RCAL_MASK (0xf << 27) - -#define UTMI_TX_REG_EXT_FS_RCAL_EN_SHIFT 26 -#define UTMI_TX_REG_EXT_FS_RCAL_EN_MASK (0x1 << 26) - -#define UTMI_TX_TXVDD12_SHIFT 22 -#define UTMI_TX_TXVDD12_MASK (0x3 << 22) - -#define UTMI_TX_CK60_PHSEL_SHIFT 17 -#define UTMI_TX_CK60_PHSEL_MASK (0xf << 17) - -#define UTMI_TX_IMPCAL_VTH_SHIFT 14 -#define UTMI_TX_IMPCAL_VTH_MASK (0x7 << 14) - -#define REG_RCAL_START (0x1 << 12) - -#define UTMI_TX_LOW_VDD_EN_SHIFT 11 - -#define UTMI_TX_AMP_SHIFT 0 -#define UTMI_TX_AMP_MASK (0x7 << 0) - -/* For UTMI_RX Register */ -#define UTMI_REG_SQ_LENGTH_SHIFT 15 -#define UTMI_REG_SQ_LENGTH_MASK (0x3 << 15) - -#define UTMI_RX_SQ_THRESH_SHIFT 4 -#define UTMI_RX_SQ_THRESH_MASK (0xf << 4) - -#define UTMI_OTG_ADDON_OTG_ON (1 << 0) - -/* For MMP3 USB Phy */ -#define USB2_PLL_REG0 0x4 -#define USB2_PLL_REG1 0x8 -#define USB2_TX_REG0 0x10 -#define USB2_TX_REG1 0x14 -#define USB2_TX_REG2 0x18 -#define USB2_RX_REG0 0x20 -#define USB2_RX_REG1 0x24 -#define USB2_RX_REG2 0x28 -#define USB2_ANA_REG0 0x30 -#define USB2_ANA_REG1 0x34 -#define USB2_ANA_REG2 0x38 -#define USB2_DIG_REG0 0x3C -#define USB2_DIG_REG1 0x40 -#define USB2_DIG_REG2 0x44 -#define USB2_DIG_REG3 0x48 -#define USB2_TEST_REG0 0x4C -#define USB2_TEST_REG1 0x50 -#define USB2_TEST_REG2 0x54 -#define USB2_CHARGER_REG0 0x58 -#define USB2_OTG_REG0 0x5C -#define USB2_PHY_MON0 0x60 -#define USB2_RESETVE_REG0 0x64 -#define USB2_ICID_REG0 0x78 -#define USB2_ICID_REG1 0x7C - -/* USB2_PLL_REG0 */ -/* This is for Ax stepping */ -#define USB2_PLL_FBDIV_SHIFT_MMP3 0 -#define USB2_PLL_FBDIV_MASK_MMP3 (0xFF << 0) - -#define USB2_PLL_REFDIV_SHIFT_MMP3 8 -#define USB2_PLL_REFDIV_MASK_MMP3 (0xF << 8) - -#define USB2_PLL_VDD12_SHIFT_MMP3 12 -#define USB2_PLL_VDD18_SHIFT_MMP3 14 - -/* This is for B0 stepping */ -#define USB2_PLL_FBDIV_SHIFT_MMP3_B0 0 -#define USB2_PLL_REFDIV_SHIFT_MMP3_B0 9 -#define USB2_PLL_VDD18_SHIFT_MMP3_B0 14 -#define USB2_PLL_FBDIV_MASK_MMP3_B0 0x01FF -#define USB2_PLL_REFDIV_MASK_MMP3_B0 0x3E00 - -#define USB2_PLL_CAL12_SHIFT_MMP3 0 -#define USB2_PLL_CALI12_MASK_MMP3 (0x3 << 0) - -#define USB2_PLL_VCOCAL_START_SHIFT_MMP3 2 - -#define USB2_PLL_KVCO_SHIFT_MMP3 4 -#define USB2_PLL_KVCO_MASK_MMP3 (0x7<<4) - -#define USB2_PLL_ICP_SHIFT_MMP3 8 -#define USB2_PLL_ICP_MASK_MMP3 (0x7<<8) - -#define USB2_PLL_LOCK_BYPASS_SHIFT_MMP3 12 - -#define USB2_PLL_PU_PLL_SHIFT_MMP3 13 -#define USB2_PLL_PU_PLL_MASK (0x1 << 13) - -#define USB2_PLL_READY_MASK_MMP3 (0x1 << 15) - -/* USB2_TX_REG0 */ -#define USB2_TX_IMPCAL_VTH_SHIFT_MMP3 8 -#define USB2_TX_IMPCAL_VTH_MASK_MMP3 (0x7 << 8) - -#define USB2_TX_RCAL_START_SHIFT_MMP3 13 - -/* USB2_TX_REG1 */ -#define USB2_TX_CK60_PHSEL_SHIFT_MMP3 0 -#define USB2_TX_CK60_PHSEL_MASK_MMP3 (0xf << 0) - -#define USB2_TX_AMP_SHIFT_MMP3 4 -#define USB2_TX_AMP_MASK_MMP3 (0x7 << 4) - -#define USB2_TX_VDD12_SHIFT_MMP3 8 -#define USB2_TX_VDD12_MASK_MMP3 (0x3 << 8) - -/* USB2_TX_REG2 */ -#define USB2_TX_DRV_SLEWRATE_SHIFT 10 - -/* USB2_RX_REG0 */ -#define USB2_RX_SQ_THRESH_SHIFT_MMP3 4 -#define USB2_RX_SQ_THRESH_MASK_MMP3 (0xf << 4) - -#define USB2_RX_SQ_LENGTH_SHIFT_MMP3 10 -#define USB2_RX_SQ_LENGTH_MASK_MMP3 (0x3 << 10) - -/* USB2_ANA_REG1*/ -#define USB2_ANA_PU_ANA_SHIFT_MMP3 14 - -/* USB2_OTG_REG0 */ -#define USB2_OTG_PU_OTG_SHIFT_MMP3 3 - -/* fsic registers */ -#define FSIC_MISC 0x4 -#define FSIC_INT 0x28 -#define FSIC_CTRL 0x30 - -/* HSIC registers */ -#define HSIC_PAD_CTRL 0x4 - -#define HSIC_CTRL 0x8 -#define HSIC_CTRL_HSIC_ENABLE (1<<7) -#define HSIC_CTRL_PLL_BYPASS (1<<4) - -#define TEST_GRP_0 0xc -#define TEST_GRP_1 0x10 - -#define HSIC_INT 0x14 -#define HSIC_INT_READY_INT_EN (1<<10) -#define HSIC_INT_CONNECT_INT_EN (1<<9) -#define HSIC_INT_CORE_INT_EN (1<<8) -#define HSIC_INT_HS_READY (1<<2) -#define HSIC_INT_CONNECT (1<<1) -#define HSIC_INT_CORE (1<<0) - -#define HSIC_CONFIG 0x18 -#define USBHSIC_CTRL 0x20 - -#define HSIC_USB_CTRL 0x28 -#define HSIC_USB_CTRL_CLKEN 1 -#define HSIC_USB_CLK_PHY 0x0 -#define HSIC_USB_CLK_PMU 0x1 - -#endif /* __ASM_ARCH_PXA_U2O_H */ diff --git a/arch/arm/mach-mmp/include/mach/teton_bga.h b/arch/arm/mach-mmp/include/mach/teton_bga.h deleted file mode 100644 index 61a539b2cc98..000000000000 --- a/arch/arm/mach-mmp/include/mach/teton_bga.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/teton_bga.h - * - * Support for the Marvell PXA168 Teton BGA Development Platform. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * publishhed by the Free Software Foundation. - */ -#ifndef __ASM_MACH_TETON_BGA_H -#define __ASM_MACH_TETON_BGA_H - -/* GPIOs */ -#define MMC_PWENA_GPIO 27 -#define USBHPENB_GPIO 55 -#define RTC_INT_GPIO 78 -#define LCD_VBLK_EN_GPIO 79 -#define LCD_DVDD_EN_GPIO 80 -#define RST_WIFI_GPIO 81 -#define CF_PWEN_GPIO 82 -#define USB_OC_GPIO 83 -#define PWM_GPIO 84 -#define USBHPENA_GPIO 85 -#define TS_INT_GPIO 86 -#define CIR_GPIO 108 - -#endif /* __ASM_MACH_TETON_BGA_H */ diff --git a/arch/arm/mach-mmp/include/mach/uncompress.h b/arch/arm/mach-mmp/include/mach/uncompress.h deleted file mode 100644 index 8890fa8fa771..000000000000 --- a/arch/arm/mach-mmp/include/mach/uncompress.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * arch/arm/mach-mmp/include/mach/uncompress.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/serial_reg.h> -#include <mach/addr-map.h> -#include <asm/mach-types.h> - -#define UART1_BASE (APB_PHYS_BASE + 0x36000) -#define UART2_BASE (APB_PHYS_BASE + 0x17000) -#define UART3_BASE (APB_PHYS_BASE + 0x18000) - -volatile unsigned long *UART; - -static inline void putc(char c) -{ - /* UART enabled? */ - if (!(UART[UART_IER] & UART_IER_UUE)) - return; - - while (!(UART[UART_LSR] & UART_LSR_THRE)) - barrier(); - - UART[UART_TX] = c; -} - -/* - * This does not append a newline - */ -static inline void flush(void) -{ -} - -static inline void arch_decomp_setup(void) -{ - /* default to UART2 */ - UART = (unsigned long *)UART2_BASE; - - if (machine_is_avengers_lite()) - UART = (unsigned long *)UART3_BASE; -} |