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-rw-r--r--arch/arm/mach-msm/board-msm8960.c2
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c2
-rw-r--r--arch/arm/mach-msm/board-trout-gpio.c10
-rw-r--r--arch/arm/mach-msm/board-trout-mmc.c2
-rw-r--r--arch/arm/mach-msm/gpio-v2.c49
-rw-r--r--arch/arm/mach-msm/gpio.c18
-rw-r--r--arch/arm/mach-msm/irq-vic.c7
-rw-r--r--arch/arm/mach-msm/irq.c7
-rw-r--r--arch/arm/mach-msm/sirc.c11
9 files changed, 53 insertions, 55 deletions
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 1993721d472e..35c7ceeb3f29 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -53,7 +53,7 @@ static void __init msm8960_init_irq(void)
*/
for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
- set_irq_handler(i, handle_percpu_irq);
+ irq_set_handler(i, handle_percpu_irq);
}
}
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index b3c55f138fce..1163b6fd05d2 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -56,7 +56,7 @@ static void __init msm8x60_init_irq(void)
*/
for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
- set_irq_handler(i, handle_percpu_irq);
+ irq_set_handler(i, handle_percpu_irq);
}
}
diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c
index 31117a4499c4..87e1d01edecc 100644
--- a/arch/arm/mach-msm/board-trout-gpio.c
+++ b/arch/arm/mach-msm/board-trout-gpio.c
@@ -214,17 +214,17 @@ int __init trout_init_gpio(void)
{
int i;
for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) {
- set_irq_chip(i, &trout_gpio_irq_chip);
- set_irq_handler(i, handle_edge_irq);
+ irq_set_chip_and_handler(i, &trout_gpio_irq_chip,
+ handle_edge_irq);
set_irq_flags(i, IRQF_VALID);
}
for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++)
gpiochip_add(&msm_gpio_banks[i].chip);
- set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
- set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
- set_irq_wake(MSM_GPIO_TO_INT(17), 1);
+ irq_set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
+ irq_set_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
+ irq_set_irq_wake(MSM_GPIO_TO_INT(17), 1);
return 0;
}
diff --git a/arch/arm/mach-msm/board-trout-mmc.c b/arch/arm/mach-msm/board-trout-mmc.c
index 44be8464657b..f7a9724788b0 100644
--- a/arch/arm/mach-msm/board-trout-mmc.c
+++ b/arch/arm/mach-msm/board-trout-mmc.c
@@ -174,7 +174,7 @@ int __init trout_init_mmc(unsigned int sys_rev)
if (IS_ERR(vreg_sdslot))
return PTR_ERR(vreg_sdslot);
- set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1);
+ irq_set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1);
if (!opt_disable_sdcard)
msm_add_sdcc(2, &trout_sdslot_data,
diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c
index 0de19ec74e34..56a964e52ad3 100644
--- a/arch/arm/mach-msm/gpio-v2.c
+++ b/arch/arm/mach-msm/gpio-v2.c
@@ -230,18 +230,18 @@ static void msm_gpio_update_dual_edge_pos(unsigned gpio)
val, val2);
}
-static void msm_gpio_irq_ack(unsigned int irq)
+static void msm_gpio_irq_ack(struct irq_data *d)
{
- int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+ int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio));
if (test_bit(gpio, msm_gpio.dual_edge_irqs))
msm_gpio_update_dual_edge_pos(gpio);
}
-static void msm_gpio_irq_mask(unsigned int irq)
+static void msm_gpio_irq_mask(struct irq_data *d)
{
- int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+ int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
unsigned long irq_flags;
spin_lock_irqsave(&tlmm_lock, irq_flags);
@@ -251,9 +251,9 @@ static void msm_gpio_irq_mask(unsigned int irq)
spin_unlock_irqrestore(&tlmm_lock, irq_flags);
}
-static void msm_gpio_irq_unmask(unsigned int irq)
+static void msm_gpio_irq_unmask(struct irq_data *d)
{
- int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+ int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
unsigned long irq_flags;
spin_lock_irqsave(&tlmm_lock, irq_flags);
@@ -263,9 +263,9 @@ static void msm_gpio_irq_unmask(unsigned int irq)
spin_unlock_irqrestore(&tlmm_lock, irq_flags);
}
-static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
{
- int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+ int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
unsigned long irq_flags;
uint32_t bits;
@@ -275,14 +275,14 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
if (flow_type & IRQ_TYPE_EDGE_BOTH) {
bits |= BIT(INTR_DECT_CTL);
- irq_desc[irq].handle_irq = handle_edge_irq;
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
__set_bit(gpio, msm_gpio.dual_edge_irqs);
else
__clear_bit(gpio, msm_gpio.dual_edge_irqs);
} else {
bits &= ~BIT(INTR_DECT_CTL);
- irq_desc[irq].handle_irq = handle_level_irq;
+ __irq_set_handler_locked(d->irq, handle_level_irq);
__clear_bit(gpio, msm_gpio.dual_edge_irqs);
}
@@ -309,6 +309,7 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
*/
static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
{
+ struct irq_data *data = irq_desc_get_irq_data(desc);
unsigned long i;
for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS);
@@ -318,21 +319,21 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip,
i));
}
- desc->chip->ack(irq);
+ data->chip->irq_ack(data);
}
-static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
{
- int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+ int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
if (on) {
if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
- set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1);
+ irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1);
set_bit(gpio, msm_gpio.wake_irqs);
} else {
clear_bit(gpio, msm_gpio.wake_irqs);
if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
- set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0);
+ irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0);
}
return 0;
@@ -340,11 +341,11 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
static struct irq_chip msm_gpio_irq_chip = {
.name = "msmgpio",
- .mask = msm_gpio_irq_mask,
- .unmask = msm_gpio_irq_unmask,
- .ack = msm_gpio_irq_ack,
- .set_type = msm_gpio_irq_set_type,
- .set_wake = msm_gpio_irq_set_wake,
+ .irq_mask = msm_gpio_irq_mask,
+ .irq_unmask = msm_gpio_irq_unmask,
+ .irq_ack = msm_gpio_irq_ack,
+ .irq_set_type = msm_gpio_irq_set_type,
+ .irq_set_wake = msm_gpio_irq_set_wake,
};
static int __devinit msm_gpio_probe(struct platform_device *dev)
@@ -361,12 +362,12 @@ static int __devinit msm_gpio_probe(struct platform_device *dev)
for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) {
irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i);
- set_irq_chip(irq, &msm_gpio_irq_chip);
- set_irq_handler(irq, handle_level_irq);
+ irq_set_chip_and_handler(irq, &msm_gpio_irq_chip,
+ handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
- set_irq_chained_handler(TLMM_SCSS_SUMMARY_IRQ,
+ irq_set_chained_handler(TLMM_SCSS_SUMMARY_IRQ,
msm_summary_irq_handler);
return 0;
}
@@ -378,7 +379,7 @@ static int __devexit msm_gpio_remove(struct platform_device *dev)
if (ret < 0)
return ret;
- set_irq_handler(TLMM_SCSS_SUMMARY_IRQ, NULL);
+ irq_set_handler(TLMM_SCSS_SUMMARY_IRQ, NULL);
return 0;
}
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
index 176af9dcb8ee..5ea273b00da8 100644
--- a/arch/arm/mach-msm/gpio.c
+++ b/arch/arm/mach-msm/gpio.c
@@ -293,10 +293,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
val = readl(msm_chip->regs.int_edge);
if (flow_type & IRQ_TYPE_EDGE_BOTH) {
writel(val | mask, msm_chip->regs.int_edge);
- irq_desc[d->irq].handle_irq = handle_edge_irq;
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
} else {
writel(val & ~mask, msm_chip->regs.int_edge);
- irq_desc[d->irq].handle_irq = handle_level_irq;
+ __irq_set_handler_locked(d->irq, handle_level_irq);
}
if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
msm_chip->both_edge_detect |= mask;
@@ -354,9 +354,9 @@ static int __init msm_init_gpio(void)
msm_gpio_chips[j].chip.base +
msm_gpio_chips[j].chip.ngpio)
j++;
- set_irq_chip_data(i, &msm_gpio_chips[j]);
- set_irq_chip(i, &msm_gpio_irq_chip);
- set_irq_handler(i, handle_edge_irq);
+ irq_set_chip_data(i, &msm_gpio_chips[j]);
+ irq_set_chip_and_handler(i, &msm_gpio_irq_chip,
+ handle_edge_irq);
set_irq_flags(i, IRQF_VALID);
}
@@ -366,10 +366,10 @@ static int __init msm_init_gpio(void)
gpiochip_add(&msm_gpio_chips[i].chip);
}
- set_irq_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler);
- set_irq_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler);
- set_irq_wake(INT_GPIO_GROUP1, 1);
- set_irq_wake(INT_GPIO_GROUP2, 2);
+ irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler);
+ irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler);
+ irq_set_irq_wake(INT_GPIO_GROUP1, 1);
+ irq_set_irq_wake(INT_GPIO_GROUP2, 2);
return 0;
}
diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c
index 68c28bbdc969..1b54f807c2d0 100644
--- a/arch/arm/mach-msm/irq-vic.c
+++ b/arch/arm/mach-msm/irq-vic.c
@@ -313,11 +313,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
type = msm_irq_shadow_reg[index].int_type;
if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
type |= b;
- irq_desc[d->irq].handle_irq = handle_edge_irq;
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
}
if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
type &= ~b;
- irq_desc[d->irq].handle_irq = handle_level_irq;
+ __irq_set_handler_locked(d->irq, handle_level_irq);
}
writel(type, treg);
msm_irq_shadow_reg[index].int_type = type;
@@ -357,8 +357,7 @@ void __init msm_init_irq(void)
writel(3, VIC_INT_MASTEREN);
for (n = 0; n < NR_MSM_IRQS; n++) {
- set_irq_chip(n, &msm_irq_chip);
- set_irq_handler(n, handle_level_irq);
+ irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq);
set_irq_flags(n, IRQF_VALID);
}
}
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 0b27d899f40e..ea514be390c6 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -100,11 +100,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
writel(readl(treg) | b, treg);
- irq_desc[d->irq].handle_irq = handle_edge_irq;
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
}
if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
writel(readl(treg) & (~b), treg);
- irq_desc[d->irq].handle_irq = handle_level_irq;
+ __irq_set_handler_locked(d->irq, handle_level_irq);
}
return 0;
}
@@ -145,8 +145,7 @@ void __init msm_init_irq(void)
writel(1, VIC_INT_MASTEREN);
for (n = 0; n < NR_MSM_IRQS; n++) {
- set_irq_chip(n, &msm_irq_chip);
- set_irq_handler(n, handle_level_irq);
+ irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq);
set_irq_flags(n, IRQF_VALID);
}
}
diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c
index 11b54c7aeb09..689e78c95f38 100644
--- a/arch/arm/mach-msm/sirc.c
+++ b/arch/arm/mach-msm/sirc.c
@@ -105,10 +105,10 @@ static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type)
val = readl(sirc_regs.int_type);
if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
val |= mask;
- irq_desc[d->irq].handle_irq = handle_edge_irq;
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
} else {
val &= ~mask;
- irq_desc[d->irq].handle_irq = handle_level_irq;
+ __irq_set_handler_locked(d->irq, handle_level_irq);
}
writel(val, sirc_regs.int_type);
@@ -158,15 +158,14 @@ void __init msm_init_sirc(void)
wake_enable = 0;
for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) {
- set_irq_chip(i, &sirc_irq_chip);
- set_irq_handler(i, handle_edge_irq);
+ irq_set_chip_and_handler(i, &sirc_irq_chip, handle_edge_irq);
set_irq_flags(i, IRQF_VALID);
}
for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) {
- set_irq_chained_handler(sirc_reg_table[i].cascade_irq,
+ irq_set_chained_handler(sirc_reg_table[i].cascade_irq,
sirc_irq_handler);
- set_irq_wake(sirc_reg_table[i].cascade_irq, 1);
+ irq_set_irq_wake(sirc_reg_table[i].cascade_irq, 1);
}
return;
}
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.